JPH0431606B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a power supply noise detection circuit used in semiconductor integrated circuits such as microprocessors and peripheral circuit devices thereof.

(Prior Art) Generally, semiconductor integrated circuits such as microprocessors, peripheral circuit devices thereof, and one-chip microcomputers are provided with a power supply noise detection circuit for detecting the occurrence of power supply noise. This type of conventional power supply noise detection circuit is configured as shown in FIG. That is, a resistor 40 and a MOS type (insulated gate type) N-channel transistor 41 whose source is connected to the substrate are connected in series between the V _DD power supply terminal and the ground terminal GND.
The gate of this transistor 41 is connected to the V _DD power supply terminal. Further, a CMOS (complementary insulated gate type) inverter 44 has a P-channel transistor 42 and an N-channel transistor 43 connected in series between the V _DD power supply terminal and the ground terminal, and their gates are connected to each other. is connected. The input end (gate interconnection point) of this inverter 44 is connected to the drain (node 45) of the transistor 41.

In the above power supply noise detection circuit, the transistor 41 is designed to have a large channel length so that the mutual conductance g _n is small, and the node 4
The potential of the transistor 5 is determined by dividing the resistor 40 and the resistance of the transistor 41. Typically, the V _DD power supply potential is 5V
Therefore, the transistor 41 is in the on state, and the resistance of the transistor 41 is greater than the resistance of the transistor 41.
Since the value of 0 is very large, the node 45
The potential will be around 0V. Therefore, this node 45
In the inverter 44 inputting the potential of P
The channel transistor 42 is turned on, the N-channel transistor 43 is turned off, and 5V is output to the output node 46 of the inverter 44.

Here, assume that the power supply potential has decreased due to some reason. As a result, the gate potential of the transistor 41 decreases, so the resistance of the transistor 41 increases, and the potential of the node 45 increases compared to the normal state. When this potential rises above the circuit threshold of the inverter 44, the output node 46 changes from a high level to a low level, and a power supply noise detection signal is output. Note that at this time, node 4
N in this inverter 44 so that the inverter 44 is inverted even if the potential of
The channel width of the channel transistor 43 is made larger than that of the P channel transistor 42, and the circuit threshold value is designed to be lower.

However, the conventional power supply noise detection circuit described above is
Since the transistor 41 is always on during normal operation, the resistor 40 and the transistor 4
A through current always flows through path 1. Further, in order to prevent a steady through current from flowing in the path of the transistors 42 and 43 in the inverter 44, the potential of the node 45 is normally set to the inverter 44.
must be lower than the gate threshold of the N-channel transistor 43. For this purpose, the value of the resistor 40 must be made very large, and as a result, it takes time to raise the potential of the node 45 to the circuit threshold of the inverter 44 when the power supply voltage drops, so it takes about several tens of nanoseconds. It is not possible to detect the occurrence of short-term power supply noise.

(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned problem that a steady through current occurs and the occurrence of power supply noise for a short period of about several tens of nanoseconds cannot be detected. In this case, steady through current no longer occurs, and it lasts for several tens of nanoseconds.
It is an object of the present invention to provide a power supply noise detection circuit that can detect even when power supply noise occurs for a relatively short time.

[Structure of the Invention] (Means for Solving the Problems) The power supply noise detection circuit of the present invention includes a first MOS transistor that is turned on when power supply noise occurs at the V _DD power supply terminal or the ground power supply terminal; A CR time constant circuit that delays fluctuations in the potential of the source and substrate of the first MOS transistor when the power supply noise occurs, and a gate of the first MOS transistor are connected to the drain of the first MOS transistor. A second MOS transistor that turns on when the first MOS transistor turns on, and a second MOS transistor that turns on when the first MOS transistor turns on.
It is connected to the gate of the transistor and the first MOS transistor, turns off when the power supply noise occurs, and turns on when no power supply noise occurs, turning off the second MOS transistor. a third MOS transistor;
is connected in series to the second MOS transistor, and is turned off when the power supply noise occurs, and is turned on when no power supply noise is generated, and the second MOS transistor is connected in series to the second MOS transistor.
It is characterized by comprising a fourth MOS transistor that clears the power supply noise detection output potential at the point connected in series with the MOS transistor.

(Function) In the above circuit, since there is no path through which a steady through current flows, current consumption is small. Furthermore, since the first MOS transistor is immediately turned on when power supply noise occurs, it is possible to detect the occurrence of power supply noise for a short period of about several tens of nanoseconds.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Figure 1 shows a power supply noise detection circuit formed on the same semiconductor chip as, for example, a microprocessor, which detects the occurrence of noise at the V _DD power supply terminal in, for example, an element using an N-well. It is something. That is, a resistor R and a capacitor C are connected in series between the V _DD power supply terminal and the ground terminal. The source and substrate of the first P-channel transistor TP1 are connected to the connection point (node A) between the resistor R and the capacitor C, and the first P-channel transistor TP1 is connected to the source and substrate of the first P-channel transistor TP1.
1 is connected to the V _DD power supply terminal, and its drain (node B) is connected to the gate of the first N-channel transistor TN1 and the drain of the second N-channel transistor TN2.
The second N-channel transistor TN2 has its source and substrate grounded, and its gate connected to the V _DD power supply terminal. Further, the source and substrate of the first N-channel transistor TN1 are grounded, and the drain (node C) is connected to the drain of the second P-channel transistor TP2. This second P-channel transistor TP2 is
The source and substrate are connected to the V _DD power supply terminal, and the gate is connected to the ground terminal.

In the above circuit, a second N-channel transistor TN2 and a second P-channel transistor
The channel lengths of TP2 are each set to be large. The resistor R and capacitor C are used to delay changes in the potential of node A due to fluctuations in the V _DD power supply potential due to power supply noise. the first P-channel transistor TP
1, when the above power supply noise occurs, the gate becomes lower potential than the source/substrate and turns on.
It detects power supply noise. When the first P-channel transistor TP1 is turned on, the first N-channel transistor TN1 is turned on by applying an on-voltage to its gate, and sends a power supply noise detection signal from the node C to the internal circuit of the integrated circuit. It is something to convey. second N-channel transistor
TN2 turns on when the V _DD power supply potential applied to the gate is at a normal value, and also turns on when the V _DD power supply potential recovers after detecting the occurrence of the above power supply noise. Then, the first N-channel transistor TN1 is turned off (clearing the power supply noise detection state). The second P-channel transistor TP2 is turned on when the _VDD power supply potential is at a normal value, and is also turned on when the _VDD power supply potential recovers after detecting the occurrence of the power supply noise. Then, the node C
Set the potential to the _VDD power supply potential (clear the power supply noise detection state).

Next, the operation of the above circuit will be explained with reference to the waveforms shown in FIG. Under normal conditions, the _VDD potential is, for example, 5V, and the first P-channel transistor TP
1. The first N-channel transistor TN1 is off, the second N-channel transistor TN2,
The second P-channel transistor TP2 is on. As a result, node A is at V _DD potential, node B is at ground potential, and node C is at V _DD potential.

In this state, for some reason the V _DD potential
Suppose that V _DD − | V _THP | is as follows. here,
V _THP is the gate threshold of the P-channel transistor. At this time, the potential of node A does not drop immediately due to the time constant caused by resistor R and capacitor C, and only the gate potential drops while the source and substrate potentials of the first P-channel transistor TP1 remain at V _DD potential. So it turns on. In this case, the second N-channel transistor TN2 has a large channel length, so g _n is small, but due to the drop in the V _DD potential, the gate-source potential V _GS decreases, and g _n becomes even smaller. Furthermore, since the channel width of the first P-channel transistor TP1 is set to be large, the first P-channel transistor TP1
1 and the second N-channel transistor TN2, the potential of node B increases. When the potential of this node B becomes equal to or higher than V _THN (V _THN is the gate threshold voltage of the N-channel transistor), the first N-channel transistor TN1 is turned on. In this case, since the second P-channel transistor TP2 has a large channel length, g _n is small, but as the V _DD potential drops, the potential V _GS decreases, and g _n becomes even smaller. In addition, the first N-channel transistor
Since the channel width of TN1 is set to be large, the potential of node C is lowered to a low potential by the resistance division between the second P-channel transistor TP2 and the first N-channel transistor TN1, and this is the power supply noise detection output. becomes.

After this, when the V _DD potential returns to its normal value, the potential at node A does not immediately return to the V _DD potential, so the first P-channel transistor TP1 is turned off because its gate potential is higher than the source and substrate potentials. become. Then, the second N-channel transistor TN2 is turned on because the V _DD potential is applied to its gate, and the potential of the node B is returned to the ground potential. Thereby, the first N-channel transistor TN
1 is turned off and the second P-channel transistor
Since the gate potential of TP2 is the ground potential, it turns on and raises the potential of node C to _VDD potential.

According to the power supply noise detection circuit of the above embodiment, current consumption is small because there is no path that generates a steady through current. Also, when the power supply noise occurs,
If the V _DD potential continues to drop by |V _THP | or more for about several tens of nanoseconds, the first P-channel transistor TP1 turns on and power supply noise can be detected.

FIG. 3 shows a power supply noise detection circuit according to another embodiment, which detects when noise occurs at the ground end of an element using a P-well, and compared to the above embodiment, the MOS The P-channel type and N-channel type transistors are mutually changed, and the connection relationship between the V _DD power supply terminal and the ground terminal is reversed. The power supply noise detection operation in this circuit is performed in accordance with the operation in the previous embodiment. In other words, for some reason the potential of the ground terminal becomes V _THN
Suppose it becomes more than that. The potential of node A is the resistance R
Although it does not rise immediately due to the time constant caused by
TN1 is turned on because the source and substrate potentials remain at 0V and only the gate potential rises. second P
The channel transistor TP2 is designed to have a large channel length and a small g _n , and as the ground potential increases, the voltage V _GS decreases, and g _n further becomes smaller. In addition, the first N-channel transistor TN
1 is designed to have a large channel width, and by resistance division between the first N-channel transistor TN1 and the second P-channel transistor TP2,
The potential of node B decreases. The potential of this node B is
When V _DD −|V _THP | or less, the first P-channel transistor TP1 is turned on. The second N-channel transistor TN2 has a large channel length.
The g _n is designed to be small, and as the ground potential increases, the voltage V _GS decreases, and the g _n becomes even smaller.
The first P-channel transistor TP1 is designed to have a large channel width, and the potential of the node C is raised to a high potential by resistance division between the first P-channel transistor TP1 and the second N-channel transistor TN2. This becomes the power supply noise detection output.

After this, when the potential of the ground terminal returns to 0V, the potential of node A does not return to 0V immediately, so
The first N-channel transistor TN1 is turned off since its gate potential is lower than the source and substrate potentials, and node B is returned to the V _DD potential by the second P-channel transistor TP2. By this,
The first P-channel transistor TP1 is turned off, and the second N-channel transistor TN2 is turned on since its gate potential is at the _VDD potential, lowering the potential of the node C to the ground potential.

[Effects of the Invention] As described above, according to the power supply noise detection circuit of the present invention, steady through current does not occur and
It becomes possible to detect even when power supply noise occurs for a short period of time. Therefore, it becomes possible to use the above circuit in a microprocessor or one-chip microcomputer, etc., and perform control such as interrupting runaway of the CPU using the power supply noise detection output.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the power supply noise detection circuit of the present invention, FIG. 2 is a voltage waveform diagram showing the operation of the circuit in FIG. 1, and FIG. 3 is a circuit diagram showing another embodiment. FIG. 4 is a circuit diagram showing a conventional power supply noise detection circuit. R...Resistance, C...Capacitor, TN1, TN
2...N channel transistor, TP1, TP2...
...P channel transistor.

Claims (1)

[Claims] 1. A resistor and a capacitor connected in series between a first power supply terminal and a second power supply terminal, a source and a substrate connected to the connection point of the resistor and the capacitor, and a gate connected to the a first MOS transistor of a first conductivity type connected to a first power supply terminal; a gate of the first MOS transistor of the first conductivity type connected to the drain; and a source connected to the second power supply terminal; a first MOS transistor of a second conductivity type opposite to the first conductivity type, connected between the drain of the first MOS transistor of the first conductivity type and the second power supply terminal; a second conductive type, the gate of which is connected between the first power source terminal and the first power supply terminal;
a MOS transistor of a first conductivity type connected between the first power supply end and the drain of the first conductivity type MOS transistor, the gate of which is connected to the second power supply end; 1. A power supply noise detection circuit comprising: 2 MOS transistors. 2. The potential of the first power supply end is higher than the potential of the second power supply end, the first conductivity type is a P channel type, and the second conductivity type is an N channel type. A power supply noise detection circuit according to claim 1. 3. The potential of the first power supply terminal is lower than the potential of the second power supply terminal, the first conductivity type is an N-channel type, and the second conductivity type is a P-channel type. A power supply noise detection circuit according to claim 1.