JPH0435953B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a burst phase discrimination circuit that discriminates the phase state of a color burst signal whose phase is inverted every horizontal scanning period and which is included in a color video signal based on the PAL (Phase Alternation Line) system. .

The PAL color video signal E _p is given by the following equation.

E _p =Y+(B-Y)sinω _S t±(R-Y)cosω _S t...
(1) Here, Y is the luminance signal, B and R are the blue and red signals, and ω _S is the angular frequency of the color subcarrier, approximately 2π [radian] × 4.43
[MHz]. The sign ± in equation (1) means a phase inversion for each horizontal scanning line, and the (RY) component of the carrier color signal has a phase difference of 180° from each other for each horizontal scanning line. It is transmitted by balanced modulation of the subcarrier signal COSω _S t. Therefore, the color burst signal is required to have information for inverting the phase of the subcarrier of the (RY) component line by line on the image receiving side. Therefore, the color burst signal is switched line by line to a phase of ±135° around the B-Y axis, and the phase-inverted signal is sent out. On the image receiving side, the phase of the subcarrier of the (RY) component is inverted by a burst phase discrimination circuit that discriminates which phase of the color burst signal is within ±135 degrees from the B-Y axis. Normally, this is what is being done.

FIG. 1 is a block diagram showing a conventional example of a burst phase discrimination circuit. In Figure 1, a carrier color signal included in a PAL color video signal is transmitted to burst gate 1 along with a color burst signal.
is supplied to. Also, this burst gate 1
For example, a gate pulse consisting of the output of a gate pulse generator (not shown) configured to delay the horizontal synchronizing signal and output a pulse while the color burst signal is present is also supplied. burst gate 1
consists of, for example, an analog switch circuit that turns on and off in response to this gate pulse, and separates and extracts the color burst signal from the carrier color signal and outputs the PLL.
(Phase Locked Loop) Supply to circuit 2.
In the PLL circuit 2, the color burst signal and
The output of the VCO (voltage controlled oscillator) 3 is supplied to a synchronous detector 4, and a signal corresponding to the difference in frequency and phase between these two signals is output from the synchronous detector 4 and then passed through a low-pass filter 5 to the VCO 3.
is supplied as a control voltage. From this VCO 3, a subcarrier signal sin(ω _S t+90°)=cosω _S t having a phase difference of 90° with respect to a signal sinω _S t having an average phase of the color burst signal sin(ω _S t±135°) is obtained.

The output of the synchronous detector 4 is supplied to a detector 6. The detector 6 is also supplied with a burst gate signal and the output of a T-type flip-flop 7 whose clock input is supplied with the burst gate signal. The detector 6 is configured to generate a pulse when the output of the synchronous detector 4 and the output of the flip-flop 7 match in polarity while the burst gate signal is being output. These burst gate 1, subcarrier signal generator 2 and detector 6
A burst phase discrimination circuit 8 is constructed, and the pulse outputted from the detector 6 is supplied to the reset input terminal of the flip-flop 7 as an output of the burst phase discrimination circuit 8. The Q and output of flip-flop 7 are supplied to PAL switch 9. The PAL switch 9 includes, for example, a transfer device that transfers the subcarrier signal cosω _S t outputted from the PLL circuit 2 by 180 degrees, and an output of this transfer device -cosω _S t and the subcarrier signal cosω _S by the Q and output of the flip-flop 7. t, and a signal changeover switch circuit that selectively outputs one of them. The output of this PAL switch 9 is supplied as a detection subcarrier signal to an RY demodulator 10 comprising a synchronous detector, a low pulse filter, etc. An input terminal of the R-Y demodulator 10 is supplied with a signal ±(R-Y) cosω _St separated by, for example, a carrier color signal separator (not shown).
This RY demodulator 10 outputs a (RY) signal.

In the above configuration, from the synchronous detector 4,
As shown in the figure, a pulse whose polarity is reversed every 1H (one horizontal scanning period) is output. On the other hand, the burst gate signal is a pulse signal consisting of positive pulses generated with a repetition period of 1H, as shown in FIG. almost match. Further, the output of the flip-flop 7 whose clock input terminal is supplied with the burst gate signal is inverted at the time when the burst gate signal is generated, as shown in FIG. Here, when the polarity of the output of the synchronous detector 4 and the output of the flip-flop 7 is reversed while the burst gate signal is being output.
It is assumed that connections are made between the transfer device and the changeover switch forming the PAL switch 9 so that the subcarrier signal inversion operation by the PAL switch 9 is performed normally. Then,
When the inverting operation of the subcarrier signal by the PAL switch 9 is reversed and erroneous demodulation is performed, the polarities of the output of the synchronous detector 4 and the output of the flip-flop 7 match and are detected during the period when the burst gate signal is output. A pulse is supplied from the circuit 6 to the reset input terminal of the flip-flop 7. As a result, the flip-flop 7 is reset and correct demodulation can be performed from now on.

However, in the conventional burst phase discrimination circuit as described above, the phase of the color burst signal is discriminated by the detection output obtained by synchronously detecting the color burst signal, so the circuit configuration becomes complicated and the PLL circuit is required. The disadvantage is that the phase of the color burst signal cannot be discriminated for several milliseconds, for example, until the color burst signal reaches the phase lock state, resulting in a slow response speed.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a burst phase discrimination circuit that has a simple configuration and can respond at high speed.

The burst phase discrimination circuit according to the present invention extracts a portion corresponding to a color burst signal from a signal envelope component obtained by combining the input and output of a signal delay means for delaying a carrier color signal and a color burst signal for a predetermined period of time, and generates a phase discrimination signal. It is configured to output as .

Hereinafter, the present invention will be explained in detail with reference to FIGS. 3 to 5.

As shown in FIG. 3, in the burst phase discrimination circuit 8 according to the present invention, a PAL carrier color signal is supplied to a 1H delay circuit 11 and an adder circuit 12.
The 1H delay circuit 11 includes, for example, a delay line with a signal delay time of 1H, and converts the PAL carrier color signal into 1H.
Outputs the delayed signal. The output of this 1H delay circuit 11 is provided to the adder circuit 12.
Added to PAL carrier color signal. The output of the adder circuit 12 is amplified by an amplifier 13 and then supplied to an envelope detector 14 comprising an AM detection circuit or the like. The output of the detector 14 is supplied to one input terminal of a two-input AND gate 15.
The other input terminal of the AND gate 15 is supplied with a burst gate signal. The pulse output from the AND gate 15 is supplied to the reset input terminal of the flip-flop 7 as a phase discrimination signal.

In such a configuration, along with the PAL carrier color signal
The phases of the color burst signal supplied to the 1H delay circuit 11 and the adder circuit 12 during consecutive 4H are shown in FIGS. 4A to 4D. As is clear from Figure 4A to Figure 4D, the color burst signal is 1H in phase at ±135° around the B-Y axis.
In addition to this, the phase of the subcarrier is shifted by 90° between two consecutive scanning lines in the same field to prevent vertical stripe interference. Since 1/4 line offset is adopted, the phase of the color burst signal is inverted every 2H. For this reason, the PAL carrier color signal and this PAL
The portion corresponding to the color burst signal in the output of the adder circuit 12 which adds signals obtained by delaying the carrier color signal by 1H is canceled every 2H, so that the output of the adder circuit 12 becomes as shown in FIG. 5A. The output of the detector 14 that envelope-detects the output of the adder circuit 12 is divided into a pulse α generated every 2H and a carrier color signal according to the portion corresponding to the color burst signal in the output of the adder circuit 12, as shown in FIG. The signal includes a pulse b generated every 1H depending on the corresponding portion. A two-input AND gate 15, whose input terminals are supplied with the output of the detector 14 and a burst gate signal as shown in C in the same figure, outputs a pulse every 2H as shown in D in the same figure. The flip-flop 7 to which the output of the gate 15 is supplied to the reset/input terminal is in the reset state when a pulse is output from the gate 15, and when only the burst gate signal is output, the state is reversed and the output of the flip-flop 7 is as shown in the figure. It becomes as shown in E. Therefore, a pulse as a phase discrimination signal is always supplied to the reset input terminal of the flip-flop 7 every 2H to normalize the operation of the PAL switch 9, which inverts the subcarrier signal according to the output of the flip-flop 7. This means that even if the inversion operation of the subcarrier signal by PAL switch 9 is reversed, the 2H
Within a short period of time, the inversion operation of the subcarrier signal will be restored to normal, and correct demodulation will be performed in the RY demodulator 10.

As described above, the burst phase discrimination circuit according to the present invention detects a color burst signal by a signal obtained by adding a PAL carrier color signal accompanied by a color burst signal and the output of a 1H delay circuit that delays this PAL carrier color signal. Since a phase discrimination signal is generated every 2H according to the phase of the color burst signal while discriminating the phase, the response time is approximately several hundred and tens of microseconds with a simple configuration that does not include a synchronous detector, and it is faster than conventional circuits. This means that the response speed can be increased compared to the above. Further, the 1H delay circuit 11 as a signal delay means is a 1H delay circuit used in other circuits, such as a 1H delay circuit for cross color removal provided in a color demodulation circuit proposed by the inventors. Since it can be shared with the delay circuit, 1H delay circuit 1
Since there is no need to separately provide 1, it is possible to expect the effect that the number of parts used in a video playback device or the like can be reduced.

In the above embodiment, the portion corresponding to the burst signal in the output of the detector 14 is
Although the part corresponding to the burst gate signal is extracted by the AND gate 15, by configuring the DC amplifier 13 to have a burst gate amplifier configuration that amplifies the input signal only when the burst gate signal is output, the portion corresponding to the burst gate signal can be extracted. Alternatively, a switch circuit that turns on and off according to the burst gate signal may be provided in place of the AND gate 15, so that the portion corresponding to the burst gate signal can be extracted. In addition, in the above embodiment, the input signal is 1H
A 1H delay circuit 11 has been used as a signal delaying means, but the signal delaying means has a signal delay time longer or shorter than 1H by a time corresponding to an integral multiple of 1/2 wavelength of the subcarrier. A circuit may also be used. This is because, in a PAL carrier color signal with a color burst that uses a 1/4 line offset as an input signal, the phase of the color burst signal changes every 2H, as is clear from Figures 4A to D. It is inverted, and this original signal is 1H
One of the successive 2H color bursts in the delayed signal obtained by delaying is in a reverse phase relationship with respect to the corresponding 2H color burst in the original signal. If the delay time is further increased or decreased by λ/2, a result similar to that obtained by inverting the delayed signal is obtained, and the above-mentioned negative phase relationship does not change.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional example of a burst phase discrimination circuit, FIG. 2 is a waveform diagram showing the operation of the circuit in FIG. 1, and FIG. 3 is a block diagram showing an embodiment of the present invention. Figure 4 is a vector diagram of color carrier signals for each 1H during consecutive 4H, and Figure 5 is
4 is a waveform diagram showing the operation of the circuit of FIG. 3. FIG. Explanation of symbols of main parts, 11...1H delay circuit,
12...Addition circuit, 13...DC amplifier, 14...
...Envelope detector, 15...AND gate.

Claims (1)

[Claims] 1 In a PAL color video signal in which the phase of the color burst signal for one of the carrier color signals is inverted every horizontal scanning period, and the phase of the subcarrier advances (or lags) by 90° every horizontal scanning period. A burst phase discrimination circuit in a PAL system that discriminates the phase state of the color burst signal, wherein the carrier color signal and the color burst signal are divided into n of 1/2 wavelength of the subcarrier in one horizontal scanning period.
(n is zero or a positive integer) signal delay means for delaying the time by an added or subtracted time, and a signal synthesis means for synthesizing by adding or subtracting the input and output of the signal delay means; and envelope detecting means for detecting an envelope of the output of the signal synthesizing means, and extracting a portion corresponding to the color burst signal from the output of the envelope detecting means and outputting it as a phase discrimination signal. circuit.