JPH043802B2 - - Google Patents
Info
- Publication number
- JPH043802B2 JPH043802B2 JP60135928A JP13592885A JPH043802B2 JP H043802 B2 JPH043802 B2 JP H043802B2 JP 60135928 A JP60135928 A JP 60135928A JP 13592885 A JP13592885 A JP 13592885A JP H043802 B2 JPH043802 B2 JP H043802B2
- Authority
- JP
- Japan
- Prior art keywords
- image
- solder surface
- chip component
- chip
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910000679 solder Inorganic materials 0.000 claims description 34
- 238000005286 illumination Methods 0.000 claims description 14
- 238000007689 inspection Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 6
- 238000006073 displacement reaction Methods 0.000 description 6
- 239000000835 fiber Substances 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- 238000009966 trimming Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Landscapes
- Length Measuring Devices By Optical Means (AREA)
- Supply And Installment Of Electrical Components (AREA)
Description
【発明の詳細な説明】
(技術分野)
本発明は印刷配線基板に実装されたチツプ部品
のチツプずれ状態を検査するチツプ部品ずれ検査
方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a chip component displacement inspection method for inspecting the chip displacement state of a chip component mounted on a printed wiring board.
(背景技術)
例えば、チツプ部品が実装された印刷配線基板
のチツプ部品ずれを自動的に測定する場合、従来
は第3図イに示すように印刷配線基板10上のチ
ツプ部品11に拡散照明13等の半田面12を光
らせる照明を行い、ITVカメラ等により撮像し
て二値化し、半田面の輪郭を出すことによつて、
その半田面のずれでチツプ部品ずれを測定してい
た。すなわち、ロの如く二値化して得た二値化像
12′にハの如く検査領域Sを設定し、基準点O
から輪郭までの距離等を画像処理により求め、こ
の値をもつてずれ量としていた。(Background Art) For example, when automatically measuring the displacement of chip components on a printed wiring board on which chip components are mounted, conventionally, as shown in FIG. By lighting the solder surface 12 such as
The deviation of the chip components was measured by the deviation of the solder surface. That is, an inspection area S as shown in C is set in the binarized image 12' obtained by binarizing as shown in B, and a reference point O is set.
The distance from to the contour was determined by image processing, and this value was used as the amount of deviation.
しかしながら、チツプ部品の半田付け状態は多
種多様であり、例えば第4図イに示す半田不足の
半田面12A、半田過剰の半田面12Bのものは
ロに示すように二値化像12A′,12B′が虫食
い状態となるため半田面12A,12Bの輪郭が
出にくく、また、第5図イの如くチツプ部品11
に文字14が入つていたり、トリミング15され
ていたり、白つぽいチツプ部品である場合には、
半田面12の輪郭を出す二値化閾値レベルでは文
字14、トリミング15、白つぽい部分等がノイ
ズ14′,15′となつて現われるため、それらの
除去に複雑な画像処理もしくは複雑な照明系が必
要であつた。 However, the soldering conditions of chip parts vary widely; for example, the solder surface 12A with insufficient solder and the solder surface 12B with excess solder shown in FIG. ' are moth-eaten, making it difficult to see the contours of the solder surfaces 12A and 12B, and as shown in FIG.
If there is a letter 14 in it, if it has been trimmed 15, or if it is a whitish chip part,
At the binarization threshold level that produces the outline of the solder surface 12, characters 14, trimming 15, whitish parts, etc. appear as noise 14', 15', so complex image processing or a complex illumination system is required to remove them. was necessary.
(発明の目的)
本発明は上述の技術的課題を解決し、チツプ部
品のずれ状態を高精度で、かつ自動的に検査する
ことのできるチツプ部品ずれ検査方法を提供する
ことを目的とする。(Objective of the Invention) An object of the present invention is to solve the above-mentioned technical problems and provide a chip component displacement inspection method that can automatically and highly accurately inspect the displacement state of chip components.
(発明の開示) 以下、図面に沿つて本発明を詳述する。(Disclosure of invention) Hereinafter, the present invention will be explained in detail with reference to the drawings.
第1図に本発明を具体化した検査装置の構成例
を示す。本発明の特徴とする点は、横方向強調の
照明による半田面の画像と落射照明による半田面
の画像とを合成することにより、半田面の状態に
影響されずに正確な半田面の輪郭を出すことにあ
る。すなわち、半田付け部の平坦でない角度のあ
る部分は横方向強調拡散照明を照射することによ
り半田面の角度のある部分を強調して光らせて
ITVカメラで撮像し、また、半田面の平坦部は
落射照明を照射し、正反射光をITVカメラで撮
像する。これにより、半田面の角度に応じて半田
面が最も強く光る状態で撮像ができるので、二値
化する際の二値化閾値レベルを充分に高く設定す
ることができ、半田不足、半田過剰による像の欠
けや文字、トリミング、チツプ部品色等によるノ
イズが二値化像に現われるのを防止することがで
きる。 FIG. 1 shows an example of the configuration of an inspection device embodying the present invention. A feature of the present invention is that by combining an image of the solder surface obtained by horizontally emphasized illumination and an image of the solder surface obtained by epi-illumination, an accurate outline of the solder surface can be obtained without being affected by the condition of the solder surface. It's about putting it out. In other words, the angular part of the soldering surface that is not flat can be illuminated with lateral emphasis diffused lighting to highlight the angular part of the soldering surface.
An image is taken with an ITV camera, and epi-illumination is applied to the flat part of the solder surface, and the specularly reflected light is imaged with an ITV camera. As a result, images can be taken with the solder surface shining the brightest depending on the angle of the solder surface, so the binarization threshold level can be set sufficiently high when binarizing. It is possible to prevent noise from appearing in the binarized image due to image chipping, characters, trimming, chip part colors, etc.
第1図において、横方向強調照明は光源5から
の光を内側方向照射用のフアイバリングライトガ
イド3によつて印刷配線基板10上のチツプ部品
11に対し光を横方向から照射することによつて
得られる。なお、内側方向照射用のフアイバリン
グライトガイド3の端部から放射された光は乳白
色でドーム状の拡散板7によつて角度が急になる
ほどチツプ部品11の半田面に照射される光が弱
くなるような拡散光となる。一方、落射照明は光
源4からの光を下側方向照射用のフアイバリング
ライトガイド2を通してチツプ部品11に対し光
を上方向から照射することにより得られる。な
お、2つの照明の切り換えはシヤツタ6にて行
う。また、ITVカメラ1は照明部の上方に設け
られ、撮像して得た信号は画像処理部8において
二値化およびずれ判定の画像処理が施される。 In FIG. 1, lateral emphasis illumination is achieved by irradiating light from a light source 5 laterally onto a chip component 11 on a printed wiring board 10 using a fiber ring light guide 3 for inward irradiation. can get. Note that the light emitted from the end of the fiber ring light guide 3 for inward irradiation is milky white, and due to the dome-shaped diffuser plate 7, the steeper the angle, the weaker the light irradiated onto the solder surface of the chip component 11. The result is diffused light. On the other hand, epi-illumination is obtained by irradiating light from the light source 4 from above onto the chip component 11 through the fiber ring light guide 2 for downward irradiation. Note that switching between the two illuminations is performed using the shutter 6. Further, the ITV camera 1 is provided above the illumination section, and the signals obtained by imaging are subjected to image processing such as binarization and deviation determination in the image processing section 8.
しかして、第2図イは撮像視野内のチツプ部品
11の生画像を示したものであるが、光源5、フ
アイバリングライトガイド3、拡散板7による横
方向強調照明をチツプ部品11に照射し、ITV
カメラ1により撮像して文字、トリミング、チツ
プ部品色の明るさより高い閾値レベルで二値化す
ると、第2図ロに示すようにチツプ部品11の半
田付け部の傾斜5度程度から45度程度の角度の部
分が白くなる二値化像12′を得る。ここでは、
二値化閾値レベルより明るい部分は白とするが、
反転しても同じことは言うまでもない。 FIG. 2A shows a raw image of the chip component 11 within the imaging field of view, and the chip component 11 is irradiated with lateral emphasis illumination from the light source 5, the fiber light guide 3, and the diffuser plate 7. ITV
When an image is captured by the camera 1 and binarized at a threshold level higher than the brightness of the text, trimming, and chip component color, as shown in FIG. A binarized image 12' in which the angular portion becomes white is obtained. here,
Parts brighter than the binarization threshold level are white, but
Needless to say, the same is true even if it is reversed.
そして、この二値化像12′を記憶しておき、
光源4、フアイバリングライトガイド2による落
射照明に切り換え、再びITVカメラ1で撮像し、
同じく文字、トリミング、チツプ部品色の明るさ
より高い閾値レベルで二値化すると第2図ハに示
すようにチツプ部品11の半田付け部の傾斜5度
程度以下の部分が白くなる二値化像12″を得る。
この二値化像12″と既に記憶しておいた横方向
強調照明の二値化像12′とを合成することによ
り、第2図ニに示すように文字、トリミング、チ
ツプ部品色の部分が現われない半田付け部のみの
二値化像12を得ることができる。 Then, store this binarized image 12',
Switch to epi-illumination using light source 4 and fiber ring light guide 2, and take an image again with ITV camera 1.
Similarly, when binarized at a threshold level higher than the brightness of the text, trimming, and chip component color, a binarized image 12 is obtained in which the soldered part of the chip component 11 with an inclination of about 5 degrees or less becomes white, as shown in FIG. 2C. Get ″.
By combining this binarized image 12'' with the previously stored binarized image 12' of horizontally emphasized illumination, the text, trimming, and chip part color portions are created as shown in FIG. A binarized image 12 of only the soldered portions that do not appear can be obtained.
なお、通常の半田状態では半田付け傾斜45度程
度以下の部分が白く出るが、半田付けを光沢の少
ない表面にすることにより、像として検出し得る
最大傾斜を大きくすることができる。 Note that in a normal soldering state, parts with a soldering inclination of about 45 degrees or less appear white, but by soldering to a less glossy surface, the maximum inclination that can be detected as an image can be increased.
以上、合成によつて得た二値化像をもとに基準
点から半田面輪郭部の距離を算出することによ
り、チツプ部品のずれ量を精度よく検査すること
ができる。 As described above, by calculating the distance of the solder surface contour from the reference point based on the binarized image obtained by the synthesis, it is possible to accurately inspect the amount of deviation of the chip component.
(発明の効果)
以上のように本発明にあつては、印刷配線基板
上に実装半田付けされたチツプ部品のずれ量を半
田面の画像から検査する方法において、横方向強
調の光を半田面に照射してテレビカメラで撮像す
ると共に角度のある半田面が白く出る閾値レベル
で二値化した像と、落射強調の光を半田面に照射
してテレビカメラで撮像すると共に平坦な部分の
半田面が白く出る閾値で二値化した像とを合成
し、半田面に忠実な像を構成し、その像を用いて
チツプ部品のずれ量を測定するようにしたので、
(イ) チツプ部品の半田形状に影響されずにチツプ
部品ずれ検査が可能である。(Effects of the Invention) As described above, in the present invention, in a method of inspecting the amount of deviation of a chip component mounted and soldered on a printed wiring board from an image of the solder surface, horizontally emphasized light is applied to the solder surface. A binarized image at a threshold level where angled solder surfaces appear white when illuminated with light and captured with a television camera, and an image of flat portions of solder when illuminated with epi-emphasized light and imaged with a television camera. By combining the binarized image with a threshold value that makes the surface appear white, an image faithful to the solder surface is constructed, and this image is used to measure the amount of deviation of the chip component. (a) Chip component displacement inspection is possible without being affected by solder shape.
(ロ) チツプ部品の色、文字、トリミング等に影響
されずにチツプ部品ずれ検査が可能である。(b) It is possible to inspect the deviation of chip parts without being affected by the color, text, trimming, etc. of the chip parts.
(ハ) チツプ部品ずれ検査精度が向上する。(c) Improved chip component misalignment inspection accuracy.
(ニ) 照明構成が簡単になる。(d) Lighting configuration becomes simpler.
等の効果がある。There are other effects.
第1図は本発明を具体化した検査装置の構成
図、第2図は画像の合成を示す説明図、第3図な
いし第5図は従来の検査方法の説明図である。
1……ITVカメラ、2,3……フアイバリン
グライトガイド、4,5……光源、6……シヤツ
タ、7……拡散板、8……画像処理部、10……
印刷配線基板、11……チツプ部品、12……半
田面、12′……横方向強調照明における半田面
の二値化像、12″……落射照明における半田面
の二値化像、12……合成した半田面の二値化
像。
FIG. 1 is a block diagram of an inspection apparatus embodying the present invention, FIG. 2 is an explanatory diagram showing image composition, and FIGS. 3 to 5 are explanatory diagrams of a conventional inspection method. 1... ITV camera, 2, 3... fiber ring light guide, 4, 5... light source, 6... shutter, 7... diffuser plate, 8... image processing section, 10...
Printed wiring board, 11...Chip component, 12...Solder surface, 12'...Binarized image of the solder surface under lateral emphasis illumination, 12''...Binarized image of the solder surface under epi-illumination, 12... ...Binarized image of the synthesized solder surface.
Claims (1)
部品のずれ量を半田面の画像から検査する方法に
おいて、横方向強調の光を半田面に照射してテレ
ビカメラで撮像すると共に角度のある半田面が白
く出る閾値レベルで二値化した像と、落射強調の
光を半田面に照射してテレビカメラで撮像すると
共に平坦な部分の半田面が白く出る閾値で二値化
した像とを合成し、半田面に忠実な像を構成し、
その像を用いてチツプ部品のずれ量を測定するこ
とを特徴としたチツプ部品ずれ検査方法。1 In a method of inspecting the amount of misalignment of chip components mounted and soldered on a printed wiring board from an image of the solder surface, the solder surface is irradiated with horizontally emphasized light and imaged with a television camera, and the solder surface at an angle is The image is binarized at a threshold level that makes the solder surface appear white, and the image is captured using a TV camera by illuminating the solder surface with epi-illumination-enhanced light, and the image is binarized at a threshold level that makes the solder surface appear white in flat areas. , compose an image faithful to the solder surface,
A chip component deviation inspection method characterized by measuring the amount of chip component deviation using the image.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60135928A JPS61294302A (en) | 1985-06-24 | 1985-06-24 | Chip parts deviation checking method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60135928A JPS61294302A (en) | 1985-06-24 | 1985-06-24 | Chip parts deviation checking method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61294302A JPS61294302A (en) | 1986-12-25 |
| JPH043802B2 true JPH043802B2 (en) | 1992-01-24 |
Family
ID=15163125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60135928A Granted JPS61294302A (en) | 1985-06-24 | 1985-06-24 | Chip parts deviation checking method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61294302A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0660810B2 (en) * | 1987-10-29 | 1994-08-10 | 日本電装株式会社 | Solder image processing device on ceramic substrate |
| JPH0237662A (en) * | 1988-07-27 | 1990-02-07 | Toshiba Battery Co Ltd | Dislocating detection process for insulating ring-shaped thin sheet of battery |
| US4929845A (en) * | 1989-02-27 | 1990-05-29 | At&T Bell Laboratories | Method and apparatus for inspection of substrates |
| JP2504853B2 (en) * | 1990-03-14 | 1996-06-05 | 富士通株式会社 | Land height defect detector |
| JP2550514B2 (en) * | 1992-05-11 | 1996-11-06 | 日本製紙株式会社 | Method for measuring contaminants |
| JP2818347B2 (en) * | 1993-02-18 | 1998-10-30 | 株式会社三協精機製作所 | Appearance inspection device |
-
1985
- 1985-06-24 JP JP60135928A patent/JPS61294302A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61294302A (en) | 1986-12-25 |
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