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JPH0449791B2 - - Google Patents
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JPH0449791B2 - - Google Patents

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Publication number
JPH0449791B2
JPH0449791B2 JP58000662A JP66283A JPH0449791B2 JP H0449791 B2 JPH0449791 B2 JP H0449791B2 JP 58000662 A JP58000662 A JP 58000662A JP 66283 A JP66283 A JP 66283A JP H0449791 B2 JPH0449791 B2 JP H0449791B2
Authority
JP
Japan
Prior art keywords
layer
active layer
current blocking
semiconductor
inp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58000662A
Other languages
Japanese (ja)
Other versions
JPS59125686A (en
Inventor
Isao Kobayashi
Ikuo Mito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP66283A priority Critical patent/JPS59125686A/en
Publication of JPS59125686A publication Critical patent/JPS59125686A/en
Publication of JPH0449791B2 publication Critical patent/JPH0449791B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching
    • H01S5/2277Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 本発明は、光通信等に用いる半導体レーザに関
し、特に活性層への電流の閉じ込めを改善して、
高出力動作を可能にした半導体レーザに関する。
帯状の活性層を、それよりも屈折率が小さく禁制
帯幅の大きな半導体層で囲んだ埋め込みヘテロ構
造半導体レーザ(以下BH LDと略す)は、低い
発振しきい値、安定な発振横モード等のために、
光通信や光情報処理用の光源として実用化されよ
うとしている。このBH LDにおいて良好な特性
を実現するためには、活性層への電流を効果的に
集中して流す必要があり、各種の電流ブロツク構
造が考案されている。その一例として第1図に、
本願の発明者らが考案した二重チヤンネル型プレ
ーナBH LD(以下DC−PBH LDと略す)の断面
図を示す。これは平坦なInP基板1上にn−InP
バツフア層2、InGaAsP活性層3、p−InPクラ
ツド層4を成長させた二重ヘテロ構造(DH)基
板に、2本の平行な溝10,11を形成し、それ
によつて帯状活性層20を形成し、その後、再び
結晶成長を行ない、p−InP電流閉じ込め層5、
p−InP電流閉じ込め層6、p−InP埋め込み層
7、p−InGaAsPコンタクト層8を順次形成し、
p側およびn側の電極30,31を形成したもの
である。このDC−PBH LDにおいては、2本の
溝10,11の外側に、p−n−p−nの層構造
を持つ電流ブロツク構造が形成されている。この
構造中にはもとのDHウエハーのInGaAsP活性層
3が電流阻止層21,22として残されており、
これが電流集中に有効に働くことが確かめられて
いる。すなわち、DC−PBH LDではp−n−p
−nのサイリスタ構造を構成する2種のトランジ
スタのうち、利得の高いn−p−nトランジスタ
のp−InPベースとn−InPエミツタの間に、そ
れらより禁制帯幅の小さいInGaAsP電流阻止層
が挾まれており、これによつてこのトランジスタ
のキヤリア転送効率が大幅に低下し、したがつて
このn−p−nトラジスタの利得が下がる。その
結果、p−n−p−nサイリスタ構造はターン・
オンしにくくなり、電流が有効に活性領域へ集中
する。一般に、半導体レーザの活性層の厚さは、
低しきい値、低垂直放射角等を実現するためにか
なり薄く形成される。例えば、従来のDC−PBH
LDでは0.1μm程度にとられている。従来のDC−
PBH LDでは電流ブロツク構造中に活性層と同
じ組成、同じ厚さの電流阻止層が形成されるため
に、電流阻止層の厚さは有効な電流閉じ込めを実
現するために不十分で、そのため高注入励起レベ
ルでこのp−n−p−nサイリスタがターン・オ
ンしてしまうことが多く、高出力動作がやや困難
であつた。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor laser used for optical communication, etc., and in particular improves current confinement in an active layer.
This invention relates to a semiconductor laser that enables high-output operation.
A buried heterostructure semiconductor laser (hereinafter referred to as BH LD), in which a band-shaped active layer is surrounded by a semiconductor layer with a smaller refractive index and a larger forbidden band width, has features such as a low lasing threshold and stable oscillation transverse mode. for,
It is about to be put into practical use as a light source for optical communications and optical information processing. In order to achieve good characteristics in this BH LD, it is necessary to effectively concentrate and flow current to the active layer, and various current blocking structures have been devised. As an example, Figure 1 shows
1 is a cross-sectional view of a dual channel planar BH LD (hereinafter abbreviated as DC-PBH LD) devised by the inventors of the present application. This is n-InP on a flat InP substrate 1.
Two parallel grooves 10 and 11 are formed in a double heterostructure (DH) substrate on which a buffer layer 2, an InGaAsP active layer 3, and a p-InP cladding layer 4 are grown, thereby forming a band-shaped active layer 20. After that, crystal growth is performed again to form a p-InP current confinement layer 5,
A p-InP current confinement layer 6, a p-InP buried layer 7, and a p-InGaAsP contact layer 8 are sequentially formed,
P-side and n-side electrodes 30 and 31 are formed. In this DC-PBH LD, a current blocking structure having a pn-pn layer structure is formed outside the two grooves 10 and 11. In this structure, the InGaAsP active layer 3 of the original DH wafer remains as current blocking layers 21 and 22.
It has been confirmed that this works effectively for current concentration. That is, in DC-PBH LD, p-n-p
Of the two types of transistors that make up the -n thyristor structure, an InGaAsP current blocking layer with a narrower bandgap is placed between the p-InP base and n-InP emitter of the higher gain n-p-n transistor. This significantly reduces the carrier transfer efficiency of this transistor and thus reduces the gain of this npn transistor. As a result, the p-n-p-n thyristor structure
It becomes difficult to turn on, and current is effectively concentrated in the active region. Generally, the thickness of the active layer of a semiconductor laser is
It is made fairly thin to achieve low thresholds, low vertical radiation angles, etc. For example, conventional DC-PBH
In LD, it is set to about 0.1 μm. Conventional DC−
In PBH LD, a current blocking layer with the same composition and same thickness as the active layer is formed in the current blocking structure, so the thickness of the current blocking layer is insufficient to realize effective current confinement, and therefore high This p-n-p-n thyristor often turns on at the injection excitation level, making high output operation somewhat difficult.

本発明の半導体レーザは、帯状の活性層と、こ
の活性層より屈折率が小さく禁制帯幅が大きくこ
の活性層の少なくとも長手方向の両側及び上下面
を囲む半導体層と、前記活性層の両側を囲む前記
半導体層の前記長手方向外側に接して形成してあ
るpnpn電流ブロツク構造の多層半導体層とを有
し、前記pnpn電流ブロツク構造多層半導体層の
1つのpn接合部に、前記活性層と同一の過程で
形成され、かつ前記活性層よりも膜厚が厚い電流
阻止層が形成されていることを特徴とする。
The semiconductor laser of the present invention includes a band-shaped active layer, a semiconductor layer having a smaller refractive index and a larger forbidden band width than the active layer, and surrounding at least both longitudinal sides and upper and lower surfaces of the active layer; a multilayer semiconductor layer having a pnpn current blocking structure formed in contact with the outer side in the longitudinal direction of the surrounding semiconductor layer, and having a pn junction portion of the multilayer semiconductor layer having the pnpn current blocking structure that is the same as the active layer. The present invention is characterized in that a current blocking layer is formed in the process of step 1 and is thicker than the active layer.

または上記の半導体レーザにおいて、前記各半
導体層が形成してある基板の底面と前記活性層と
の距離はその底面と前記電流阻止層との距離より
大きいことを特徴とする。
Alternatively, in the above semiconductor laser, the distance between the bottom surface of the substrate on which each of the semiconductor layers is formed and the active layer is larger than the distance between the bottom surface and the current blocking layer.

以下図面を参照して本発明を詳しく説明する。
第2図は本発明の望ましい実施例の断面図、第3
図a,b及びcはその実施例の製作工程における
3つの段階を示す断面図である。この実施例では
電流阻止層21,22は、帯状活性層20よりも
厚くなつており、高注入励起レベルにおいてもp
−n−p−nサイリスタはターン・オンせず、有
効な電流閉じ込めが行なわれることが確かめら
れ、従来のDC−PBH LDよりも高出力動作が可
能であつた。この実施例の製造方法を第3図a,
b及びcをもとに説明する。
The present invention will be described in detail below with reference to the drawings.
FIG. 2 is a sectional view of a preferred embodiment of the present invention;
Figures a, b and c are cross-sectional views showing three stages in the fabrication process of the embodiment. In this embodiment, the current blocking layers 21 and 22 are thicker than the band-shaped active layer 20, and the p
It was confirmed that the -npn thyristor did not turn on, effective current confinement was performed, and higher output operation was possible than the conventional DC-PBH LD. The manufacturing method of this embodiment is shown in Figure 3a,
The explanation will be based on b and c.

まず、(001)InP基板1に、フオトリソグラフ
イ法と塩酸系のエツチヤントによる化学エツチン
グ法とにより、上部の幅約5μm、高さ1μmで、<
110>方位のメサストライプ40を形成する。次
いで、液相成長法により、この基板1上にn−
InPバツフア層2、InGaAsP活性層3、p−InP
クラツド層4を順次成長させ、二重ヘテロ構造結
晶41を作る。n−InPバツフア層2およびp−
InPクラツド層4の成長は過飽和度を約8℃とつ
たスーパークーリング法で、活性層3の成長は溶
液中にInPの結晶が溶けきれずに浮んでいるいわ
ゆる二相溶液法で行なつた。層2,3,4の厚さ
は、メサストライプ40以外の部分でそれぞれ
2μm、0.3μm、1μmとなるようにした。このと
き、メサストライプ40の上面では、層2,3,
4の厚さは、それぞれ、1.5μm、0.1μm、0.7μm
となつた。すなわち、過飽和度が比較的小さい二
相溶液法で成長する場合、メサストライプの上の
成長速度はそれ以外の平坦部での成長速度よりも
著しく小さくなる。本実施例で、この性質を利用
して、厚さの異なるInGaAsP層を一回の結晶成
長過程で作製した。このとき、帯状活性層20と
なる部分はメサストライプ40の上に形成される
ので、電流阻止層21,22となる部分よりも基
板1から遠い位置に形成されている。
First, a (001) InP substrate 1 was etched by photolithography and a chemical etching method using a hydrochloric acid-based etchant so that the upper part had a width of about 5 μm and a height of 1 μm.
A mesa stripe 40 with an orientation of 110> is formed. Next, n- is deposited on this substrate 1 by a liquid phase growth method.
InP buffer layer 2, InGaAsP active layer 3, p-InP
The cladding layers 4 are sequentially grown to form a double heterostructure crystal 41. n-InP buffer layer 2 and p-
The InP cladding layer 4 was grown by a supercooling method with a supersaturation degree of about 8° C., and the active layer 3 was grown by a so-called two-phase solution method in which InP crystals were not completely dissolved but floated in the solution. The thicknesses of layers 2, 3, and 4 are respectively different in areas other than mesa stripe 40.
The thicknesses were set to 2 μm, 0.3 μm, and 1 μm. At this time, on the upper surface of the mesa stripe 40, layers 2, 3,
The thickness of 4 is 1.5 μm, 0.1 μm, and 0.7 μm, respectively.
It became. That is, when growing using a two-phase solution method with a relatively low degree of supersaturation, the growth rate on the mesa stripe is significantly lower than the growth rate on the other flat areas. In this example, this property was utilized to fabricate InGaAsP layers with different thicknesses in a single crystal growth process. At this time, since the portion that will become the band-shaped active layer 20 is formed on the mesa stripe 40, it is formed at a position farther from the substrate 1 than the portions that will become the current blocking layers 21 and 22.

次に、やはり、フオトリソグラフイ法と、ブロ
ム・メタノールエツチヤントを用いた化学エツチ
ング法とを用いて、前述の二重ヘテロ構造結晶4
1に2本の平行な溝10,11を形成する。この
とき、第3図cに点線で示したエツチング前の結
晶41表面の形状と、エツチング後の溝10,1
1との位置関係を定める。すなわち、2本の溝1
0,11に挾まれた帯状活性層20を含む活性層
メサストライプ23は、もとのメサストライプ4
0部分のほぼ中央に来るように、しかも2本の溝
10,11は、二重ヘテロ構造結晶41のメサス
トライプ40以外の部分にまで届くようにする。
この後、再び結晶成長炉に入れ、p−InPおよび
n−InPの電流閉じ込め層5,6、p−InP埋め
込み層7、p−InGaAsPコンタクト層8を順次
に二相溶液法で成長する。このとき、各層の成長
時間を適切に設定することにより、前二者5,6
は活性層メサストライプ23の上面には成長せ
ず、後二者7,8は結晶表面全体にわつてて成長
させることが可能である。層5,6,7,8の厚
さは、平坦部でそれぞれ0.5μm、0.5μm、1.5μm、
0.7μmとした。これに続いて成長表面にp側電極
30、基板1を研磨で薄くした後n柄電極31を
蒸着して合金化し、へき開、スクライビング等で
ペレツトに切り出して第2図に断面を示したよう
な素子の製作が完了する。第4図は、本発明の実
施例のパルス電流−光出力特性と、従来のDC−
PBH LDのパルス電流−光出力特性の一例を示
す。本発明の実施例の光出力は曲線50で示され
るように、片面からの光出力150mW以上が得ら
れているのに対して、第1図の従来素子の特性は
曲線51で示されるように、約100mWで出力飽
和が激しくなり、これ以上の高出力動作は不可能
である。これは、本発明の実施例では、電流ブロ
ツク構造中の電流阻止層21,22の厚さが、従
来のものよりも厚いために、このp−n−p−n
サイリスタ構造がより高い励起レベルまでター
ン・オンすることがなくなつたために、高注入励
起状態でも帯状活性層20以外へ流れるもれ電流
が大幅に減少したためである。本発明では、メサ
ストライプ基板上に二重ヘテロ構造を形成するこ
とにより、帯状活性層20と電流阻止層21,2
2を同時に、しかも前者を良好な横モード安定
性、低しきい値が得られるように十分に薄くし、
かつ後者を厚く形成することを可能にしているの
で、従来のBH LDとほぼ同程度の工数で高出力
特性が大幅に改善されたBH LDが実現できた。
Next, the above-mentioned double heterostructure crystal 4 was etched using a photolithography method and a chemical etching method using a bromine-methanol etchant.
Two parallel grooves 10 and 11 are formed in 1. At this time, the shape of the surface of the crystal 41 before etching shown by the dotted line in FIG.
Determine the positional relationship with 1. That is, two grooves 1
The active layer mesa stripe 23 including the band-shaped active layer 20 sandwiched between
The two grooves 10 and 11 are arranged so as to be located approximately at the center of the 0 portion, and the two grooves 10 and 11 reach to a portion of the double heterostructure crystal 41 other than the mesa stripe 40.
Thereafter, it is placed in the crystal growth furnace again, and p-InP and n-InP current confinement layers 5, 6, p-InP buried layer 7, and p-InGaAsP contact layer 8 are grown in sequence by a two-phase solution method. At this time, by appropriately setting the growth time of each layer, the former two
does not grow on the upper surface of the active layer mesa stripe 23, and the latter two 7 and 8 can grow over the entire crystal surface. The thicknesses of layers 5, 6, 7, and 8 are 0.5 μm, 0.5 μm, and 1.5 μm at the flat portion, respectively.
It was set to 0.7 μm. Subsequently, a p-side electrode 30 is placed on the growth surface, and after thinning the substrate 1 by polishing, an n-shaped electrode 31 is deposited and alloyed, and the pellet is cut out by cleaving, scribing, etc., and the cross section is shown in FIG. The fabrication of the element is completed. FIG. 4 shows the pulse current-light output characteristics of the embodiment of the present invention and the conventional DC-light output characteristics.
An example of the pulse current vs. optical output characteristics of a PBH LD is shown. As shown by the curve 50, the optical output of the embodiment of the present invention is 150 mW or more from one side, whereas the characteristics of the conventional element in FIG. 1 are as shown by the curve 51. , output saturation becomes severe at about 100 mW, and higher output operation is impossible. This is because, in the embodiment of the present invention, the current blocking layers 21 and 22 in the current blocking structure are thicker than the conventional one.
This is because the thyristor structure is no longer turned on to a higher excitation level, so that the leakage current flowing to areas other than the band-shaped active layer 20 is significantly reduced even in a highly implanted excitation state. In the present invention, by forming a double heterostructure on a mesa stripe substrate, the strip-shaped active layer 20 and the current blocking layers 21, 2
2 at the same time, and the former is made thin enough to provide good transverse mode stability and low threshold;
Moreover, since the latter can be formed thickly, a BH LD with significantly improved high-output characteristics can be realized with approximately the same number of man-hours as a conventional BH LD.

以上詳述したように、本発明によれば、高注入
励起レベルでも電流閉じ込め機能が有効に働き、
高出力動作が可能な半導体レーザが提供できる。
As detailed above, according to the present invention, the current confinement function works effectively even at high injection excitation levels,
A semiconductor laser capable of high output operation can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の埋め込み構造半導体レーザの断
面図、第2図は本発明の望ましい実施例の断面
図、第3図a,b及びcはこの実施例の製造工程
の3つの段階における結晶をそれぞれ示す断面
図、第4図はパルス電流−光出力特性図である。 1……基板、2……バツフア層、3……活性
層、4……クラツド層、5,6……電流閉じ込め
層、7……埋め込み層、8……コンタクト層、1
0,11……溝、20……帯状活性層、21,2
2……電流阻止層、23……活性層メサストライ
プ、30,31……電極、40……メサストライ
プ、41……二重ヘテロ構造結晶。
FIG. 1 is a cross-sectional view of a conventional buried structure semiconductor laser, FIG. 2 is a cross-sectional view of a preferred embodiment of the present invention, and FIGS. The respective cross-sectional views and FIG. 4 are pulse current-light output characteristic diagrams. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Buffer layer, 3...Active layer, 4...Clad layer, 5, 6...Current confinement layer, 7...Buried layer, 8...Contact layer, 1
0,11...Groove, 20...Striped active layer, 21,2
2... Current blocking layer, 23... Active layer mesa stripe, 30, 31... Electrode, 40... Mesa stripe, 41... Double heterostructure crystal.

Claims (1)

【特許請求の範囲】 1 帯状の活性層と、この活性層より屈折率が小
さく禁制帯幅が大きくこの活性層の少なくとも長
手方向の両側及び上下面を囲む半導体層と、前記
活性層の両側を囲む前記半導体層の前記長手方向
外側に接して形成してあるpnpn電流ブロツク構
造の多層半導体層とを有し、前記pnpn電流ブロ
ツク構造多層半導体層の1つのpn接合部に、前
記活性層と同一の過程で形成され、かつ前記活性
層よりも膜厚が厚い電流阻止層が形成されている
ことを特徴とする半導体レーザ。 2 前項記載の半導体レーザにおいて、前記各半
導体層が形成してある基板の底面と前記活性層と
の距離はその底面と前記電流阻止層との距離より
大きいことを特徴とする特許請求の範囲第1項記
載の半導体レーザ。
[Scope of Claims] 1. A band-shaped active layer, a semiconductor layer having a smaller refractive index and a larger forbidden band width than this active layer, surrounding at least both longitudinal sides and upper and lower surfaces of this active layer, a multilayer semiconductor layer having a pnpn current blocking structure formed in contact with the outer side in the longitudinal direction of the surrounding semiconductor layer, and having a pn junction portion of the multilayer semiconductor layer having the pnpn current blocking structure that is the same as the active layer. 1. A semiconductor laser characterized in that a current blocking layer is formed in the process described above and is thicker than the active layer. 2. In the semiconductor laser described in the preceding paragraph, the distance between the bottom surface of the substrate on which each of the semiconductor layers is formed and the active layer is greater than the distance between the bottom surface and the current blocking layer. The semiconductor laser according to item 1.
JP66283A 1983-01-06 1983-01-06 Semiconductor laser Granted JPS59125686A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP66283A JPS59125686A (en) 1983-01-06 1983-01-06 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP66283A JPS59125686A (en) 1983-01-06 1983-01-06 Semiconductor laser

Publications (2)

Publication Number Publication Date
JPS59125686A JPS59125686A (en) 1984-07-20
JPH0449791B2 true JPH0449791B2 (en) 1992-08-12

Family

ID=11479932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP66283A Granted JPS59125686A (en) 1983-01-06 1983-01-06 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS59125686A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62230078A (en) * 1986-03-31 1987-10-08 Nec Corp Buried semiconductor laser
JPS63215090A (en) * 1987-03-04 1988-09-07 Matsushita Electric Ind Co Ltd semiconductor laser equipment

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5712580A (en) * 1980-06-26 1982-01-22 Nec Corp Manufacture of semiconductor light-emitting device

Also Published As

Publication number Publication date
JPS59125686A (en) 1984-07-20

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