JPH0680861B2 - Method for manufacturing semiconductor light emitting device - Google Patents
Method for manufacturing semiconductor light emitting deviceInfo
- Publication number
- JPH0680861B2 JPH0680861B2 JP741986A JP741986A JPH0680861B2 JP H0680861 B2 JPH0680861 B2 JP H0680861B2 JP 741986 A JP741986 A JP 741986A JP 741986 A JP741986 A JP 741986A JP H0680861 B2 JPH0680861 B2 JP H0680861B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- layer
- active layer
- indium
- emitting portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Description
【発明の詳細な説明】 〔概要〕 基板上に設けられインジウムを含むIII−V族混晶の活
性層の上にインジウム燐結晶層またはインジウムと燐を
主成分にするIII−V族混晶層を有する埋込み形半導体
発光装置の製造において、 活性層が含まれる帯状の逆メサ形状を形成した後、臭化
水素と過酸化水素と水との混合液をエッチング液にして
逆メサ形状の側面を整形することにより、 活性層の側面の結晶面方位が(111)Aにならないよう
にしたものである。DETAILED DESCRIPTION [Outline] An indium phosphorus crystal layer or a III-V group mixed crystal layer containing indium and phosphorus as a main component on an active layer of a III-V group mixed crystal containing indium provided on a substrate. In the manufacture of a buried semiconductor light emitting device having a structure, after forming a band-shaped reverse mesa shape including an active layer, a mixed solution of hydrogen bromide, hydrogen peroxide and water is used as an etching solution to remove the side surface of the reverse mesa shape. By shaping, the crystal plane orientation of the side surface of the active layer is prevented from being (111) A.
本発明は、基板上に設けられインジウムを含むIII−V
族混晶の活性層の上にインジウム燐結晶層またはインジ
ウムと燐を主成分にするIII−V族混晶層を有する埋込
み形半導体発光装置の製造方法に係り、特に、その発光
部の製造方法に関す。The present invention is directed to a III-V containing indium provided on a substrate.
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an embedded semiconductor light emitting device having an indium phosphorus crystal layer or a group III-V mixed crystal layer containing indium and phosphorus as a main component on an active layer of a group mixed crystal. Concern
上記に類する半導体発光装置には、例えばBH(Buried H
eterostructure)レーザなどがある。Semiconductor light emitting devices similar to the above include, for example, BH (Buried H
There is a laser.
そしてBHレーザの類のレーザは、発振しきい値電流が比
較的小さい特徴から光通信などの光信号源として用いら
れるが、発振しきい値電流の一層の低減が望まれてい
る。A laser such as a BH laser is used as an optical signal source for optical communication because of its relatively small oscillation threshold current, and further reduction of the oscillation threshold current is desired.
第2図は従来のBHレーザ例の模式側断面図である。 FIG. 2 is a schematic side sectional view of a conventional BH laser example.
同図において、1はn型インジウム燐(InP)の基板、
2はn型InPのバッフア層、3は発光領域となるインジ
ウムガリウム砒素燐(InGaAsP)の活性層、4はp型InP
のクラッド層、5はクラッド層4と活性層3とバッフア
層2とで帯状(図面に垂直な方向が長手方向になる)の
逆メサ形状をなす発光部、6はp型InPの電流阻止層、
7はn型InPの電流阻止層、8は二酸化シリコン(Si
O2)の絶縁層、9と10は金属の電極、である。In the figure, 1 is an n-type indium phosphide (InP) substrate,
Reference numeral 2 is an n-type InP buffer layer, 3 is an active layer of indium gallium arsenide phosphide (InGaAsP) which becomes a light emitting region, and 4 is p-type InP.
Of the clad layer 5, the clad layer 4, the active layer 3, and the buffer layer 2 form a strip-shaped (the direction perpendicular to the drawing is the longitudinal direction) inverted mesa shape light emitting portion, and 6 is a p-type InP current blocking layer. ,
7 is an n-type InP current blocking layer, 8 is silicon dioxide (Si
An insulating layer of O 2 ), 9 and 10 are metal electrodes.
このレーザは、電極9から電極10に向けて電流を流す
と、電流阻止層6と7が形成する逆方向のP-N接合の存
在により、電流が発光部5に集中する。そしてその電流
を或る値(発振しきい値電流)以上に大きくすると、レ
ーザ発振を起こし活性層3からレーザ光を発する。In this laser, when a current is passed from the electrode 9 to the electrode 10, the current is concentrated in the light emitting section 5 due to the existence of the PN junction in the opposite direction formed by the current blocking layers 6 and 7. When the current is increased to a certain value (oscillation threshold current) or more, laser oscillation occurs and laser light is emitted from the active layer 3.
このレーザの製造手順は第3図の工程順側断面図(a)
〜(c)の如くである。The manufacturing procedure of this laser is shown in FIG.
~ (C).
即ち〔図(a)参照〕、基板1上全面に、バッフア層
2、活性層3、クラッド層4、を例えば液相成長法で堆
積する。That is, as shown in FIG. 3A, the buffer layer 2, the active layer 3, and the cladding layer 4 are deposited on the entire surface of the substrate 1 by, for example, a liquid phase growth method.
次いで〔図(b)参照〕、上面の発光部5形成領域にSi
O2のマスク11を形成した後、ブロムメタノールをエッチ
ング液にして活性層3が側面に表出するまでエッチング
し発光部5を形成する。Then [see FIG. 2B], Si is formed on the upper surface of the light emitting portion 5 forming region.
After the O 2 mask 11 is formed, the light emitting portion 5 is formed by etching using bromine methanol as an etching solution until the active layer 3 is exposed on the side surface.
次いで〔図(c)参照〕、マスク11をそのままにして例
えば液相成長法により電流阻止層6と7を堆積する。Next (see FIG. 7C), the current blocking layers 6 and 7 are deposited by, for example, a liquid phase growth method while leaving the mask 11 as it is.
次いで〔第2図参照〕、マスク11を除去した後、絶縁層
8、電極9と10を形成し劈開して完成する。Next, referring to FIG. 2, after removing the mask 11, the insulating layer 8 and the electrodes 9 and 10 are formed and cleaved to complete.
このように製造されたBHレーザは、発光部5側面の結晶
面方位が(111)Aになっている。In the BH laser manufactured as described above, the crystal plane orientation of the side surface of the light emitting portion 5 is (111) A.
そしてこの(111)A面には酸化され易いインジウム(I
n)が出るため、発光部5は、側面に酸化膜が形成され
て電流阻止層6や7との界面に欠陥が生じている。The indium (I
Since n) is generated, an oxide film is formed on the side surface of the light emitting portion 5, and a defect occurs at the interface with the current blocking layers 6 and 7.
このため先に述べた電流を流した際に、発光部5に集中
する電流の一部が上記界面を流れて発光に寄与しなくな
り、発振しきい値電流が大きくなる問題がある。For this reason, when the above-mentioned current is passed, a part of the current concentrated in the light emitting portion 5 flows through the interface and does not contribute to light emission, and there is a problem that the oscillation threshold current becomes large.
この問題を解決するためには、発光部5の側面特に活性
層3の側面が、(111)A面にならないようにすれば良
いことが知られている。In order to solve this problem, it is known that the side surface of the light emitting portion 5, especially the side surface of the active layer 3 should not be the (111) A plane.
この方策として発光部を形成する際のエッチング液に臭
化水素(HBr)と過酸化水素(H2O2)と水(H2O)との
混合液を用いることが提案された。As a measure for this, it has been proposed to use a mixed solution of hydrogen bromide (HBr), hydrogen peroxide (H 2 O 2 ) and water (H 2 O) as an etching solution for forming the light emitting portion.
しかしながらこの方法は、発光部が第4図図示5aの如く
になり、活性層3の幅W1より発光部5a上面の幅W2が狭く
なり過ぎて、幅W1を所望の幅例えば1.5μm程度に形成
することが困難である問題がある。However, in this method, the light emitting portion is as shown in FIG. 5a, and the width W2 of the upper surface of the light emitting portion 5a becomes too narrower than the width W1 of the active layer 3 to form the width W1 to a desired width, for example, about 1.5 μm. There is a problem that is difficult to do.
〔問題点を解決するための手段〕 上記問題点は、半導体基板上にInを含むIII-V族混晶の
発光領域となる活性層を且つその上にInP結晶層またはI
nと燐(P)を主成分にするIII-V族混晶層を堆積し、該
結晶層または該混晶層側からエッチングして該活性層が
含まれる帯状の逆メサ形状を形成した後、HBrとH2O2とH
2Oとの混合液をエッチング液にして該逆メサ形状の側
面を整形する本発明の製造方法によって解決される。[Means for Solving Problems] The above problem is that an active layer to be a light emitting region of a III-V mixed crystal containing In is formed on a semiconductor substrate and an InP crystal layer or I layer is formed on the active layer.
After depositing a III-V group mixed crystal layer containing n and phosphorus (P) as main components and etching from the crystal layer or the mixed crystal layer side to form a band-shaped inverted mesa shape including the active layer , HBr and H 2 O 2 and H
This is solved by the manufacturing method of the present invention in which a mixed solution with 2 O is used as an etching solution to shape the side surface of the inverted mesa shape.
HBrとH2O2とH2との混合液は、InP結晶またはInとPを主
成分にするIII-V族混晶などに対してエッチングされた
面を(111)A面にしないエッチング液である。A mixed solution of HBr, H 2 O 2 and H 2 is an etching solution which does not form a (111) A surface as an etched surface for InP crystals or III-V group mixed crystals containing In and P as a main component. Is.
従って上記逆メサ形状の側面が(111)A面に形成され
ても上記混合液によるエッチングを追加して発光部を形
成することにより、発光部の側面が(111)A面でない
面となり、然も該エッチングは、逆メサ形状の処に施す
ので、先に述べた幅W2が幅W1より狭くなり過ぎる問題を
引き起こすことがない。Therefore, even if the side surface of the inverted mesa shape is formed on the (111) A surface, the side surface of the light emitting portion becomes a surface other than the (111) A surface by adding the etching with the mixed solution to form the light emitting portion. Also, since the etching is performed in the reverse mesa shape, the above-mentioned problem that the width W2 becomes too narrower than the width W1 does not occur.
かくして例えば、所望の幅の活性層を有し且つしきい値
電流を低減させたBHレーザの製造が可能になる。Thus, for example, it becomes possible to manufacture a BH laser having an active layer having a desired width and having a reduced threshold current.
以下、第1図の工程順側断面図(a)〜(d)を用い本
発明方法実施例について説明する。全図を通じ同一符号
は同一対象物を示す。Hereinafter, an embodiment of the method of the present invention will be described with reference to FIGS. The same reference numerals denote the same objects throughout the drawings.
この実施例の対象は第2図図示に対応するBHレーザであ
る。The object of this embodiment is a BH laser corresponding to that shown in FIG.
即ち〔図(a)参照〕、n型InPの基板1上全面に、n
型InPのバッフア層2(厚さ約2μm)、InGaAsPの活性
層3(厚さ約0.2μm)、p型InPのクラッド層4(厚さ
約1μm)、p型InGaAsPのキャップ層12(厚さ約0.2μ
m)、を例えば液相成長法で堆積する。That is, [see FIG. 7A], n is formed on the entire surface of the n-type InP substrate 1.
Type InP buffer layer 2 (thickness about 2 μm), InGaAsP active layer 3 (thickness about 0.2 μm), p-type InP clad layer 4 (thickness about 1 μm), p-type InGaAsP cap layer 12 (thickness) About 0.2μ
m) is deposited by, for example, a liquid phase growth method.
次いで〔図(b)参照〕、第3図図示従来例の場合と同
様に、マスク11を形成した後ブロムメタノールを用いて
エッチングし活性層3が側面に表出する発光部5を形成
する。従来例ではこの発光部5をもって発光部完成とし
たが、側面が(111)A面であるので、本実施例では次
のエッチングを追加している。Next, as shown in FIG. 3B, as in the case of the conventional example shown in FIG. 3, a mask 11 is formed and then etching is performed using bromine methanol to form a light emitting portion 5 in which the active layer 3 is exposed on the side surface. In the conventional example, the light emitting section 5 is completed, but the side surface is the (111) A plane, so the following etching is added in this embodiment.
次いで〔図(c)参照〕、マスク11をそのままにし、HB
rとH2O2とH2Oとの混合液(47wt%のHBrが4cc、31wt%
のH2O2が2cc、H2Oが20cc、の割合)を用いて、発光部
5下部の括部が僅かにエッチングされる程度に(例えば
常温で約1分間)エッチングし、発光部5bを形成する。
発光部5bの側面は(111)A面が消えて略垂直になる。
本実施例ではこの発光部5aが発光部完成となる。Then, referring to FIG. (C), the mask 11 is left as it is and HB
Mixture of r, H 2 O 2 and H 2 O (47 wt% HBr 4cc, 31 wt%
H 2 O 2 of 2 cc and H 2 O of 20 cc) are used to slightly etch the constricted portion under the light emitting portion 5 (for example, at room temperature for about 1 minute). To form.
The side surface of the light emitting portion 5b becomes almost vertical with the (111) A plane disappearing.
In this embodiment, the light emitting section 5a is completed.
次いで〔図(d)参照〕、従来例の場合と同様に、マス
ク11をそのままにして例えば液相成長法により電流阻止
層6と7を堆積する。マスク11の両側が発光部5aの外側
に張り出しているにもかかわらず、電流阻止層6と7は
発光部5aの両外側を十分に埋める。Then, as shown in FIG. 6D, the current blocking layers 6 and 7 are deposited by, for example, a liquid phase epitaxy method while leaving the mask 11 as in the case of the conventional example. Despite both sides of the mask 11 projecting to the outside of the light emitting portion 5a, the current blocking layers 6 and 7 sufficiently fill both outsides of the light emitting portion 5a.
次いで〔第2図参照〕、従来例の場合と同様に、マスク
11を除去した後、絶縁層8、電極9と10を形成し劈開し
て完成する。Then, [see FIG. 2], as in the case of the conventional example, a mask
After removing 11, the insulating layer 8 and the electrodes 9 and 10 are formed and cleaved to complete.
本願発明者は、上記実施例の方法と第3図図示従来例の
方法とにより、活性層3の寸法が略等しいBHレーザを製
造して比較した。その結果前者のしきい値電流は、約15
mAとなり後者の約30mAに比して略1/2に低減しているこ
とを確認した。The inventor of the present application manufactured and compared BH lasers in which the dimensions of the active layer 3 were substantially equal by the method of the above-described embodiment and the method of the conventional example shown in FIG. As a result, the former threshold current is about 15
It was confirmed that the value was mA, which was reduced to about 1/2 of the latter value of about 30 mA.
なお上記実施例では、第1図(c)図示のエッチングの
際のマスクにマスク11を使用して然も発光部5bの側面が
略垂直になるように、エッチングレートがクラッド層4
より大きなキャップ層12を設けたが、本発明の主旨は、
発光部5bの側面に(111)A面が現れず且つ上面の幅が
狭くなり過ぎないようにするところにあり、発光部5bの
側面は必ずしも垂直でなくとも支障ないことから、キャ
ップ層12が無くとも良く、また上記エッチングに際して
マスク11と幅が異なる別のマスクを用いても良い。In the above embodiment, the mask 11 is used as a mask for the etching shown in FIG. 1C, and the etching rate is set so that the side surface of the light emitting portion 5b is substantially vertical.
Although a larger cap layer 12 is provided, the gist of the present invention is
Since the (111) A plane does not appear on the side surface of the light emitting portion 5b and the width of the upper surface does not become too narrow, the side surface of the light emitting portion 5b does not have to be vertical, so there is no problem. It may not be necessary, and another mask having a width different from that of the mask 11 may be used for the above etching.
また、上記実施例の活性層3の材料はInGaAsPであった
が、Inを含むIII-V族混晶であるならば他の材料例えば
アルミニウムガリウムインジウム砒素(AiGaInAs)など
であっても、本発明が有効であることは容易に類推出来
る。Further, the material of the active layer 3 in the above embodiment is InGaAsP, but other materials such as aluminum gallium indium arsenide (AiGaInAs) may be used as long as it is a III-V mixed crystal containing In. Can be easily inferred to be effective.
以上説明したように本発明の構成によれば、基板上に設
けられインジウムを含むIII-V族混晶の活性層の上にイ
ンジウム燐結晶層またはインジウムと燐を主成分にする
III-V族混晶層を有する埋込み形半導体発光装置の製造
において、活性層を所望の幅にし且つその側面の結晶面
方位が(111)Aにならないようにすることが出来て、
例えばBHレーザのしきい値電流を低減させる製造を可能
にさせる効果がある。As described above, according to the configuration of the present invention, an indium phosphide crystal layer or indium and phosphorus as main components is provided on a III-V group mixed crystal active layer containing indium provided on a substrate.
In manufacturing a buried type semiconductor light emitting device having a III-V group mixed crystal layer, it is possible to make the active layer have a desired width and prevent the crystal plane orientation of its side surface from being (111) A.
For example, it has an effect of enabling the manufacture in which the threshold current of the BH laser is reduced.
第1図は本発明方法実施例の工程順側断面図(a)〜
(d)、 第2図は従来のBHレーザ例の模式側断面図、 第3図は第2図図示レーザ製造の工程順側断面図(a)
〜(c)、 第4図は改良提案された製造方法の説明図、である。 図において、 1は基板、 2はバッフア層、 3は活性層、 4はクラッド層、 5、5a、5bは発光部、 6、7は電流阻止層、 8は絶縁層、 9、10は電極、 11はマスク、 12はキャップ層、 である。FIG. 1 is a sectional view (a) of a process sequence of an embodiment of the method of the present invention.
(D), FIG. 2 is a schematic side sectional view of an example of a conventional BH laser, and FIG. 3 is a sectional side view in the order of steps of laser production shown in FIG. 2 (a).
(C), FIG. 4 is an explanatory view of the improved and proposed manufacturing method. In the figure, 1 is a substrate, 2 is a buffer layer, 3 is an active layer, 4 is a cladding layer, 5 is a light emitting part, 5a and 5b is a current blocking layer, 8 is an insulating layer, 9 and 10 are electrodes, 11 is a mask and 12 is a cap layer.
Claims (1)
族混晶の発光領域となる活性層を且つその上にインジウ
ム燐結晶層またはインジウムと燐を主成分にするIII−
V族混晶層を堆積し、該結晶層または該混晶層側からエ
ッチングして該活性層が含まれる帯状の逆メサ形状を形
成した後、臭化水素と過酸化水素と水との混合液をエッ
チング液にして該逆メサ形状の側面を整形することを特
徴とする半導体発光装置の製造方法。1. III-V containing indium on a semiconductor substrate
An active layer which becomes a light-emitting region of a group mixed crystal and on which an indium phosphide crystal layer or indium and phosphorus as the main components III-
A group V mixed crystal layer is deposited and etched from the crystal layer or the mixed crystal layer side to form a band-shaped inverted mesa shape including the active layer, and then hydrogen bromide, hydrogen peroxide and water are mixed. A method of manufacturing a semiconductor light emitting device, characterized in that a liquid is used as an etching liquid to shape the side surface of the inverted mesa shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP741986A JPH0680861B2 (en) | 1986-01-17 | 1986-01-17 | Method for manufacturing semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP741986A JPH0680861B2 (en) | 1986-01-17 | 1986-01-17 | Method for manufacturing semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62165988A JPS62165988A (en) | 1987-07-22 |
| JPH0680861B2 true JPH0680861B2 (en) | 1994-10-12 |
Family
ID=11665349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP741986A Expired - Lifetime JPH0680861B2 (en) | 1986-01-17 | 1986-01-17 | Method for manufacturing semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0680861B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04340287A (en) * | 1991-01-22 | 1992-11-26 | Shin Etsu Handotai Co Ltd | Manufacture of light emitting element and evaluating method therefor |
-
1986
- 1986-01-17 JP JP741986A patent/JPH0680861B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62165988A (en) | 1987-07-22 |
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| JPS61150393A (en) | Semiconductor laser and manufacture thereof | |
| JPS6344311B2 (en) | ||
| JPH0449791B2 (en) | ||
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