JPH0455535B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for manufacturing semiconductor chip carriers such as pin grid arrays (PGA) and leadless chip carriers (LCC).

[Background Art] Conventionally, semiconductor chips have been mounted using printed wiring boards as chip carriers. In this case, in the case of a multilayer printed wiring board, as shown in FIG. 3, an inner layer circuit is formed on the surface of a plurality of inner layer insulating substrates in which recesses 3a to through holes 3b for forming mounting recesses 3 are formed. 1 and an outer layer insulating substrate 5 having a through hole 3c for forming a recess for mounting.
is multi-layer molded with a bonding sheet layer 8 such as adhesive, adhesive sheet or low flow prepreg interposed therebetween, and then holes 13 are drilled, through-hole plating and outer layer etching are performed to form mounting recesses 3 on the surface side. Multilayer printed wiring board 7'
However, a plating layer is also formed in the mounting recess 3, which causes contamination and the problem that the plating layer must be removed in order to mount the semiconductor chip. Ta.

Therefore, as shown in FIG. 4, the present inventors have developed a method in which an inner layer circuit is formed on the surface, and a plurality of inner layer insulating substrates 1 are laminated with a bonding sheet layer 8 interposed therebetween, and a recess for mounting is formed on the surface side. 3, an insulating substrate 5 for the outer layer is laminated on the surface of the inner layer material 4, after which holes 13 are drilled, through holes are plated, an outer layer is formed, and then an insulating substrate for the outermost layer is formed. We have developed a method for mounting a semiconductor chip on a multilayer printed wiring board 7'' which is formed by cutting a portion 5a corresponding to the mounting recess 3 of No. 5 to expose the mounting recess 3. Although there was no contamination due to sticking, the wire bonding portion 9 of the inner layer material 4 was sometimes damaged when cutting the outer layer insulating substrate 5 with a drill or the like.

[Object of the Invention] The present invention has been made in view of the above circumstances, and its purpose is to prevent the mounting recess from being contaminated by plating when forming the outermost layer circuit pattern, and To provide a method for manufacturing a semiconductor chip carrier in which a wire bonding part of an inner layer material is not damaged.

[Disclosure of the Invention] The method for manufacturing a semiconductor chip carrier of the present invention includes:
The inner layer insulating substrate 1 on which the inner layer circuit is formed is laminated to form an inner layer material 4 having a recess 3 for mounting the semiconductor chip 2 on the front side, and then the inner layer material 4 of the outer layer insulating substrate 5 which is the outermost layer is laminated. The back side corresponding to the mounting recess 3 is cut to form a thin layer 6, and this outer layer insulating substrate 5 is laminated on the surface of the inner layer material 4 to perform multilayer molding. After this, holes 13 are sequentially drilled and through holes are formed. After plating and forming the outer layer, the multilayer printed wiring board 7 is formed.
The thin layer 6 is then cut and removed from the surface side of the outermost layer, and the semiconductor chip 2 is mounted in the exposed mounting recess 3. With this configuration, the above object is achieved. It was made.

The present invention will now be described with reference to the accompanying drawings. The multilayer printed wiring board 7 is manufactured by a well-known mass lamination method or pin lamination method. This example is a three-layer printed wiring board. The inner layer insulating substrate 1 is made by sequentially drilling holes, electroless plating, pattern formation, and patterning on a metal foil-covered laminate such as a paper phenolic resin laminate or a paper epoxy resin laminate covered with a metal foil such as copper foil. Inner layer circuits are formed on the surface using conventional processes such as plating, resist plating, resist removal, etching, external finishing, and symbol mark printing. Before forming the inner layer circuit, first, two inner layer insulating substrates 1a, 1
A recess 3a and a through hole 3b for forming a recess for mounting are respectively formed in b by mechanical cutting. Next, these two inner layer insulating substrates 1a and 1b are laminated by heating and pressurizing through an adhesive, an adhesive sheet, or a bonding sheet layer 8 such as low flow prepreg, and a semiconductor chip 2 is mounted on the front side. An inner layer material 4 having a recess 3 is formed. On the other hand, the outermost insulating substrate 5 is made of copper foil prepreg, and the back side corresponding to the mounting recess 3 of the inner layer material 4 is cut by a mechanical cutting process such as a counterbore to form a thin layer 6. form. Next, this outer layer insulating substrate 5 is heated and pressed on the surface of the inner layer material 4 via the bonding sheet layer 8 to form a multilayer structure. After this, the multilayer printed wiring board 7 is formed by a through-hole process consisting of drilling holes 13 and through-hole plating, and then an outer layer forming process such as outer layer etching. Thereafter, the thin layer 6 is removed by mechanical cutting from the surface side of the outermost layer to expose the mounting recess 3. In this case, since the thin layer 6 is simply removed and the gap 14 is formed between the thin layer 6 and the wire bonding part 9, the wire bonding part 9 will not be damaged and the recess for mounting can be easily formed. You can roll a 3. The semiconductor chip 2 is mounted in this mounting recess 3, electrically connected to the inner layer circuit by bonding with wires 10, and insulated by sealing with epoxy resin or the like or covering with a ceramic cover. We will complete the implementation as a package and put it into practical use. As shown in FIG. 2, this semiconductor chip carrier A can be used as a pin grid array by holding the terminal pins 12 in the through holes 11, and as a leadless chip carrier by making the through holes 11 function as connection holes. It can be used.

[Effects of the Invention] In the present invention, an inner layer material having a recess for mounting a semiconductor chip is formed, and a thin layer is formed on the surface of the inner layer material by cutting the back side corresponding to the recess for mounting. The multilayer printed wiring board is formed by laminating insulating substrates for multilayer printing, and then sequentially drilling holes, plating through holes, and forming the outer layer. The semiconductor chip is protected by the outermost insulating substrate and is not contaminated by plating, and the thin layer is removed by cutting from the surface side of the outermost layer, and the semiconductor chip is mounted in the exposed mounting recess. Since the thin layer is cut and a gap is formed between the thin layer and the wire bonding part, the recess for mounting can be easily exposed without damaging the wire bonding part of the inner layer material. Therefore, the wire bonding portion of the inner layer material is not damaged, and the electrical connection between the semiconductor chip and the inner layer circuit of the inner layer material can be ensured.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the process of an embodiment of the present invention, FIG. 2 is a sectional view showing mounting of a semiconductor chip on the same, FIG. 3 is a sectional view showing a conventional example, and FIG. 1 is a cross-sectional view showing a method developed in the process of completing a semiconductor chip carrier, 1 is an insulating substrate for an inner layer, 2 is a semiconductor chip, 3 is a recess for mounting, 4 is an inner layer material, and 5 is an insulating substrate for an outer layer. , 6 is a thin layer, 7 is a multilayer printed wiring board, and 13 is a hole.

Claims (1)

[Claims] 1 Laminate the inner layer insulating substrates on which inner layer circuits are formed to form an inner layer material having a recess for mounting a semiconductor chip on the front side, and then stack the inner layer material having a recess for mounting a semiconductor chip on the outermost layer, which corresponds to the mounting recess of the inner layer material of the outer layer insulating substrate. The back side of the material is cut to form a thin layer, and this insulating substrate for the outer layer is laminated on the surface of the inner layer material to form a multilayer. After this, hole drilling, through hole plating, and outer layer formation are performed sequentially to form a multilayer. A method for manufacturing a semiconductor chip carrier, which comprises forming a printed wiring board, then cutting and removing a thin layer from the surface side of the outermost layer, and mounting a semiconductor chip in the exposed mounting recess.