JPH0469456B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to an auto-zero circuit that automatically adds a correction signal to an analog original signal to correctly output a zero signal.

(b) Prior art In the conventional auto-zero circuit, the correction signal added to the analog original signal is added to the analog integration circuit or D/
Generated by the A converter circuit. However, in analog integrating circuits, when the correction signal is large, the error due to drift becomes large, making it difficult to obtain accuracy. On the other hand, if a high-resolution D/A converter circuit is used, high precision can be obtained, but it becomes expensive.

(c) Purpose of the Invention The purpose of the present invention is to provide an auto-zero circuit that can be constructed at low cost and that can achieve high accuracy.

(d) Structure of the Invention The auto-zero circuit of the present invention includes a D/A converter circuit that outputs a step signal that increases step by step at a predetermined step value in response to an auto-zero start signal input from the outside; a first subtraction circuit for subtracting the staircase signal from the analog original signal; a first increase stop circuit that stops increasing the staircase signal when the output signal of the first subtraction circuit crosses zero; an increase signal generation circuit that outputs an increase signal that increases continuously or stepwise with a sufficiently smaller step value than the step value according to the output signal; 2
The second increase stop circuit stops the increase of the increase signal when the subtraction circuit and the analog output cross zero.

Since the D/A converter circuit does not require high resolution, an inexpensive D/A converter may be used.

The increased signal generation circuit can use an analog integrator or a D/A converter. When using a D/A converter, high resolution is not required.

Note that the above-mentioned subtraction means adding a signal of opposite polarity.

(E) Embodiment 1 shown in FIG. 1 is an embodiment of the auto-zero circuit of the present invention. The signal input from the outside is
The analog original signal (Va), auto zero start pulse (SRT) and clear pulse (CL), and the signal output to the outside is the analog output signal (Vo).

The analog original signal (Va) is
The output signal of the 1D/A converter 4 is subtracted, and the output signal of the second D/A converter 5 is subtracted by the second subtracter 3, and the result is output as an analog output signal (Vo).

When the clear pulse (CL) is input, the 1st D/
Since the output signals of the A converter 4 and the second D/A converter 5 become zero, the auto zero function is canceled.
The analog original signal (Va) is output as is as an analog output signal (Vo). Time t ₀ in Figure 2
~t ₁ represents this state. However, it is assumed that the clock oscillators 6 and 7 are stopped.

When the auto zero start pulse (SRT) is input, the first clock oscillator 6 is activated to start the cycle.
A clock pulse of _T1 is output to the first D/A converter 4. The first D/A converter 4 outputs a step signal that increases stepwise by a predetermined step value _E1 every time a clock pulse is input. Therefore, the output of the first subtracter 2 decreases in a stepwise manner, but this output is output as is as an analog output signal (Vo) at this point. Therefore, the analog output signal (Vo) decreases stepwise as shown at times _t1 to _t4 in FIG.

As a specific example of the predetermined step value _E1 , for example, if the expected input value of the analog original signal (Va) is 1V at the maximum and an 8-bit one is used as the first D/A converter 4, _E1 is It is about 4 mV.

When the output of the first D/A converter 4 becomes larger than the analog original signal (Va), the polarities of the outputs of the first subtracter 2 and the second subtracter 3 are reversed. At this time, since the output signal crosses zero, the zero cross detectors 8 and 9 act as one-shot pulse generators 10 and 1.
1, one-shot pulse generator 1
0 and 11 output a single pulse. Time _t4 shown in FIG. 2 is the zero-crossing time.

The first clock oscillator 6 is stopped by inputting the pulse from the first one-shot pulse generator 10. Therefore, the output of the first D/A converter 4 holds the value at the time of zero crossing, and the output of the first subtracter 2 also holds the value at the time of polarity inversion.

The pulses from the first one-shot pulse generator 10 are passed through the delay circuit 12 to the second clock oscillator 7.
This causes the second clock oscillator 7 to operate and output a clock pulse with a period T ₂ to the second D/A converter 5. Through the delay circuit 12,
This is because unless the pulse from the first one-shot pulse generator 10 is input to the second clock oscillator 7 after the pulse from the second one-shot pulse generator 11, the operation cannot be continued.

The second D/A converter 5 outputs an increasing signal that increases step by step by a step value _E2 every time a clock pulse is input. This step value _E2 is
The value is set to be sufficiently smaller than the step value _E1 .
To give a specific example, the step value _E1 is 4 mV.
If an 8-bit converter is used as the second D/A converter 5, the voltage is approximately 16 μV. 2nd subtractor 3
The output of the second D/A converter 5, that is, the analog output signal (Vo), becomes smaller as the output of the second D/A converter 5 increases, as shown from time _t4 to time _t7 in FIG.
When the output of the 2D/A converter 5 becomes larger than the output of the first subtracter 2, the polarity is reversed. At this time, since the output signal crosses zero, the second zero cross detector 9 outputs an output to the second one shot pulse generator 11.
outputs a pulse. Then, the second clock oscillator 7 stops, and the output of the second D/A converter 5 maintains the value at the zero-crossing point. Time t ₇ shown in Figure 2
is the zero crossing time.

After that, the analog output signal (Vo) is kept constant, but the difference between the value of this analog output signal (Vo) and the zero level is the step value E ₂ even at the maximum.
smaller. According to the specific example mentioned above, the step value
Since the value of E ₂ was approximately 16 μV, zero correction could be performed with an accuracy of 1.6 × 10 ^-5 for an increase of 1 V in the analog original signal (Va).

Next, 21 shown in FIG. 3 is another embodiment of the auto-zero circuit of the present invention.

When the clear pulse (CL) is applied, the output signal of the D/A converter 24 becomes zero and the relay 2
7 contact 27a is turned on to the ground side, and the integrator 2
Since the output signals of 5 become zero, the output of the second subtracter 23 that subtracts these output signals also becomes zero,
The output of the first subtracter 22 that subtracts the output of the second subtracter 23 from the analog original signal (Va) remains the analog original signal (Va). In other words, the auto zero function does not work, and the analog original signal (Va) becomes the analog output signal (Vo) as it is. however,
It is assumed that the clock oscillator 26 is stopped.

When the auto zero start pulse (SRT) is input, the clock oscillator 26 operates and outputs a clock pulse with period T to the D/A converter 24.
The D/A converter 24 outputs a step signal that increases stepwise by a predetermined step value E every time a clock pulse is input. This staircase signal remains the same as the second one.
Since it is the output of the subtracter 23, the analog original signal (Va) is subtracted by the staircase signal in the first subtracter 22.

When the magnitude of the staircase signal becomes larger than the analog original signal (Va), the polarity of the output of the first subtractor 22 is reversed. At this time, the zero cross detector 28 outputs an output to the one shot pulse generator 30, and the one shot pulse generator 30 outputs an output to the clock oscillator 2.
6. Output a single pulse to the relay 27 and the reversing relay 29.

The clock oscillator 26 stops operating when a pulse is input from the one-shot pulse generator 30. Therefore, the output of the D/A converter 24 retains the value at the time when the polarity of the output of the first subtracter 22 is reversed.

The relay 27 is a one-shot pulse generator 30
When a pulse is input from , the contact 27a is switched to the integral input side. In addition, the reversing relay 29
When a pulse is input from the one-shot pulse generator 30, the contact 29a is reversed, but
Since the contact point has been open up to this point, the contact point 29a is closed. As a result, the integrator 25 starts integrating the output of the DC power supply 31 and outputs an increasing signal that increases continuously.

Since the increased signal is subtracted from the staircase signal by the second subtractor 23, the output of the first subtractor 22, which had been inverted in polarity by subtracting the staircase signal from the analog original signal, returns to the original state again. Trying to return to the polarity of When the increase signal increases, the output of the first subtractor 22 crosses zero.

At this time, the zero cross detector 28 outputs an output to the one shot pulse generator 30, so the one shot pulse generator 30 again outputs an output to the clock oscillator 2.
6. Output a single pulse to the relay 27 and the reversing relay 29. Clock oscillator 26 and relay 27 do not change state thereby. but,
Since the reversing relay 29 inverts its contact 29a, the contact 29a becomes open and the increase in the output of the integrator 25 is stopped. Therefore, the analog output signal (Vo) is kept at zero level.

The analog output of the integrator 25 may fluctuate due to drift, but since the magnitude of the analog output is at most the step value E, even if there is an error due to the drift of about 1%, the analog original signal (Va ), it means that zero correction can be performed with sufficiently high accuracy.

(F) Effects of the Invention The auto-zero circuit of the present invention can perform zero correction with high precision, and can also be used with a high-resolution D/A.
Since it does not require a converter, it can be constructed at low cost.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of one embodiment of the auto-zero circuit of the present invention, FIG. 2 is a characteristic diagram of an analog output signal in the auto-zero circuit shown in FIG. 1, and FIG. 3 is a circuit diagram of another embodiment. 1, 21...Auto zero circuit, 2, 3, 22,
23...Subtractor, 4,5,24...D/A converter, 6,7,26...Clock oscillator, 8,9,
28...Zero cross detector, 10, 11, 30
... One-shot pulse generator, 25 ... Integrator, 27 ... Relay, 27a ... Relay contact,
29... Reversing relay, 29a... Reversing relay contact, 31... DC power supply.

Claims (1)

[Claims] 1. A D/A converter circuit that outputs a staircase signal that increases stepwise at a predetermined step value in response to an externally inputted auto zero start signal, and a D/A converter circuit for subtracting the staircase signal from an externally inputted analog original signal. a first subtraction circuit; a first increase stop circuit that stops increasing the step signal when the output signal of the first subtraction circuit crosses zero; and a first increase stop circuit that stops increasing the step signal; an increase signal generation circuit that outputs an increase signal that increases stepwise with a sufficiently smaller step value; a second subtraction circuit that subtracts the increase signal from the output of the first subtraction circuit; and when the analog output signal crosses zero; An auto-zero circuit characterized by comprising a second increase stop circuit that stops increasing the increase signal.