JPH0469909B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a video signal generation circuit that generates a video signal for displaying a digital pattern in a video text system, a teletext system, a computer system, or the like.

[Technical background of the invention]

When displaying a digital pattern on a display such as a cathode ray tube, there are two brightness levels: display at normal brightness (hereinafter referred to as full brightness) and display at half brightness (hereinafter referred to as half brightness). There is an indication by

FIG. 7 shows a conventional circuit for generating video signals of the two luminance levels. This circuit consists of open collector buffers 11-16, resistors _R11 - _R12 , and PNP transistors _Q11 - _Q13.
Consists of. Then, the luminance signal Y, the color display signal (red
(R), green (G), blue (B) three color display signals) (R _i ),
By inputting (G _i ) and (B _i ), it is possible to display 8 colors and 2 gradations of red, green,
Three blue video signals (R ₀ ), (G ₀ ), and (B ₀ ) can be obtained.

In order to explain the operation of this circuit in more detail, let's focus on one color display signal. FIG. 8 shows a portion that generates a red video signal by inputting a luminance signal (Y) and a red color display signal (R _i ). The input luminance signal (Y) and color display signal (R _i ) are, for example, digital signals output from an image memory.
If the brightness signal (Y) is at a high level, full brightness is displayed, and if the brightness signal (Y) is at a low level, half brightness is displayed. Further, if the color display signal (R _i ) is at a high level, red is displayed, and if the color display signal (R i ) is at a low level, no red is displayed.

When the input level of the open collector buffers 11 and 12 is high, the output level is also high, but the output impedance is in a high impedance state. Further, when the input level is low level, the output level is also low level, and the output impedance is in a low impedance state.
Furthermore, two types of power supplies are used: +5V and +12V.

When both the brightness signal (Y) and color display signal (R _i ) are at high level (in the case of red display at full brightness), the resistor
The connection point (a) between R ₁₁ and R ₁₂ is approximately +5V. When the luminance signal (Y) is at low level and the color display signal (R _i ) is at high level (for half-bright red display), the open collector buffers 11 and 12 are wired, so the resistors R ₁₁ , Due to the resistance ratio of R ₁₂ , the connection point (a) will be at an intermediate level between ground potential (0V) and +5V. When the color display signal (R _i ) is low level (not displaying red), the luminance signal
Regardless of the state of (Y), the connection point (a) will be approximately 0V. Note that if only one color video signal is to be generated, the color display signal should not be at a low level and the luminance signal (Y) should be at a high level, but as shown in Figure 7, the three R, G, and B signals should not be When inputting a color display signal, the luminance signal (Y) is common, so this condition must be taken into consideration.

As mentioned above, the connection point (a) can take on three values, +5V, intermediate level, and 0V, depending on the state of the input signal, but the PNP transistor _Q11 plays the role of an output buffer and converts this level. Furthermore, the target 3 is determined by the resistance ratio of resistors _R17 and _R18 .
Video signals (R ₀ ) with different levels can be obtained. Note that the resistors R ₁₇ and R ₁₈ must be determined by taking into consideration not only the adjustment of the three levels but also the adjustment of impedance with the line side.

[Problems with background technology]

However, the above configuration has the following problems.

(1) A large number of parts are used.

(2) Two types of power sources are required to operate the circuit properly.

(3) Due to the poor rise characteristics of the open collector buffers 11 to 16, the video signal becomes sluggish as shown in FIG. In addition,
In FIG. 9, L ₁ represents a full brightness display level, L ₂ represents a half brightness display level, and L ₃ represents a level at which no color is displayed.

(4) Due to the extremely different propagation delay times at the rise and fall of the open collector buffers 11 to 16, as shown in Fig. 9,
To cause glitches (S _g ) and affect the image.

[Purpose of the Invention] The present invention has been made to address the above-mentioned circumstances, and provides a video signal generation circuit that has a simple configuration, can use the same type of power supply, and can prevent signal distortion and glitches. The purpose is to provide.

[Summary of the invention]

The present invention includes a first AND circuit to which a color display signal is input, a second AND circuit to which the color display signal is input as one input and a luminance signal is input as the other input; , inserted between the output terminal of the second AND circuit and the reference potential point,
A resistor circuit whose resistance ratio changes according to the output level of the first and second AND circuits and outputs video signals of different levels, and which connects the first and second AND circuits in a complementary and comparative manner. It is constructed of elements that can flow a large output current and have high speed performance.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows the configuration of one embodiment, showing a portion that generates a video signal (R ₀ ) of one of three colors, for example red. the other 2
color, i.e. green, blue video signal (G ₀ ),
The configuration of the part that generates (B ₀ ) is the same as the configuration of the part that outputs the red video signal (R ₀ ), so below, the configuration and operation will be explained using the part that generates this red video signal (R ₀ ). Explain.

In FIG. 1, 21 and 22 are two-input AND circuits. The two inputs of the AND circuit 21 are the color display signal (R _i ) applied to the input terminal 23;
is given. The color display signal (R _i ) is applied to one input of the AND circuit 22, and the luminance signal (Y) applied to the input terminal 24 is applied to the other input.

The output terminals of the AND circuits 21 and 22 are connected to one ends of the resistors R ₃₁ and R ₃₂ , respectively, and the output terminals of the AND circuits 21 and 22 are connected to one ends of the resistors R ₃₁ and R ₃₃
The other ends are commonly connected. This connection point (b) is
It is connected to the output terminal 25 of the video signal (R ₀ ), and is also connected to the power supply (+B) via a resistor R ₃₃ .

Each AND circuit 21, 22 is complementary and can flow a relatively large output current, and is also made of a high-speed element such as the 74HC series.
It is composed of CMOS elements.

The operation in the above configuration will be explained. When both the color display signal (R _i ) and the brightness signal (Y) are at high level (full brightness red display), an equivalent circuit as shown in Figure 2 is obtained, and the output level is at the power supply voltage level,
For example, it will be approximately equal to 5V. Color display signal (R _i )
When is at high level and the luminance signal (Y) is at low level (for half-bright red display), an equivalent circuit as shown in Fig. 3 is obtained, and the output level is determined by resistors R ₃₁ ,
It is defined by the resistance ratio between the parallel resistance of R ₃₃ and the resistance R ₃₂ . Furthermore, when the color display signal (R _i ) is low level (not displaying red), an equivalent circuit as shown in Figure 4 is obtained regardless of the level of the luminance signal (Y), and the output level is determined by the resistance It is specified by the resistance ratio of R ₃₃ and the parallel resistance of resistors R ₃₁ and R ₃₂ .

From the above, the level of the video signal (R ₀ ) is divided into three levels L 1 and L ₂ as shown in Figure 5, depending on the three cases of full brightness red display, half brightness red display, and _no red display. , L ₃ .

Note that the resistors R ₃₁ to _{R 33} define the level of the video signal (R ₀ ) in the three display formats mentioned above, and
It also has the role of adjusting the impedance on the line side.

According to this embodiment detailed above, two AND circuits 21, 22 and three resistors R ₃₁ are provided for each color.
~R ₃₂ constitutes a circuit, making the circuit configuration very simple.

Also, the AND circuits 21 and 22 are high-speed CMOS
It is composed of elements. This CMOS device has symmetrical output impedance and can flow a larger output current than TTL devices. Therefore, there is no need to provide output buffers such as transistors Q ₁₁ to _{Q 13} as in the conventional case. This makes it possible to use only one type of power supply and to reduce the number of parts.

In addition, since the AND circuits 21 and 22 are configured with CMOS elements, due to the complementarity peculiar to CMOS elements, the propagation delay time of the rise and fall of the video signal is balanced, and the transition points that affect the image are balanced. No glitches occur either. That is, to be more precise, a thin glitch (S _g ) occurs, as shown in Figure 5, but this is several tens of M.
Since it has a high frequency of Hz, it is unlikely that it will affect the image.

Further, since the AND circuits 21 and 22 are constructed of CMOS elements, the high speed of the CMOS elements prevents the rise of the signal from becoming dull, which would affect the image.

Using the circuit of this example, the 8 colors 2 as shown in FIG.
The gradation circuit is shown in FIG. 6, and can be realized with a much simpler configuration than the circuit shown in FIG.

〔Effect of the invention〕

As described above, according to the present invention, with a simple configuration,
It is possible to provide a video signal generation circuit that can use the same type of power supply and can prevent signal distortion and glitches.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIGS. 2 to 4 are circuit diagrams showing equivalent circuits for each operation in FIG. 1, and FIG. 5 is a circuit diagram showing the waveform of the video signal in FIG. 1. 6 is a circuit diagram showing a configuration in which FIG. 1 is applied to the generation of three video signals, FIG. 7 is a circuit diagram showing a conventional video signal generation circuit that generates three video signals, and FIG. The figure is a circuit diagram showing an extracted part of FIG. 7 that generates one video signal, and FIG. 9 is a diagram showing the waveform of a video signal obtained by the conventional circuit. 21, 22...AND circuit, _R31 to _R33 ...resistance.

Claims (1)

[Claims] 1. A first AND circuit into which a color display signal is input, and a second AND circuit into which the color display signal is input as one input and a luminance signal is input as the other input.
The AND circuit is inserted between the output terminals of the first and second AND circuits and the reference potential point, and the resistance ratio changes depending on the output level of the first and second AND circuits. It has a resistor circuit that outputs a video signal of a certain level, and the first and second AND circuits are composed of complementary elements that can flow a relatively large output current and have high speed. video signal generation circuit.