Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPH0519373B2 - - Google Patents
[go: Go Back, main page]

JPH0519373B2 - - Google Patents

Info

Publication number
JPH0519373B2
JPH0519373B2 JP59254290A JP25429084A JPH0519373B2 JP H0519373 B2 JPH0519373 B2 JP H0519373B2 JP 59254290 A JP59254290 A JP 59254290A JP 25429084 A JP25429084 A JP 25429084A JP H0519373 B2 JPH0519373 B2 JP H0519373B2
Authority
JP
Japan
Prior art keywords
output
circuit
voltage
power supply
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59254290A
Other languages
Japanese (ja)
Other versions
JPS61132032A (en
Inventor
Toshiharu Kojima
Yukio Suzuki
Yoshikazu Teraue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP25429084A priority Critical patent/JPS61132032A/en
Publication of JPS61132032A publication Critical patent/JPS61132032A/en
Publication of JPH0519373B2 publication Critical patent/JPH0519373B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Emergency Protection Circuit Devices (AREA)

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は過不足電圧継電器に係り、特に電路に
設けられた断路器が異常電圧時に投入された場合
の保護機能の向上に好適な過不足電圧継電器に関
する。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an over/under voltage relay, and particularly to an over/under voltage relay suitable for improving the protection function when a disconnector installed in an electric circuit is turned on at an abnormal voltage. Regarding relays.

〔発明の背景〕[Background of the invention]

従来の過電圧継電器または不足電圧継電器は実
公昭56−49230号公報、実公昭56−52753号公報に
開示されているように、出力リレーX1を有する
過電圧検出回路と出力リレーX2を有する不足電
圧検出回路とを備え、過電圧時には波形連続化回
路TDD1を介して出力リレーX1を励磁し、不
足電圧時には時間測定回路TDE1を介して出力
リレーX2を励磁してそれぞれ過電圧状態、また
は不足電圧状態を出力するように構成されてい
た。そのため、断路器投入時点で既に異常電圧
(過電圧または不足電圧)であつた場合には波形
連続化回路TDD1または時間測定回路TDE1に
よる時間遅れがあり、この時間遅れの間出力リレ
ーX1または検出回路は出力リレーX2が動作せ
ず、一時的に「電路電圧が正常である」という信
号を出してしまうという問題点があつた。
Conventional overvoltage relays or undervoltage relays include an overvoltage detection circuit having an output relay X1 and an undervoltage detection circuit having an output relay In the case of overvoltage, the output relay X1 is energized via the waveform continuation circuit TDD1, and in the case of undervoltage, the output relay It was composed of Therefore, if there is already an abnormal voltage (overvoltage or undervoltage) when the disconnector is turned on, there is a time delay due to the waveform continuity circuit TDD1 or time measurement circuit TDE1, and during this time delay, the output relay X1 or the detection circuit is There was a problem in that the output relay X2 did not operate and temporarily issued a signal indicating that the line voltage was normal.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、2次側電路の正常状態の電圧
に対する異常電圧時に断路器が投入されても立ち
上がり時における誤動作の発生を防止できて信頼
性に優れるとともに電路の保護機能に優れた過不
足電圧継電器を提供することにある。
It is an object of the present invention to provide a system that can prevent malfunctions at startup even when a disconnector is turned on at an abnormal voltage with respect to the normal state voltage of the secondary circuit, has excellent reliability, and has an excellent protection function for the circuit. Our purpose is to provide voltage relays.

〔発明の概要〕[Summary of the invention]

本発明は、過不足電圧継電器において、断路器
の2次側電路に接続される入力端子と、この入力
端子の出力を整流、平滑する全波整流回路とこの
全波整流回路に接続された安定化電源回路とこの
安定化電源回路の出力に接続されたコンデンサを
有する電源電圧供給手段と、コンデンサの電圧を
基準電圧と比較してこの基準電圧に達したときに
出力を発生する比較器を有する制御電源確立検出
回路と、電源供給手段と並列に入力端子に接続さ
れた電圧検知手段と、電圧検知手段の出力端子に
接続されて過電圧検出回路と不足電圧検出回路を
有し2次側電路の正常状態の電圧に対する過電圧
または不足電圧の少なくともいずれか一方を検出
して出力を発生する異常電圧検出手段と、この異
常電圧検出手段に接続された過電圧検出回路の出
力と電源供給手段の出力の論理和をとる第1の
ORゲートと不足電圧検出回路の出力と電源供給
手段の出力の論理和をとる第2のORゲートとこ
れら第1のORゲート、第2のORゲートの出力
と制御電源確立検出回路の出力の論理積をとる3
入力ANDゲートを有し、この3入力ANDゲート
の出力が第1のORゲート、第2のORゲートの
それぞれ電源供給手段に接続された側の入力にフ
イードバツクされてその電源確立前は出力が禁止
され、電源確立時点で第1のORゲート、第2の
ORゲートの出力の論理積を保持する保持手段
と、異常電圧検出手段に接続され2次側電路の正
常状態の電圧に対する異常電圧の断続時間に比例
した計数を行ない、この計数値が所定数に達した
ときに出力を発生する計数手段と、この計数手段
の出力と保持手段の出力を入力とする2入力
ANDゲートを有して保持手段の異常電圧に対す
る出力と係数手段の計数値が所定数に達したとき
の出力の両方が入力されたときに入力端子の電圧
が2次側電路の正常状態の電圧に対して異常であ
ることを示す出力を発生する出力手段と、この出
力手段に接続され2次側電路に接続された遮断器
を2次側電路の電圧が正常状態であるとき投入可
能となるようその開閉動作を制御する開閉手段を
備え、電源供給手段は異常電圧検出手段、計数手
段、出力手段および関係手段に電源を供給するよ
う構成されたことを特徴とするものである。
The present invention provides an over/under voltage relay that includes an input terminal connected to a secondary circuit of a disconnector, a full-wave rectifier circuit for rectifying and smoothing the output of this input terminal, and a stable circuit connected to the full-wave rectifier circuit. a power supply voltage supply means having a stabilized power supply circuit and a capacitor connected to the output of the stabilized power supply circuit; and a comparator that compares the voltage of the capacitor with a reference voltage and generates an output when the voltage reaches the reference voltage. A control power supply establishment detection circuit, a voltage detection means connected to an input terminal in parallel with the power supply means, and an overvoltage detection circuit and an undervoltage detection circuit connected to the output terminal of the voltage detection means, An abnormal voltage detection means that detects at least one of overvoltage or undervoltage with respect to the voltage in a normal state and generates an output, and the logic of the output of the overvoltage detection circuit and the output of the power supply means connected to the abnormal voltage detection means. The first to balance
A second OR gate that takes the logical sum of the outputs of the OR gate, the undervoltage detection circuit, and the output of the power supply means, and the logic of the outputs of the first OR gate, the second OR gate, and the output of the control power supply establishment detection circuit. Take the product 3
It has an input AND gate, and the output of this 3-input AND gate is fed back to the input of the first OR gate and the second OR gate connected to the power supply means, and output is prohibited before the power supply is established. When the power is established, the first OR gate and the second
It is connected to a holding means for holding the logical product of the output of the OR gate and an abnormal voltage detection means, and performs a count proportional to the intermittent time of the abnormal voltage with respect to the voltage in the normal state of the secondary circuit, and this count value reaches a predetermined number. A counting means that generates an output when the target is reached, and two inputs that take the output of this counting means and the output of the holding means as inputs.
It has an AND gate, and when both the output of the holding means for abnormal voltage and the output when the count value of the coefficient means reaches a predetermined number are input, the voltage of the input terminal becomes the voltage of the normal state of the secondary circuit. an output means that generates an output indicating that there is an abnormality, and a circuit breaker connected to the output means and connected to the secondary circuit, which can be closed when the voltage of the secondary circuit is in a normal state. The present invention is characterized in that it includes an opening/closing means for controlling the opening/closing operation of the filter, and the power supply means is configured to supply power to the abnormal voltage detection means, the counting means, the output means, and the related means.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を第1図〜第10図によ
り説明する。本発明の第1実施例を第1図〜第5
図により説明する。第1図は本発明の第1実施例
の全体構成を示すブロツク図である。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 10. The first embodiment of the present invention is shown in FIGS. 1 to 5.
This will be explained using figures. FIG. 1 is a block diagram showing the overall configuration of a first embodiment of the present invention.

次に断路器が投入されてから電源が立上り、制
御回路が動作するまでの本実施例の動作を第2図
〜第4図により説明する。
Next, the operation of this embodiment from when the disconnector is turned on until the power is turned on and the control circuit operates will be explained with reference to FIGS. 2 to 4.

入力端子10に印加された電圧は変圧器11を
介して整流器12により全波整流されコンデンサ
13で平滑される。さらに前記平滑電圧はツエナ
−ダイオード14の基準電圧で安定化電源回路1
5により安定化され、コンデンサ16に蓄電され
制御回路17に印加される。次に制御電源確立検
出回路18の構成は前記安定化電源を抵抗19,
20により分圧し、比較器21の反転入力端子に
入力、他方非反転入力には抵抗22、ツエナ−ダ
イオード23による基準電圧が入力されている。
The voltage applied to the input terminal 10 is full-wave rectified by a rectifier 12 via a transformer 11 and smoothed by a capacitor 13 . Furthermore, the smoothed voltage is the reference voltage of the Zener diode 14, and the stabilized power supply circuit 1
The voltage is stabilized by 5, stored in a capacitor 16, and applied to a control circuit 17. Next, the configuration of the control power supply establishment detection circuit 18 is such that the stabilized power supply is connected to the resistor 19,
20 and is inputted to an inverting input terminal of a comparator 21, while a reference voltage from a resistor 22 and a Zener diode 23 is inputted to the non-inverting input.

今、第3図aに示すような入力電圧が入力端子
10に印加されたとすると、前述したコンデンサ
16の電位Fは第3図bに示す如く漸増する。こ
れに伴ない比較器21の非配転および反転入力の
電位G,Hはそれぞれ第3図bのG,Hのように
変化する。そして両者が同図の関係になるようツ
エナ−ダイオード23、抵抗19,20の比を選
定することにより比較器21の出力Aは電源電圧
Fがほぼ最終電圧になつたとき第3図cに示すよ
うに「H」レベルから「L」レベルに変化する。
Now, if an input voltage as shown in FIG. 3a is applied to the input terminal 10, the potential F of the capacitor 16 mentioned above gradually increases as shown in FIG. 3b. As a result, the potentials G and H of the non-inverting and inverting inputs of the comparator 21 change as shown by G and H in FIG. 3b, respectively. By selecting the ratio of the Zener diode 23 and the resistors 19 and 20 so that both have the relationship shown in the figure, the output A of the comparator 21 is as shown in Figure 3c when the power supply voltage F reaches almost the final voltage. The signal changes from the "H" level to the "L" level.

制御回路17には過電圧検出回路24と不足電
圧検出回路25が含まれており、それぞれ異常電
圧検出時に信号を出す。
The control circuit 17 includes an overvoltage detection circuit 24 and an undervoltage detection circuit 25, each of which outputs a signal when an abnormal voltage is detected.

今、入力電圧が過電圧整定値以下で、且つ、不
足電圧整定値以上のいわゆる正常状態の場合、第
3図bに示すように一定時間経過後、比較器21
の出力Aは「L」レベルに反転するのでNOTゲ
ート26を介してANDゲート27への入力は
「H」レベルとなる。また、過電圧、不足電圧検
出回路24,25の出力B,Cはおずれも「L」
レベルで、それぞれNOTゲート28,29さら
にORゲート30,31を介してANDゲート27
への入力は「H」レベルとなる。これにより
ANDゲート27の出力は「H」レベルとなり、
ORゲート30,31のもう一方の入力も「H」
レベルに変化し、ANDゲート27の出力が「H」
レベルに保持されることになる。
Now, in the so-called normal state where the input voltage is below the overvoltage setting value and above the undervoltage setting value, the comparator 21
Since the output A of is inverted to "L" level, the input to AND gate 27 via NOT gate 26 becomes "H" level. In addition, the outputs B and C of the overvoltage and undervoltage detection circuits 24 and 25 are both "L".
AND gate 27 via NOT gates 28, 29 and OR gates 30, 31, respectively.
The input to is at "H" level. This results in
The output of AND gate 27 becomes "H" level,
The other input of OR gates 30 and 31 is also "H"
level, and the output of AND gate 27 becomes “H”
It will be held at the level.

また、制御回路17には制限回路32が含まれ
ており、上記正常状態から過電圧または不足電圧
が発生した場合、限時時間整定値の時間経過後に
信号を出す。断路器3投入時電路が正常状態にあ
るとき、限時回路の出力Dは「L」レベルで
NOTゲート33を介してANDゲート34への入
力は「H」レベルとなる。また、前記ANDゲー
ト27の出力は「H」レベルに保持されているの
でANDゲート34の入力は「H」レベルで出力
Eは「H」レベルとなりトランジスタ35がON
して開閉手段としての出力リレー36が励磁さ
れ、この時電路に設置された遮断器の投入が可能
となる。
Further, the control circuit 17 includes a limiting circuit 32, which outputs a signal after a time limit setting value has elapsed when an overvoltage or an undervoltage occurs from the above-mentioned normal state. When the circuit is in a normal state when the disconnector 3 is turned on, the output D of the time limit circuit is at the "L" level.
The input to the AND gate 34 via the NOT gate 33 becomes "H" level. Also, since the output of the AND gate 27 is held at the "H" level, the input of the AND gate 34 is at the "H" level, and the output E is at the "H" level, turning the transistor 35 ON.
As a result, the output relay 36 as a switching means is energized, and at this time, the circuit breaker installed in the electric circuit can be closed.

次に上記正常状態から不足電圧に移行した場合
不足電圧検出回路25からの出力は「H」レベル
となるが、ANDゲート27の出力は「H」レベ
ルに保持されているので変化することはない。し
かし限時回路32が働き一定時間後出力を出し
ANDゲート34の出力Eを「H」から「L」レ
ベルに変化させ出力リレー36の励磁を解いて異
常電圧検出状態にする。なお正常状態から過電圧
が発生した場合も同様である。また、正常状態か
ら停電になつた場合における電源はコンデンサ1
6で補償する。これらのタイムチヤートを第4図
aに示す。
Next, when the above-mentioned normal state shifts to undervoltage, the output from the undervoltage detection circuit 25 becomes "H" level, but the output of the AND gate 27 is held at "H" level, so it does not change. . However, the time limit circuit 32 works and outputs after a certain period of time.
The output E of the AND gate 34 is changed from the "H" level to the "L" level, the output relay 36 is deenergized, and an abnormal voltage detection state is established. The same applies when an overvoltage occurs in a normal state. In addition, in the event of a power outage from a normal state, the power supply is capacitor 1.
Compensate with 6. These time charts are shown in Figure 4a.

次に電路において断路器3の投入以前に異常電
圧である場合、たとえば過電圧の時は比較器21
と不足電圧検出回路25のANDゲート27への
入力は「H」レベルであるが、過電圧検出回路2
4からの出力Bは「H」レベルとなり、電源確立
時点で「L」レベルであつたANDゲート27の
出力は「H」レベルとなることはできず、すなわ
ち出力リレー36は励磁されず遮断器の投入がで
きない。また、最初から停電の場合には回路が働
かないので出力リレー36は励磁されず、電源が
確立できる位の不足電圧に対しては前記遮断器投
入前に過電圧である場合と同様の回路動作を行
う。断路器3の投入時点より過電圧の場合のタイ
ムチヤートを第4図bに示す。なお、第4図a,
bにおいてイは制御電源確立回路18の出力、ロ
は過電圧検出回路24の出力、ハは不足電圧検出
回路25の出力、ニは限時回路32の出力、ホは
出力回路のANDゲート34の出力を示す。
Next, if there is an abnormal voltage in the electrical circuit before the disconnector 3 is turned on, for example in the case of overvoltage, the comparator 21
The input to the AND gate 27 of the undervoltage detection circuit 25 is at "H" level, but the input to the AND gate 27 of the undervoltage detection circuit 25 is at "H" level.
The output B from 4 becomes the "H" level, and the output of the AND gate 27, which was at the "L" level when the power was established, cannot become the "H" level, that is, the output relay 36 is not energized and the circuit breaker is closed. cannot be input. In addition, in the case of a power outage, the circuit does not work from the beginning, so the output relay 36 is not energized, and the circuit operates in the same manner as in the case of overvoltage before the circuit breaker is turned on for an undervoltage that is sufficient to establish a power supply. conduct. A time chart in the case of overvoltage from the time when the disconnector 3 is turned on is shown in FIG. 4b. In addition, Fig. 4 a,
In b, A is the output of the control power supply establishment circuit 18, B is the output of the overvoltage detection circuit 24, C is the output of the undervoltage detection circuit 25, D is the output of the time limit circuit 32, and E is the output of the AND gate 34 of the output circuit. show.

本実施例では、制御回路電源と検出電圧を同一
端子から得ているため、断路器3が投入されるま
では出力リレーは継電器が異常電圧を検知した動
作状態にある。
In this embodiment, since the control circuit power source and the detection voltage are obtained from the same terminal, the output relay is in an operating state in which the relay has detected an abnormal voltage until the disconnector 3 is turned on.

断路器3の投入前からの電路の異常電圧に対し
ては断路器3の投入後も出力リレーは前記継電器
の動作状態を保ち遮断器1の投入を阻止する。
Even after the disconnector 3 is closed, the output relay maintains the operating state of the relay and prevents the circuit breaker 1 from closing even after the disconnector 3 is closed.

断路器3の投入時、正常電圧である場合におい
ては、初期異常電圧における回路動作を解除す
る。
When the disconnector 3 is turned on, if the voltage is normal, the circuit operation at the initial abnormal voltage is canceled.

上記のごとく、出力手段に設けられた開閉手段
としての出力リレー36は過電圧検出手段24お
よび不足電圧検出手段25がともに不動作状態で
あるときに付勢され、この出力手段が正常電圧時
に出力を発生するので不足電圧時の誤動作や過電
圧時に電源回路60に大電流が流れるのを防止で
きる。
As mentioned above, the output relay 36 as a switching means provided in the output means is energized when both the overvoltage detection means 24 and the undervoltage detection means 25 are in an inoperable state, and this output means outputs an output when the voltage is normal. Therefore, it is possible to prevent a large current from flowing into the power supply circuit 60 in the event of malfunction during undervoltage or overvoltage.

なお、制御電源の確立を検知する電圧レベルを
比較器や、過・不足電圧検出器及び限時回路用の
カウンタなどに用いるicの保証電源電圧下限値近
辺まで下げると、電源確立までの時間を早くする
ことができる。この場合、各ゲート回路をicの保
証電源電圧以下で機能する阻止(例えばダイオー
ドやトランスタ等)で構成すると良い。
Note that lowering the voltage level that detects the establishment of control power supply to around the lower limit of the guaranteed power supply voltage for ICs used for comparators, over/undervoltage detectors, and counters for time-limiting circuits will speed up the time until power supply is established. can do. In this case, each gate circuit may be configured with a blocker (for example, a diode, a transformer, etc.) that functions below the IC's guaranteed power supply voltage.

本実施例によれば検出電圧と制御回路の電源を
同一ラインより得ているので、制御回路の電源を
別途に設ける場合に比べて配線の手間が不要とな
るとともに、継電器を小形化することができる。
また、不足電圧状態においては断路器が投入され
ても出力リレー36が付勢されないので誤動作を
防止でき、過電圧状態においては断路器が投入さ
れても出力リレー36のコイルに電流が流れない
で電源供給手段の負担が減少して発熱が減り、信
頼性を向上させることができる。第5図Aおよび
第5図Bに本実施例における過不足電圧継電器の
全体構成の回路図を分割して示す。
According to this embodiment, since the detection voltage and the power supply for the control circuit are obtained from the same line, there is no need for wiring compared to the case where the power supply for the control circuit is provided separately, and the relay can be made smaller. can.
In addition, in an undervoltage state, the output relay 36 is not energized even if the disconnector is turned on, so malfunction can be prevented, and in an overvoltage state, even if the disconnector is turned on, no current flows through the coil of the output relay 36, so the power supply is turned on. The load on the supply means is reduced, heat generation is reduced, and reliability can be improved. FIGS. 5A and 5B are divided circuit diagrams of the overall configuration of the over/under voltage relay in this embodiment.

次に第5図A,Bにおける各部の動作を説明す
る。
Next, the operation of each part in FIGS. 5A and 5B will be explained.

電圧検知手段50である入力、整流回路におい
ては、変圧器101により入力電圧を降圧し、ダ
イオードブリツジ102で全波整流する。過電圧
検出手段52、不足電圧検出手段54において、
過電圧整定回路、不足電圧整定回路の動作は次の
ようになる。
In the input and rectifier circuit that is the voltage detection means 50, the input voltage is stepped down by a transformer 101 and full-wave rectified by a diode bridge 102. In the overvoltage detection means 52 and the undervoltage detection means 54,
The operation of the overvoltage setting circuit and undervoltage setting circuit is as follows.

スイツチ103,104により、抵抗105,
106の抵抗比を変化させ、各々過電圧、不足電
圧整定を行なう。尚、ツエナダイオード140,
107は過入力保護、ダイオード108は入力投
入時、信号系(変圧器101)を介した信号系か
らも電源平滑コンデンサ109へ充電々流を送
り、電源確立時間を早くするものである。
The switches 103 and 104 control the resistance 105,
The resistance ratio of 106 is changed to set overvoltage and undervoltage respectively. In addition, Zena diode 140,
107 is for over-input protection, and a diode 108 is for supplying a charging current from the signal system (transformer 101) to the power supply smoothing capacitor 109 when the input is turned on, thereby speeding up the power supply establishment time.

過電圧レベル検出回路について説明する。 The overvoltage level detection circuit will be explained.

ピークホールドコンデンサ110の電位を抵抗
111、コンデンサ112でさらに平滑し、比較
器113,114の反転入力に入力し、基準電圧
(各々の比較器の比反転入力)を比較する。過電
圧入力の時、比較器113,114の反転入力電
位上昇同比較器出力「L」→比較器115出力
「L」、比較器116「H」→比較器115出力
「L」によりカウンタ117リセツト端子「L」
(リセツト解除)、トラジスタ118ベース「L」
(トランジスタ119は通常「L」)自励発振開始
(トランジスタ118,119は自励発振停止
用)。尚、比較器113は過電圧100%以上で出力
反転、同114は同13%以上で出力反転する様に
基準電圧を設定してある。
The potential of the peak hold capacitor 110 is further smoothed by a resistor 111 and a capacitor 112, and is input to the inverting inputs of comparators 113 and 114, and the reference voltages (ratio inverting inputs of each comparator) are compared. When overvoltage is input, the inverted input potential of comparators 113 and 114 increases. Comparator output "L" → comparator 115 output "L", comparator 116 "H" → comparator 115 output "L", counter 117 reset terminal "L"
(Reset release), transistor 118 base “L”
(Transistor 119 is normally "L") Self-excited oscillation starts (Transistors 118 and 119 are for stopping self-excited oscillation). The reference voltage is set so that the output of the comparator 113 is inverted when the overvoltage exceeds 100%, and the output of the comparator 114 is inverted when the overvoltage exceeds 13%.

計数手段56において、発振回路は比較器12
0および増幅器として使用される比較器121と
により構成される。カウンタ回路はカウンタIC
117にて構成され、その出力を過電圧・不足電
圧動作時間整定回路へ供給する。
In the counting means 56, the oscillation circuit is connected to the comparator 12.
0 and a comparator 121 used as an amplifier. The counter circuit is a counter IC
117, and supplies its output to an overvoltage/undervoltage operation time setting circuit.

出力手段の過不足判別回路は130%以上の過電
圧信号とカウンタ最大ビツト出力の論理和をと
り、AND回路126または127の入力へ信号
を供給する。
The excess/deficiency discrimination circuit of the output means takes the logical sum of the overvoltage signal of 130% or more and the maximum bit output of the counter, and supplies the signal to the input of the AND circuit 126 or 127.

一方比較器115,130「L」により、トラ
ンジスタ128,129コレクタ「H」→AND
126,127「H」→トランジスタ131コレ
クタ「L」→トラジスタ132コレクタ「H」→
出力リレーコイル励磁解除となる。なお、正常時
にリレーコイルは励磁状態である。
On the other hand, the comparators 115 and 130 "L" output the transistors 128 and 129 collectors "H" → AND
126, 127 “H” → Transistor 131 collector “L” → Transistor 132 collector “H” →
The output relay coil is de-energized. Note that the relay coil is in an excited state under normal conditions.

以上の構成において、入力投入時の動作は以下
のようになる。
In the above configuration, the operation when input is input is as follows.

電源電圧(Vcc)確立前=比較器141により
AND126,127入力一端をダイオード13
3を介し「L」とする。(Vcc確立前のリレー動
作阻止)。又アナログスイツチ134,135非
導通とする(過、不足動作表示LED点灯防止)。
Before power supply voltage (Vcc) is established = by comparator 141
Connect one end of AND126, 127 input to diode 13
3 to "L". (Preventing relay operation before Vcc is established). Also, the analog switches 134 and 135 are made non-conductive (to prevent over/under operation indicator LED from lighting up).

電源電圧(Vcc)確立後(1)正常な場合=比較器
115,130出力は共に「H」→ダイオード1
36aアノード電位「L」、トランジスタ131
ベース電位「L」→トランジスタ132導通リレ
ー励磁(2)異常(過電圧又は不足電圧)の場合=比
較器115,130出力のいずれかが「L」→ダ
イオード136aアノード「H」→トランジスタ
138コレクタ「L」→リレーコイル励磁せず、
となり誤動作を防止する。
After establishing the power supply voltage (Vcc) (1) Normal case = comparator 115, 130 outputs are both "H" → diode 1
36a anode potential "L", transistor 131
Base potential "L" → Transistor 132 conduction relay excitation (2) In case of abnormality (overvoltage or undervoltage) = Either comparator 115, 130 output is "L" → Diode 136a anode "H" → Transistor 138 collector "L" ”→The relay coil is not energized,
This prevents malfunction.

次に本発明の第2実施例を第6図〜第8図によ
り説明する。
Next, a second embodiment of the present invention will be described with reference to FIGS. 6 to 8.

本実施例は人力投入時、信号検出要素から電源
要素へ通電することにより電源確立を早くしたも
のである。
In this embodiment, power is established quickly by passing electricity from the signal detection element to the power supply element when human power is turned on.

第6図におちえ、入力201投入→変圧器20
2、ダイオードブリツジ204、コンデンサ20
5により整流平滑→安定化回路206を介し、平
滑コンデンサ207に蓄電。この時の電源確立の
時間的推移は第7図Aで示す。(以上電源回路2
21の説明) 一方、検出回路222は、変圧器203、ダイ
オードブリツジ208により整流→抵抗209、
可変抵抗210で分圧され、検出回路211へ。
この時、検出回路入力電圧の立上りは瞬時(厳密
には変圧器等介入素子による遅れはあるが)であ
り、入力201投入時は検出回路入力電圧が電源
電圧より大きい。よつてダイオード212により
平滑コンデンサ207へ電流が流れ、第7図Bの
ように電源確立が早くなる。以上は、定常時(過
電圧継電器等の場合は最大整定値)検出回路入力
電圧が電源電圧以上にならない場合の接続。以上
になる場合は第6図破線の接続により対応できる
(検出回路入力電圧が大きくなると、コンデンサ
205の電位も上がる。即ち、ダイオード212
のカソード電位がアノード電位よりも大きい。) 第8図は本実施例の変形例を示す。定常時、電
源電圧が入力信号整流値よりも大きい場合はダイ
オードアノードを図示の如く接続し、さらに確立
時間を早くできる(第7図C)。尚、第8図破線
の接続は第6図と同じため省略する。
Return to Figure 6, turn on input 201 → transformer 20
2, diode bridge 204, capacitor 20
5, the power is stored in the smoothing capacitor 207 via the rectification and smoothing → stabilization circuit 206. The time course of power supply establishment at this time is shown in FIG. 7A. (The above power supply circuit 2
21) On the other hand, the detection circuit 222 is rectified by a transformer 203 and a diode bridge 208 → a resistor 209,
The voltage is divided by a variable resistor 210 and sent to a detection circuit 211.
At this time, the rise of the detection circuit input voltage is instantaneous (strictly speaking, there is a delay due to intervening elements such as a transformer), and when the input 201 is turned on, the detection circuit input voltage is higher than the power supply voltage. Therefore, current flows through the diode 212 to the smoothing capacitor 207, and the power supply is quickly established as shown in FIG. 7B. The above is a connection when the detection circuit input voltage does not exceed the power supply voltage during steady state (maximum setting value in the case of overvoltage relays, etc.). In the above case, it can be handled by connecting the broken line in FIG. 6 (as the detection circuit input voltage increases, the potential of the capacitor 205 also increases.
The cathode potential of is greater than the anode potential. ) FIG. 8 shows a modification of this embodiment. When the power supply voltage is larger than the input signal rectification value during normal operation, the diode anode is connected as shown in the figure to further speed up the establishment time (FIG. 7C). Note that the connections indicated by broken lines in FIG. 8 are the same as those in FIG. 6 and will therefore be omitted.

次に本発明の第3実施例を第9図、第10図に
よりを説明する。
Next, a third embodiment of the present invention will be described with reference to FIGS. 9 and 10.

本実施例の目的は、相反する要素の遅延回路を
共用し、回路構成部品数を低減し、小形で信頼性
の高い継電器を提供することにある。
The purpose of this embodiment is to provide a compact and highly reliable relay by sharing delay circuits of conflicting elements, reducing the number of circuit components.

互いに相反する要素を備えた継電器にはたとえ
ば過電圧検出要素(以下OV要素と称す)と不足
電圧検出要素(以下UV要素と称す)を備えた過
不足電圧継電器がある。各要素は一般に第9図に
示す構成となつている。即ちレベル検出部301
により入力量と基準量を比較し、遅延回路302
により予め設定された時間遅延された後出力回路
303により外部出力を得る。ところでこれらの
相反する要素は同時に動作出力することはないか
ら、上記遅延回路2は各々独立に有する必要はな
く、共用にして回路簡略化を図ることができる。
Examples of relays that include mutually contradictory elements include overvoltage and undervoltage relays that include an overvoltage detection element (hereinafter referred to as OV element) and an undervoltage detection element (hereinafter referred to as UV element). Each element generally has the configuration shown in FIG. That is, the level detection section 301
The input amount and the reference amount are compared by the delay circuit 302.
After being delayed by a preset time, the output circuit 303 obtains an external output. By the way, since these contradictory elements do not operate and output at the same time, it is not necessary to have each of the delay circuits 2 independently, but they can be shared to simplify the circuit.

以下、本実施例を第10図により説明する。 This embodiment will be explained below with reference to FIG.

正常時は過電圧検出回路1A、不足電圧検出回
路301B共、出力が「L」、よつてORゲート
304の出力は「L」、よつてカウンタ302A
はリセツト状態、よつてカウンタ302Aの出力
「L」、よつて出力回路303A,303Bは不動
作となる。
During normal operation, the output of both the overvoltage detection circuit 1A and the undervoltage detection circuit 301B is "L", so the output of the OR gate 304 is "L", and therefore the output of the counter 302A is "L".
is in a reset state, so the output of the counter 302A is "L", and the output circuits 303A and 303B are inoperative.

過電圧(不足電圧)時には301A(301B)
出力「H」→ORゲート304出力「H」→カウ
ンタ302Aリセツト解除カウンタ302Aカウ
ント開始→カウンタ出力「H」→動作時間整定ス
イツチ302B,302Cを介しANDゲート3
06,305へ入力→ANDゲート306,30
5出力「H」→出力回路303A,303B動作
となる。
301A (301B) when overvoltage (undervoltage)
Output "H" → OR gate 304 output "H" → Counter 302A reset release counter 302A count start → Counter output "H" → AND gate 3 via operating time setting switches 302B and 302C
Input to 06,305 → AND gate 306,30
5 output "H" → output circuits 303A and 303B operate.

本実施例によれば、相反する要素の遅延回路を
共用することができる。
According to this embodiment, delay circuits of contradictory elements can be shared.

以上の実施例によれば、検出電圧と継電器内制
御回路電源を同一ラインより得ており、さらにゲ
ート回路の組合せにより初期異常電圧に対しては
出力リレーが無励磁状態を保つので電路の遮断器
の投入が阻止され信頼性の高い電路の保護が可能
となる。
According to the above embodiment, the detection voltage and the power supply for the control circuit inside the relay are obtained from the same line, and the combination of the gate circuit keeps the output relay in a non-excited state in the event of an initial abnormal voltage, so the circuit breaker This makes it possible to protect the electrical circuit with high reliability.

[発明の効果] 本発明によれば、2次側電路の正常状態の電圧
に対する以上電圧時に断路器が投入されても誤動
作の発生も防止できて信頼性に優れるとともに電
路の保護機能に優れた過不足電圧継電器を得るこ
とができる。
[Effects of the Invention] According to the present invention, even if the disconnector is turned on when the voltage is higher than the voltage in the normal state of the secondary circuit, malfunction can be prevented, resulting in excellent reliability and an excellent protection function for the circuit. Over/under voltage relays can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の全体構成を示すブ
ロツク図、第2図は本発明の1実施例の回路図、
第3図、第4図は本発明の一実施例の各部の波形
図、第5図A、第5図Bは本発明の1実施例の具
体的回路図、第6図、第8図は電源確立を早める
ための回路を示す回路図、第7図は第6図、第8
図の回路における波形図、第9図は相反する要素
の遅延回路を備えた継電器の一般的構成を示すブ
ロツク図、第10図は相反する要素の遅延回路を
共用した継電器の回路図、第11図は高圧受電設
備の1例を示すブロツク図である。 50:電圧検知手段、52:過電圧検出手段、
54:不足電圧検出手段、56:計数手段、5
8:出力手段、60:電源供給手段。
FIG. 1 is a block diagram showing the overall configuration of one embodiment of the present invention, FIG. 2 is a circuit diagram of one embodiment of the present invention,
FIGS. 3 and 4 are waveform diagrams of various parts of an embodiment of the present invention, FIGS. 5A and 5B are specific circuit diagrams of an embodiment of the present invention, and FIGS. 6 and 8 are A circuit diagram showing a circuit for speeding up the establishment of power supply, Figure 7 is similar to Figure 6 and Figure 8.
9 is a block diagram showing the general configuration of a relay equipped with delay circuits of contradictory elements. FIG. 10 is a circuit diagram of a relay that shares delay circuits of contradictory elements. The figure is a block diagram showing an example of high voltage power receiving equipment. 50: voltage detection means, 52: overvoltage detection means,
54: Undervoltage detection means, 56: Counting means, 5
8: Output means, 60: Power supply means.

Claims (1)

【特許請求の範囲】[Claims] 1 断路器の2次側電路に接続される入力端子
と、この入力端子の出力を整流、平滑する全波整
流回路とこの全波整流回路に接続された安定化電
源回路とこの安定化電源回路の出力に接続された
コンデンサを有する電源電圧供給手段と、上記コ
ンデンサの電圧を基準電圧と比較してこの基準電
圧に達したときに出力を発生する比較器を有する
制御電源確立検出回路と、上記電源供給手段と並
列に上記入力端子に接続された電圧検知手段と、
該電圧検知手段の出力端子に接続されて過電圧検
出回路と不足電圧検出回路を有し上記2次側電路
の正常状態の電圧に対する過電圧または不足電圧
の少なくともいずれか一方を検出して出力を発生
する異常電圧検出手段と、この異常電圧検出手段
に接続され上記過電圧検出回路の出力と上記電源
供給手段の出力の論理和をとる第1のORゲート
と上記不足電圧検出回路の出力と上記電源供給手
段の出力の論理和をとる第2のORゲートとこれ
ら第1のORゲート、第2のORゲートの出力と
上記制御電源確立検出回路の出力の論理積をとる
3入力ANDゲートを有し、この3入力ANDゲー
トの出力が上記第1のORゲート、第2のORゲ
ートのそれぞれ上記電源供給手段に接続された側
の入力にフイードバツクされて電源確立前は出力
が禁止され、電源確立時点で上記第1のORゲー
トの出力と上記第2のORゲートの出力の論理積
を保持する保持手段と、上記異常電圧検出手段に
接続され上記2次側電路の正常状態の電圧に対す
る異常電圧の断続時間に比例した計数を行ない、
この計数値が所定数に達したとき出力を発生する
計数手段と、この計数手段の出力と上記保持手段
の出力を入力とする2入力ANDゲートを有して
上記保持手段の異常電圧に対する出力と上記計数
手段の計数値が所定数に達したときの出力の少な
くとも一方が入力されたときに前記入力端子の電
圧が上記2次側電路の正常状態の電圧に対して異
常であることを示す出力を発生する出力手段と、
この出力手段に接続され上記2次側電路に接続さ
れた遮断器を上記電路の電圧が正常状態であると
き投入可能となるようその開閉動作を制御する開
閉手段を備え、上記電源供給手段は上記異常電圧
検出手段、計数手段、出力手段および開閉手段に
電源を供給するよう構成されたことを特徴とする
過不足電圧継電器。
1. An input terminal connected to the secondary circuit of the disconnector, a full-wave rectifier circuit that rectifies and smoothes the output of this input terminal, a stabilized power supply circuit connected to this full-wave rectifier circuit, and this stabilized power supply circuit. power supply voltage supply means having a capacitor connected to the output of the control power supply establishment detection circuit having a comparator that compares the voltage of the capacitor with a reference voltage and generates an output when the reference voltage is reached; voltage detection means connected to the input terminal in parallel with the power supply means;
It is connected to the output terminal of the voltage detection means and has an overvoltage detection circuit and an undervoltage detection circuit, and detects at least one of overvoltage or undervoltage with respect to the voltage in the normal state of the secondary side electric circuit and generates an output. Abnormal voltage detection means, a first OR gate connected to the abnormal voltage detection means and ORing the output of the overvoltage detection circuit and the output of the power supply means, the output of the undervoltage detection circuit, and the power supply means. It has a second OR gate that takes the logical sum of the outputs of the circuit, and a three-input AND gate that takes the logical product of the outputs of the first and second OR gates and the output of the control power supply establishment detection circuit. The output of the 3-input AND gate is fed back to the input of the first OR gate and the second OR gate connected to the power supply means, and the output is prohibited before the power supply is established, and when the power supply is established, the above holding means for holding the logical product of the output of the first OR gate and the output of the second OR gate; and a holding means connected to the abnormal voltage detection means, the intermittent period of the abnormal voltage with respect to the normal state voltage of the secondary circuit. Perform counting proportional to
It has a counting means that generates an output when the counted value reaches a predetermined value, and a two-input AND gate that receives the output of this counting means and the output of the holding means as input, and outputs an output in response to the abnormal voltage of the holding means. An output indicating that the voltage at the input terminal is abnormal with respect to the voltage in the normal state of the secondary circuit when at least one of the outputs is input when the count value of the counting means reaches a predetermined number. an output means for generating
The circuit breaker connected to the output means and connected to the secondary circuit is provided with switching means for controlling the opening/closing operation of the circuit breaker so that it can be turned on when the voltage of the circuit is in a normal state, and the power supply means is connected to the secondary circuit. An over/under voltage relay configured to supply power to abnormal voltage detection means, counting means, output means, and switching means.
JP25429084A 1984-11-30 1984-11-30 Relay for excessive or short voltage Granted JPS61132032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25429084A JPS61132032A (en) 1984-11-30 1984-11-30 Relay for excessive or short voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25429084A JPS61132032A (en) 1984-11-30 1984-11-30 Relay for excessive or short voltage

Publications (2)

Publication Number Publication Date
JPS61132032A JPS61132032A (en) 1986-06-19
JPH0519373B2 true JPH0519373B2 (en) 1993-03-16

Family

ID=17262909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25429084A Granted JPS61132032A (en) 1984-11-30 1984-11-30 Relay for excessive or short voltage

Country Status (1)

Country Link
JP (1) JPS61132032A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014199724A (en) * 2013-03-29 2014-10-23 パナソニック株式会社 Undervoltage tripper for circuit breaker and overvoltage/undervoltage tripper

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5649230U (en) * 1979-09-25 1981-05-01
DE3117338A1 (en) * 1981-05-02 1982-11-18 Heidelberger Druckmaschinen Ag, 6900 Heidelberg "ELECTRICAL SAFETY DEVICE FOR CONTROLLING A PRINTING MACHINE"

Also Published As

Publication number Publication date
JPS61132032A (en) 1986-06-19

Similar Documents

Publication Publication Date Title
US5808847A (en) Electronic trip device comprising a power supply device
EP0782779B1 (en) Transient voltage protection circuit for electrical power converters
US4618811A (en) Voltage regulator for charging generator
JP2608701B2 (en) Inspection circuit for protective device
JPH05137253A (en) Abnormal voltage detection controller
JPH04156222A (en) Inverter device
JPH0519373B2 (en)
US5541499A (en) Electronic trip device comprising a power supply control device
TW417321B (en) Charging and discharging control circuit and charging type power supply device
JPS61139220A (en) Phase missing detection circuit for 3-phase altering current
JP2656532B2 (en) Electric circuit state detecting device and electric device using the same
JPH0440926B2 (en)
KR860002721Y1 (en) Leakage breaker
JPH03239163A (en) Voltage type inverter
JPS5950772A (en) Power source
JPH027831A (en) Protective circuit for inverter
JPH05336652A (en) Power supply protective circuit for electronic appliance
JPH0639439Y2 (en) Power failure alarm circuit for DC stabilized power supply
JPS61150610A (en) Missing phase detector/breaker for neutral line
JPS61164418A (en) Neutral-conductor open-phase detecting breaker
JPH1042488A (en) Power supply
JPH054014Y2 (en)
JPH0297276A (en) Ac input automatic switching circuit
JPH02136024A (en) Service interruption detection circuit
JPH01274664A (en) Dc constant-voltage power source

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term