JPH0526151B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transmitting device that transmits ultrasonic detection signals in a wide range of directions, which is applied to, for example, an underwater detection device that transmits and receives ultrasonic detection signals to detect in a wide range of directions. The present invention relates to a preferred multiple signal generation device.

Conventionally, a plurality of ultrasonic transducers arranged in a circle or an arc were simultaneously excited to emit ultrasonic detection signals in a wide range of directions. In this conventional method, the ultrasonic detection signal sent from the ultrasonic transducer is spread over a wide area, so the sound pressure in each direction must be small, and there is a limit to improving the S/N ratio. Ta.

One object of the present invention is to provide a transmitting device that transmits an ultrasonic detection signal so that sound pressure of a predetermined level or higher can be obtained in each direction over a wide range without using a high-output transmitter. be.

Another object of the present invention is to provide a multiple signal generation device that can generate signals to be supplied to each ultrasonic transducer with a simple configuration.

Examples of the present invention will be described below.

FIG. 1 is an explanatory diagram for arbitrarily changing the direction in which the ultrasonic detection signal of the present invention is transmitted when it is transmitted. In the same figure, the ultrasonic transducer Zi
If the array interval of is d, and the wavelength of the ultrasonic detection signal transmitted from the ultrasonic transducer Zi is λ, then Ui(t)=Visin(ωct+Ai) (1) Also, Ai=2π/λ(i−1 )dsinθ (2) Therefore, from equations (1) and (2), the signal Ui(t) supplied to each transducer for transmitting a transmission beam with directivity in the θ direction is Ui (t)=Visin{ωct+2π/λ(i-1)dsinθ (3) As is clear from equation (3), by changing the phase term θ in the signal Ui(t), the directivity of the ultrasonic detection signal can be changed. The direction θ of can be changed.

Now, assuming that the pointing direction θ of the ultrasonic detection signal is changed to θs in time Ts, θ=θs/Tst (4) where 0≦t≦Ts. Therefore, by substituting equation (4) into equation (3), Ui(t)=Visin{ωct+2π/λ(i-1) dsin(θs/Tst)}=Visin2π{fc+(i-1) ABsinBt/Bt }t (5). However, ωc=2πfc, A=d/λ, and B=θs/Ts. In equation (5), Fci=fc+(i-1)ABsinBt/Bt (6) represents the frequency term of signal Ui(t), and the directivity direction θ is Ts
When changing from 0 to θs in time, the signal Ui(t)
The frequency Fci of changes according to equation (6). Conversely, if the frequency Fci of the signal Ui(t) is changed according to equation (6), the directivity direction of the transmitted signal given as an output in FIG. 1 can be changed arbitrarily.

That is, the signal Ui supplied to the ultrasonic transducer Zi
Changing the frequency Fci of (t) according to equation (6) is
This is equivalent to changing the phase, and thereby the directivity direction of the transmitted signal can be changed arbitrarily.

In equation (6), when t=0, sinBt/Bt=1, so Fci=fc Also, in equation (5), when t=0, Ui(t)=0 Therefore, t=0, that is, the pointing direction θ When θ=0, each signal guided to the ultrasonic transducers Z ₁ to Zn has a frequency of fc and an in-phase phase. Then, when the pointing direction changes to θ, the frequency of each signal changes according to equation (6).

FIG. 2 shows an embodiment of the present invention, and shows an example of a signal generator that generates one signal whose frequency and phase are regulated as described above.

In FIG. 2, a clock pulse sent from a clock pulse source 1 is divided in frequency by a predetermined frequency division ratio (1/2 in this example) in a frequency division circuit 2, and then
It is sent to counter 3. Counter 3 counts these clock pulses and sends the counted value to read-only memory 4.

The read-only memory 4 has memory addresses corresponding to at least the counting capacity of the counter 3, and each memory address stores the amplitude for each phase of a desired frequency signal whose frequency matches the resonance frequency of the ultrasonic transducer. Data is being written. In the embodiment shown in FIG. 2, the amplitude data for each phase is stored as 1-bit data, and the stored data at each memory address specified by the counter 3 is output as a 1-bit output of either a low level or a high level. Sent with . This storage output of the read-only memory 4 is latched by a latch circuit 5 and then sent out as an output signal. The latch circuit 5 latches the data stored in the read-only memory 4 using the latch pulse train sent from the latch pulse generation circuit 6, and outputs a voltage (current) corresponding to the stored data. The output of this latch circuit 5 is applied to one corresponding ultrasonic transducer.

3a shows a pulse train of the clock pulse source 1, and pulse train b in FIG. 3b shows the output of the frequency divider circuit 2. In FIG. The latch pulse generation circuit 6 is composed of a logic circuit, and uses the pulse train a and the frequency-divided pulse b to generate the latch pulse shown in the figure c. The latch circuit 5 latches the read output of the read-only memory 4 at the rising edge of the latch pulse c. On the other hand,
The count value of the counter 3 changes at the rising edge of the frequency-divided pulse b and is read out accordingly, but the stored data of the read-only memory 4 is sent out with a delay of a minute time Δt after the storage address is designated. FIG. 3d shows the readout output of the stored data, with a time delay of Δt from the rise of the frequency-divided pulse b. The latch circuit 5 latches this readout output at the rising edge of the latch pulse c and sends it out. Therefore, as shown in FIG. 3e, the output of the latch circuit 5 is maintained at a high level when the stored data at the designated memory address is at a high level, and when the stored data at the designated memory address is at a low level. When , the latch output also sends out a square wave that changes to a low level.

As is clear from the above, the repetition period and phase of this rectangular wave e can be arbitrarily set by appropriately writing data at each storage address in the read-only memory 4. For example, when the count value of counter 3 changes from time t = 0 to t = Ts, a rectangular wave train whose phase matches equation (5) and whose repetition frequency matches equation (6) is created. Obtainable.

FIG. 4 shows that, based on the above, seven transducers Z ₁ to _{Z 7} linearly arranged at predetermined intervals are used to direct the ultrasonic detection signal to -Ts as shown in FIG.
FIG. 3 is a block diagram showing a specific configuration for changing from -θs to +θs from time to time +Ts.

In the same figure, the arrangement interval of ultrasonic transducers Z ₁ to _{Z 7} is d, and the signal applied to each ultrasonic transducer Z ₁ to _{Z 7} is U ₁ (t)=V・sin (2πfct+φ1) U ₂ (t)=V・sin (2πfct+φ2) U ₃ (t)=V・sin (2πfct+φ3) U ₄ (t)=V・sin (2πfct+φ4) U ₅ (t)=V・sin (2πfct+φ5) U ₆ (t )=V・sin(2πfct+φ6) U ₇ (t)=V・sin(2πfct+φ7) (7) Then, as described above, by controlling the phases φ1 to φ7 of the signals U ₁ (t) to _{U 7} (t), respectively, the pointing direction of the ultrasonic detection signal can be changed from −θs to +θs. Therefore, equation (7) is U ₁ (t)=V・sin (2πfct+6πd/λsinθs/Tst) U ₂ (t)=V・sin (2πfct+4πd/λsinθs/Tst) U ₃ (t)=V・sin (2πfct+2πd/λsinθs/Tst) U ₄ (t)=V・sin(2πfct) U ₅ (t)=V・sin(2πfct+2πd/λsinθs/Tst) U ₆ (t)=V・sin(2πfct−4πd/λsinθs /Tst) U ₇ (t)=V・sin(2πfct−6πd/λsinθs/Tst) (8) In equation (8), if we set d/λ=A θs/Ts=B, equation (8) becomes It is transformed as follows.

U ₁ (t)=V・sin2π(fc+3ABsinBt/Bt)t U ₂ (t)=V・sin2π(fc+2ABsinBt/Bt)t U ₃ (t)=V・sin2π(fc+ABsinBt/Bt)t U ₄ (t) =V・sin2πfc・t U ₅ (t)=V・sin2π(fc−ABsinBt/Bt)t U ₆ (t)=V・sin2π(fc−2ABsinBt/Bt)t U ₇ (t)=V・sin2π( fc−3ABsinBt/Bt)t (9) Therefore, from the signal generator to each ultrasonic transducer Z ₁
The signal led to ~Z ₇ is at time t=0, i.e.,
When the directional direction of the transmitted ultrasonic detection signal matches the front direction with respect to the transducer array surface, the phases of each signal match, and when −Ts≦t≦Ts, the frequency of each signal Fc ₁ to Fc ₇ is Fc ₁ = fc + 3ABsinBt/Bt Fc ₂ = fc + 2ABsinBt/Bt Fc ₃ = fc + ABsinBt/Bt Fc ₄ = fc Fc ₅ = fc−ABsinBt/Bt Fc ₆ = fc−2ABsinBt/Bt Fc ₇ = fc−3ABsinBt/Bt (10). For example, if fc=50×10 ³ Hz d=λ/2, θs=π/4, Ts=1mses, then A=d/λ=1/2 B=θs/Ts=π/4×10 ³ Therefore, when time t=-Ts, [Fc ₁ ] 50×10 ³ +1060 [Hz] t=-Ts Also, when time t=0, sinBt/Bt=1, so [Fc ₁ ] 50×10 ³ +1178 [Hz] t=0 Also, time t=Ts [Fc ₁ ] 50×10 ³ +1060 [Hz] t=Ts Therefore, when changing the pointing direction from -45 degrees to +45 degrees within 2 msec, Each ultrasonic transducer Z ₁
The signal led to ~Z ₇ is derived from a high frequency whose frequency Fc ₁ is 1060 Hz higher than the reference frequency fc
Changes to a higher frequency by 1178Hz, then 1060Hz
It changes as if returning to a higher frequency. This frequency change is represented by curve R ₁ in FIG. Also, the other curves R ₂ to R ₇ are the frequencies of other signals
Represents changes from Fc ₂ to Fc ₇ .

In FIG. 4, the read-only memory 4' repeatedly sends out a rectangular wave train whose frequency coincides with each of the frequencies Fc ₁ to Fc ₇ of the above-mentioned signal. The read-only memory 4' is the same as the read-only memory 4 shown in FIG.
The output terminals O ₁ to O ₇ are configured to have a built-in set, and the stored data at the storage address designated by the counter 3 is read out independently.

The counter 3 counts the output pulses of the 1/2 frequency divider 2 in the same manner as in FIG. 4, and the storage address of the read-only memory 4' is designated by the counted value. Therefore, the pulse train sent from the frequency divider circuit 2 to the counter 3 is set to be sufficiently smaller than the cycle of the rectangular wave train generated by reading the data stored in the read-only memory 4'. For example, if the repetition frequency of the rectangular wave train used as a signal is 50 KHz, the period is 20 μsec, so if the counting pulse of counter 3 is set to about 0.5 μsec, the period of the rectangular wave train is set to 1/1 wavelength. Can be memorized with an accuracy of 40. Also, when counting for 2 msec with a 0.5 μsec clock, the count value of counter 3 is
4000, a read-only memory 4' having 4000 storage addresses for each data output O ₁ to O ₇ is used.

A rectangular wave train sent out from each of the output terminals O ₁ to O ₇ by reading the data stored in the read-only memory 4' is transmitted to the ultrasonic transducers Z ₁ to Z ₇ via the amplifiers P ₁ to P ₇ .
added to. Therefore, when the count value of the counter 3 changes once, each ultrasonic transducer Z ₁ to _{Z 7}
An ultrasonic detection signal whose pointing direction changes from -θs to θs is transmitted from the . And counter 3
As mentioned above, since the counting operation is performed in an extremely short time of 2 msec, the direction change of the ultrasonic detection signal is also performed within this short time. Therefore, ultrasonic detection signals are transmitted in a wide range of directions from the ultrasonic transducers Z ₁ to _{Z 7} .

Note that the stored data sent out from each output terminal O ₁ to O ₇ of the read-only memory 4' is latched by each latch circuit 5 ₁ to 5 ₇ , and then sent to each ultrasonic transducer Z ₁ to Z. Sent to ₇ .

Note that the ultrasonic transducers Z ₁ to _{Z 7} may also be used for transmitting and receiving waves.

As explained above, the present invention allows the frequency or phase to be changed at a desired repetition period by reading out data stored in a storage circuit.
Ultrasonic detection signals can be automatically transmitted in different directions sequentially. Therefore, an ultrasonic detection signal having a sound pressure of a predetermined level or higher can be transmitted in a wide range of directions without using a high-output transmitter. Moreover, it can be realized with a relatively simple configuration; for example, the memory circuit 4' is commercially available as a high-density integrated circuit, so the circuit configuration can be made much smaller and lighter than conventional devices. Furthermore, the price can be made sufficiently low.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram for transmitting ultrasonic detection signals in beam form in different directions, and Fig. 2 is an illustration of a signal generator that generates one signal whose frequency and phase are regulated according to an embodiment of the present invention. A block diagram showing an example, FIG. 3 is a timing chart for explaining its operation, FIG. 4 is a block diagram showing the overall configuration of the transmitter according to the embodiment of the present invention, and FIGS. 5 and 6 are explanations of the operation. It is a diagram. Z ₁ ~ _{Z 7} ... Ultrasonic transducer, 4, 4' ... Memory circuit, 3 ... Counting circuit (counter), 5, 5 ₁ - 5 ₇
...Latch circuit.

Claims (1)

[Claims] 1. A plurality of ultrasonic transducers linearly arranged at predetermined intervals, and a plurality of types whose frequencies change by a specific amount at a specific time corresponding to the number of ultrasonic transducers. a signal generator that generates a signal, the signal generator comprising: a memory circuit in which amplitude data for each phase of the signal whose frequency changes is written in advance in a memory address corresponding to each phase; and the above-mentioned desired signal generator. a clock pulse train generation circuit that generates a clock pulse train with a cycle sufficiently smaller than the period of the frequency signal; a counting circuit that designates a memory address in the memory circuit in one cycle; and a voltage (current) output corresponding to the memory data read every time the memory address of the memory circuit is designated by the counting circuit until the next memory data is read. A transmitting device comprising: a latch circuit that transmits data to a sound wave vibrator; 2. In a multi-signal generation device that supplies a plurality of excitation signals to a plurality of ultrasonic transducers linearly arranged at predetermined intervals, A memory device in which amplitude data expressed as “0” or “1” is written in advance at a memory address corresponding to each phase, and a clock pulse train having a cycle sufficiently smaller than the cycle of the desired frequency signal. a clock pulse train generation circuit that generates a clock pulse train; a frequency divider that divides the frequency of the clock pulse train; a latch pulse generation circuit that generates a latch pulse based on the clock pulse and the output pulse of the frequency divider; a counting circuit that counts an output pulse train and sequentially designates the same number of memory addresses as the plurality of memory circuits in the memory circuit to which the counted value corresponds within a specific time period; A latch that sends out a plurality of rectangular wave trains by latching and sending out a voltage (current) output corresponding to the stored data read at each designation of the plurality of storage addresses of the storage device until the next stored data is read out. A multiple signal generation device consisting of a circuit.