JPH0556027B2 - - Google Patents
Info
- Publication number
- JPH0556027B2 JPH0556027B2 JP58160895A JP16089583A JPH0556027B2 JP H0556027 B2 JPH0556027 B2 JP H0556027B2 JP 58160895 A JP58160895 A JP 58160895A JP 16089583 A JP16089583 A JP 16089583A JP H0556027 B2 JPH0556027 B2 JP H0556027B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- light
- thin film
- photoconductivity
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6723—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having light shields
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Solid State Image Pick-Up Elements (AREA)
Description
【発明の詳細な説明】
本発明は、外部光が入射しても、リーク電流が
増加しない薄膜トランジスタに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin film transistor in which leakage current does not increase even when external light is incident.
近年、ガラスなどの絶縁性基板上に形成できる
薄膜トランジスタの開発が各所で盛んである。絶
縁性基板上に、薄膜トランジスタからなるスイツ
チ素子をアレイ状に設けたアクテイブマトリクス
型の液晶、エレクトロルミネセンス、エレクトロ
クロミツクなどの表示装置は、画素間のクロスト
ークがなく、高速動作が可能なのでTV画像など
の表示を可能にする。薄膜トランジスタに用いる
半導体膜としては、プラズマCVD法などによつ
て、ガラスなどの基板上に低温で大面積かつ安価
に形成できる水素化非晶質シリコン膜やフツ素化
非晶質シリコン膜などが有望とされている。しか
し、これらの非晶質シリコン膜は、太陽電池への
応用で知られているように、大きな光伝導性を有
するので、表示装置あるいは光センサーのスイツ
チ素子として薄膜トランジスタを応用する場合、
リーク電流防止の為、必ず遮光を行つて使用する
必要がある。 In recent years, development of thin film transistors that can be formed on insulating substrates such as glass has been active in various places. Display devices such as active matrix liquid crystal, electroluminescent, and electrochromic display devices, in which switch elements made of thin film transistors are arranged in an array on an insulating substrate, have no crosstalk between pixels and can operate at high speed, making them ideal for TVs. Enables display of images, etc. Promising semiconductor films for use in thin film transistors include hydrogenated amorphous silicon films and fluorinated amorphous silicon films, which can be formed at low temperatures, over a large area, and at low cost, on substrates such as glass using plasma CVD methods. It is said that However, these amorphous silicon films have high photoconductivity, as is known from their application to solar cells, so when applying thin film transistors as switch elements for display devices or optical sensors,
In order to prevent leakage current, it is necessary to shield the product from light when using it.
第1図に、従来の遮光とした薄膜トランジスタ
の断面構造図を示す。第1図で、1はガラス基
板、2はゲート電極でアルミニウム、クロム、モ
リブデンなどの金属材料よりなる。3はゲート絶
縁膜で、二酸化シリコン、チツ化シリコンなどよ
りなる。4は水素化非晶質シリコン膜、5はリン
をドープしたn+水素化シリコン膜、6および7
は、それぞれソースおよびドレイン電極で、アル
ミニウム、クロムなどの金属材料よりなる。8お
よび9は絶縁膜で、二酸化シリコン、チツ化シリ
コンなどよりなる。10は遮光膜でアルミニウ
ム、クロムなどの金属材料よりなる。 FIG. 1 shows a cross-sectional structural diagram of a conventional light-shielded thin film transistor. In FIG. 1, 1 is a glass substrate, and 2 is a gate electrode made of a metal material such as aluminum, chromium, or molybdenum. Reference numeral 3 denotes a gate insulating film made of silicon dioxide, silicon nitride, or the like. 4 is a hydrogenated amorphous silicon film, 5 is a phosphorus-doped n + hydrogenated silicon film, 6 and 7
are source and drain electrodes, respectively, and are made of metal materials such as aluminum and chromium. 8 and 9 are insulating films made of silicon dioxide, silicon nitride, or the like. Reference numeral 10 denotes a light shielding film made of a metal material such as aluminum or chromium.
第1図で示した薄膜トランジスタはゲート電極
2を加える電圧により、ソース電極6とドレイン
電極7の間の、非晶質シリコン膜4とゲート絶縁
膜3の界面にチヤネルを形成し、絶縁ゲート電界
効果型トランジスタの動作をする。 In the thin film transistor shown in FIG. 1, a channel is formed at the interface between the amorphous silicon film 4 and the gate insulating film 3 between the source electrode 6 and the drain electrode 7 by the voltage applied to the gate electrode 2, resulting in an insulated gate field effect. It operates like a type transistor.
このトランジスタは、上からの入射光は遮光膜
10により遮られ、下からの入射光はゲート電極
2により遮られるので、ソース・ドレイン電極
6,7の間に光電流は流れることはなく、明るい
場所でもリーク電流は生じない。 In this transistor, incident light from above is blocked by the light shielding film 10, and incident light from below is blocked by the gate electrode 2, so no photocurrent flows between the source and drain electrodes 6 and 7, and the transistor is bright. No leakage current occurs even in places.
ただ、上記薄膜トランジスタは、以下に示す欠
点を免れない。 However, the above-mentioned thin film transistor cannot avoid the following drawbacks.
(1) 遮光膜10と絶縁膜9を形成するための、薄
膜形成工程と、フオトプロセスが遮光を要しな
い場合と比べ2回多くなる。(1) The thin film forming process and photo process for forming the light shielding film 10 and the insulating film 9 are performed twice more than in the case where no light shielding is required.
(2) 遮光膜10と非晶質シリコン膜4の間の容量
結合のため、トランジスタの動作速度が遅くな
る。(2) Due to the capacitive coupling between the light shielding film 10 and the amorphous silicon film 4, the operating speed of the transistor becomes slow.
(3) 遮光膜10と、ソース・ドレイン電極6,7
の間のシヨートによる製造歩留りの低下を招
く。(3) Light shielding film 10 and source/drain electrodes 6, 7
This leads to a decrease in manufacturing yield due to short cuts during the process.
本発明の目的は、上記のごとき従来の欠点を除
去し、容易なプロセスで形成でき、遮光膜を別個
に形成する必要のない薄膜トランジスタの提供す
ることにある。 An object of the present invention is to provide a thin film transistor that eliminates the above-mentioned conventional drawbacks, can be formed by an easy process, and does not require separate formation of a light shielding film.
以下、実施例に基づいて、図面により本発明を
説明する。 Hereinafter, the present invention will be explained with reference to the drawings based on examples.
第2図は、本発明の遮光特性のある半導体膜を
備えた薄膜トランジスタの断面構造を示す図であ
る。 FIG. 2 is a diagram showing a cross-sectional structure of a thin film transistor provided with a semiconductor film having light-shielding properties according to the present invention.
11はガラス基板、12はゲート電極で、アル
ミニユウム、クロム、モリブデンなどの金属材料
からなつている。13はゲート絶縁膜で、2酸化
シリコン、チツ化シリコンなどからなつている。 11 is a glass substrate, and 12 is a gate electrode, which is made of a metal material such as aluminum, chromium, or molybdenum. A gate insulating film 13 is made of silicon dioxide, silicon oxide, or the like.
14は水素化非晶質シリコンよりなる半導体膜
であり、前記ゲート絶縁膜との界面付近では、暗
伝導度が、10-8(Ω・cm)-1以下で、光伝導度が
10-7(Ω・cm)-1以上であり、半導体膜14のゲー
ト絶縁膜と接していない他の表面付近では、暗伝
導度と光伝導度が10-7(Ω・cm)-1以下となるよう
に、前記非晶質半導体膜内で単調に連続変化して
いる。ただし、光伝導度はスペクトルAMIの光
を1mW/cm2以上照射したときの伝導度とする。
グロー放電法などによつて製作した、光伝導度の
大きな非晶質シリコン膜は、局在準位密度が小さ
く、電界効果型トランジスタに用いても良好な特
性を示し、オン電流とオフ電流の比が5桁以上に
なる。15はリンをドープしたn+水素化非晶質
シリコン膜、16および17はそれぞれソースお
よびドレイン電極で、アルミニユウム、クロムな
どの金属材料よりなる。19は絶縁膜で、二酸化
シリコン、チツ化シリコンなどよりなる。トラン
ジスタとしての動作は、第1図で示した従来の薄
膜トランジスタと同様である。 14 is a semiconductor film made of hydrogenated amorphous silicon, and near the interface with the gate insulating film, the dark conductivity is 10 -8 (Ω cm) -1 or less and the photo conductivity is
10 -7 (Ω・cm) -1 or more, and near other surfaces of the semiconductor film 14 that are not in contact with the gate insulating film, the dark conductivity and photoconductivity are 10 -7 (Ω・cm) -1 or less. It changes monotonically and continuously within the amorphous semiconductor film so that . However, the photoconductivity is the conductivity when irradiated with light with a spectrum AMI of 1 mW/cm 2 or more.
Amorphous silicon films with high photoconductivity, manufactured by glow discharge method etc., have a low local level density and exhibit good characteristics even when used in field effect transistors, with low on-current and off-current. The ratio becomes 5 digits or more. 15 is an n + hydrogenated amorphous silicon film doped with phosphorus, and 16 and 17 are source and drain electrodes, respectively, which are made of a metal material such as aluminum or chromium. Reference numeral 19 denotes an insulating film made of silicon dioxide, silicon dioxide, or the like. The operation as a transistor is similar to that of the conventional thin film transistor shown in FIG.
前記非晶質半導体膜14を作る説明をする前
に、シランおよびジシランをグロー放電により非
晶質シリコンを作製する場合の光伝導度と暗伝導
度の製膜速度依存性を第3図に示す。 Before explaining the production of the amorphous semiconductor film 14, FIG. 3 shows the dependence of photoconductivity and dark conductivity on film-forming speed when amorphous silicon is produced by glow discharge of silane and disilane. .
第3図で、横軸は製膜速度、縦軸は伝導度で、
σdは暗伝導度、Δσpは光伝導度を示す。グラフは
シランまたはジシランの流量をパラメータに取つ
ている。 In Figure 3, the horizontal axis is the film forming rate, the vertical axis is the conductivity,
σd indicates dark conductivity, and Δσp indicates photoconductivity. The graph takes the flow rate of silane or disilane as a parameter.
(Matsuda、A.etal:Jpn.J.Appl.Phys、Vol.22、
No.2、1983)、(Scott、B.A.etal.:Appl、Phys.
Lett.Vol.37:727、1980)、(Ogawa、etal:Jpn.
J.Appl.Phys.、Vol.20:L639、1981)
第3図から明らかなように、例えば、ジシラン
において、ゲート絶縁膜上に、ガス流量15sccm、
製膜速度5Å/secにガス流量を調整して製膜を
開始し、その後、順次ガス流量を増加させて製膜
速度を早め、最終段階を20Å/sec以上になるよ
うにすれば、前記非晶質半導体膜14を得ること
ができる。(Matsuda, A.etal: Jpn.J.Appl.Phys, Vol.22,
No. 2, 1983), (Scott, BAetal.: Appl, Phys.
Lett.Vol.37:727, 1980), (Ogawa, etal: Jpn.
J. Appl. Phys., Vol. 20: L639, 1981) As is clear from Figure 3, for example, in disilane, a gas flow rate of 15 sccm is applied on the gate insulating film.
By adjusting the gas flow rate to a film forming rate of 5 Å/sec to start film forming, and then increasing the gas flow rate sequentially to accelerate the film forming rate to a final stage of 20 Å/sec or more, the above-mentioned non-conformity can be achieved. A crystalline semiconductor film 14 can be obtained.
また、ガスの種類も、ジシランだけでなく、シ
ランとを併用しても実現することはできる。 Furthermore, the type of gas used is not limited to disilane, but can also be used in combination with silane.
例えば、始めシランを供給し、その後、ジシラ
ンに切り換えるとか、シランを供給しつつ、順次
これにジシランを加えていくとかの手段により、
前記非晶質半導体膜14の特性を得ることができ
る。 For example, by initially supplying silane and then switching to disilane, or by sequentially adding disilane while supplying silane,
The characteristics of the amorphous semiconductor film 14 can be obtained.
以上の例に示すように、製膜速度、ガス流量、
または、ガスの種類などを適宜選択・調整するこ
とにより、所望の連続的な特性を得ることができ
る。 As shown in the above example, the film forming speed, gas flow rate,
Alternatively, desired continuous characteristics can be obtained by appropriately selecting and adjusting the type of gas.
ところで、光伝導度が大きな非晶質シリコン、
例えば10-7(Ω・cm)-1近辺では、これが光を吸収
する領域では、104〜105cm-1の吸収係数を示す。 By the way, amorphous silicon has high photoconductivity.
For example, in the vicinity of 10 -7 (Ω·cm) -1 , the region where it absorbs light exhibits an absorption coefficient of 10 4 to 10 5 cm -1 .
ちなみに、光伝導度10-7(Ω・cm)-1、吸収係数
105cm-1のとき、膜厚0.5μmのシート抵抗は略1011
(Ω・cm)、光透過率は10-5である。 By the way, the photoconductivity is 10 -7 (Ω・cm) -1 and the absorption coefficient is
At 10 5 cm -1 , the sheet resistance of a film thickness of 0.5 μm is approximately 10 11
(Ω・cm), and the light transmittance is 10 -5 .
このように、暗伝導度、光伝導度がともに10-7
(Ω・cm)-1以下の特性を有する非晶質半導体膜1
4の上側表面は、薄膜トランジスタの遮光膜とし
ての機能を十分に備えている。 In this way, both dark conductivity and photoconductivity are 10 -7
(Ω・cm) Amorphous semiconductor film 1 with characteristics of -1 or less
The upper surface of 4 has a sufficient function as a light shielding film of the thin film transistor.
したがつて、本発明の非晶質半導体膜14は、
この表層部分で大部分の入射光を吸収して遮光特
性を発揮するので、遮光膜の働きをし、加えて、
この光吸収部分は絶縁特性を有している。 Therefore, the amorphous semiconductor film 14 of the present invention is
This surface layer absorbs most of the incident light and exhibits light-shielding properties, so it acts as a light-shielding film, and in addition,
This light absorbing portion has insulating properties.
なお、第2図の実施例では、絶縁膜19を形成
しているが、既に述べたように、本発明の非晶質
半導体膜14の上側表面は、上述したように、絶
縁特性を有しているので、これがなくても十分に
機能を発揮するものである。 In the embodiment shown in FIG. 2, the insulating film 19 is formed, but as described above, the upper surface of the amorphous semiconductor film 14 of the present invention has insulating properties. Therefore, it is fully functional even without this.
上述したように、本発明による薄膜トランジス
タは、
半導体膜の上面に遮光膜の形成を必要とせず、
また、絶縁膜をも必ずしも必要としないために、
その形成プロセスが簡易となり、製作上のプロセ
スが少ないために、製品の歩留りがよい。 As described above, the thin film transistor according to the present invention does not require the formation of a light shielding film on the upper surface of the semiconductor film, and
In addition, since an insulating film is not necessarily required,
The formation process is simplified and the manufacturing process is reduced, resulting in a high product yield.
また、通常の遮光膜を有するトランジスタは、
遮光膜が金属製であるので、トランジスタの浮遊
容量が増加するおそれがあるが、遮光膜のない本
発明ではこのような欠点は生じない。 In addition, a transistor with a normal light-shielding film is
Since the light-shielding film is made of metal, there is a risk that the stray capacitance of the transistor will increase, but such a drawback does not occur in the present invention, which does not have a light-shielding film.
さらに、金属製遮光膜にありがちな、これのシ
ヨートによるトランジスタ不良も発生しないな
ど、本発明は光照射の環境下で顕著な効果を奏す
るものである。 Furthermore, the present invention exhibits remarkable effects in an environment of light irradiation, such as eliminating the occurrence of transistor defects due to shorting, which is common with metal light-shielding films.
第1図は、従来の遮光膜を有する薄膜トランジ
スタの断面図、第2図は、本発明の薄膜トランジ
スタの断面図、第3図は、光伝導度と暗伝導度の
膜製作条件との関係を示す図である。
1,11……ガラス基板、2,12……ゲート
電極、3,13……ゲート絶縁膜、4,14……
非晶質シリコン膜、5,15……n+非晶質シリ
コン膜、6,16……ソース電極、7,17……
ドレイン電極、8,9,19……絶縁膜。
FIG. 1 is a cross-sectional view of a thin film transistor having a conventional light-shielding film, FIG. 2 is a cross-sectional view of a thin film transistor of the present invention, and FIG. 3 is a diagram showing the relationship between photoconductivity and dark conductivity with film manufacturing conditions. It is a diagram. 1, 11... Glass substrate, 2, 12... Gate electrode, 3, 13... Gate insulating film, 4, 14...
Amorphous silicon film, 5, 15...n + amorphous silicon film, 6, 16... source electrode, 7, 17...
Drain electrode, 8, 9, 19...insulating film.
Claims (1)
絶縁膜、シリコンを含む非晶質半導体膜、およ
び、ソース・ドレイン電極を有する絶縁ゲート電
界効果型薄膜トランジスタにおいて、 前記非晶質半導体膜は、前記ゲート絶縁膜との
界面付近では暗伝導度が10-8(Ω・cm)-1以下で光
伝導度が10-7(Ω・cm)-1以上であり、他の表面付
近では暗伝導度と光伝導度が10-7(Ω・cm)-1以下
となるように、前記非晶質半導体膜内で連続的に
変化していることを特徴とする絶縁ゲート電界効
果型薄膜トランジスタ。[Scope of Claims] 1. An insulated gate field effect thin film transistor provided on an insulating substrate and having a gate electrode, a gate insulating film, an amorphous semiconductor film containing silicon, and a source/drain electrode, comprising: The quality semiconductor film has a dark conductivity of 10 -8 (Ω cm) -1 or less and a photoconductivity of 10 -7 (Ω cm) -1 or more near the interface with the gate insulating film, and other An insulated gate electric field characterized in that the insulated gate electric field changes continuously within the amorphous semiconductor film so that dark conductivity and photoconductivity are 10 -7 (Ω cm) -1 or less near the surface. Effective thin film transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58160895A JPS6052057A (en) | 1983-09-01 | 1983-09-01 | Insulated gate field-effect type thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58160895A JPS6052057A (en) | 1983-09-01 | 1983-09-01 | Insulated gate field-effect type thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6052057A JPS6052057A (en) | 1985-03-23 |
| JPH0556027B2 true JPH0556027B2 (en) | 1993-08-18 |
Family
ID=15724678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58160895A Granted JPS6052057A (en) | 1983-09-01 | 1983-09-01 | Insulated gate field-effect type thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6052057A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61208876A (en) * | 1985-03-14 | 1986-09-17 | Sony Corp | Thin film transistor |
| FR2593631B1 (en) * | 1986-01-27 | 1989-02-17 | Maurice Francois | GRID RESISTANT ACTIVE MATRIX DISPLAY SCREEN AND METHODS OF MAKING SAME |
| JP2756121B2 (en) * | 1988-07-13 | 1998-05-25 | 三菱電機株式会社 | Method for manufacturing thin film transistor |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5890783A (en) * | 1981-11-25 | 1983-05-30 | Mitsubishi Electric Corp | Semiconductor device |
-
1983
- 1983-09-01 JP JP58160895A patent/JPS6052057A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6052057A (en) | 1985-03-23 |
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