JPH0562780B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcode generation circuit for generating addresses (memory addresses) used to control a memory and memory control signals.

[Prior Art] Fig. 2 is an electrical circuit diagram showing a conventional microcode generation circuit. In Fig. 2, 1 is a program sequencer, 2 is an address generator, 3 is a microcode memory, 4 is a RAM, 5
is an external interrupt multiplexer.

Next, the operation will be explained. First, by the interrupt output from the external interrupt multiplexer 5,
The program sequencer 1 outputs an address to the microcode memory 3 in response to interrupt processing. The microcode memory 3 to which the address has been inputted in this manner outputs the program sequencer 1 instruction and also outputs the address generator 2 instruction and address data.

Further, a memory write signal or a memory read signal and a memory chip select signal as a memory control signal are outputted to the RAM 4. The address generator 2 then outputs an address (memory address) to the RAM 4 in accordance with the instruction and address data.

[Problems to be solved by the invention] Since the conventional microcode generation circuit is configured as described above, for one interrupt,
Since access to RAM4 is limited to either read mode or write mode, there are problems such as two external interrupts being required to read/write RAM4.

This invention was made to solve the above-mentioned problems, and it is possible to select whether the memory is in read mode or write mode with a single external interrupt, and it is also possible to mutually transfer data between memories. The purpose of the present invention is to obtain a microcode generation circuit that enables the following.

[Means for Solving the Problems] A microcode generation circuit according to the present invention is provided with a plurality of microcode memories and a means for externally controlling the data output gate of the microcode memory. be.

[Operation] In the microcode generation circuit according to the present invention, a plurality of microcode memories are controlled by an external control means, so that one external interrupt can select whether to put the memory in read mode or write mode. In addition to being able to transfer data between memories, it also becomes possible to transfer data between memories.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In FIG. 1, 1 is a program sequencer, 2 is an address generator, 3 is a microcode memory, 4 is a RAM, and 5 is an external interrupt multiplexer. A plurality of microcode memories 3 are provided for one RAM 4. Reference numeral 6 designates an external selection signal generation circuit as a means for controlling the data output gate of each microcode memory 3 from the outside.

Next, the operation will be explained. When the external interrupt multiplexer 5 outputs an interrupt in response to an external interrupt, the program sequencer 1 outputs an address (address information) to the microcode memory 3 in response to the interrupt processing.

By the way, before the microcode memory 3 inputs an external interrupt to the program sequencer 1,
Since the chip select signal of any microcode memory 3 is enabled and selected by the external selection signal generation circuit 6, the program sequencer 1, address generator 2, instruction and At the same time as address data is output, a memory control signal (memory read signal, memory write signal) is output to the RAM 4.

And these multiple microcode memories 3
Since microcodes for read access and write access are prepared for each RAM4, either read access or write access to RAM4 can be executed in response to one external interrupt, and therefore both RAM4 and RAM4 accesses can be executed. Direct data transfer, that is, mutual data transfer becomes possible.

[Effects of the Invention] As described above, according to the present invention, a plurality of microcode memories are provided in the memory, and the access method to the memory can be selected from read mode or write mode by selection from an external control means. Memory data transfer can be performed bidirectionally with one external interrupt, which has the effect of providing a highly versatile microcode generation circuit.

[Brief explanation of the drawing]

FIG. 1 is an electrical circuit diagram showing a microcode generating circuit according to an embodiment of the present invention, and FIG. 2 is an electrical circuit diagram showing a conventional microcode generating circuit. In the figure, 1...program sequencer,
2... Address generator, 3... Microcode memory, 4... RAM (memory), 5... External interrupt multiplexer, 6... External selection signal generation circuit as external control means. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] 1 In a microcode generation circuit that controls memory by generating memory addresses and memory control signals, there is a program sequencer that receives an interrupt signal from the outside and outputs address information, and a program sequencer that receives the above address information from the program sequencer and generates an address. The microcode memory includes a microcode memory that outputs a signal for generating the address and the memory control signal, and an address generator that receives the signal for generating the address from the microcode memory and outputs the memory address. A microcode generation circuit, characterized in that a plurality of code memories are provided for the memory, and means for externally controlling a data output gate of each of the microcode memories is provided.