JPH0564473B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a superconducting device having a semiconductor at a junction, that is, a superconductor-semiconductor-superconductor coupled device.

Many attempts have been made to create superconducting devices using semiconductors as a barrier because they have a low energy barrier to electrons, so the barrier length can be made long, and it is possible to create superconducting three-terminal devices by electrically controlling the semiconductor. However, nothing of practical use has been obtained.

[Conventional technology]

For example, FIG. 1 shows a cross-sectional structure of a conventional semiconductor-coupled superconducting element. In the figure, 1 is a semiconductor substrate,
2 is a superconducting electrode, 3 is a near end of the electrode, and L is a superconducting electrode spacing. In the devices realized so far, a superconducting current has been obtained by using single crystal silicon as the semiconductor 1 and increasing the p-type concentration by diffusion or ion implantation.

However, in this case, the carrier concentration is 1×10 ²⁰ cm ^-3
In addition, superconducting electrode spacing L of only about 0.1 μm has been realized. Carrier concentration
At 10 ²⁰ cm ^-3, it can no longer be called a semiconductor and is metallic, and its characteristics as a semiconductor such as a transistor or FET element cannot be utilized. In addition, a superconducting electrode spacing of 0.1 μm is close to the limit of microfabrication technology, and it is difficult to match device characteristics in devices such as LSI where manufacturing deviation is an important factor. It is also very difficult to form a third terminal on a semiconductor.

By the way, the characteristics of a semiconductor-coupled superconducting device are closely related to the superconducting diffusion length ξ _N in the semiconductor. According to the superconducting proximity effect theory, ξ _N is the carrier density of the semiconductor, n (cm ^-3 ), and its mobility is μ (cm ² /V S).
Then, it is proportional to n ^1/3 μ ^1/2 , and usually ξ _N is 0.01 ~
It is on the order of 0.1 μm. Since the maximum value of the superconducting current obtained is proportional to e ^-L/ 〓 ^N , its magnitude decreases rapidly when L becomes longer than ξ _N. That is, the semiconductor-coupled superconducting element is a short distance device, and the planar structure as shown in FIG. 1 is very disadvantageous because the effective superconducting electrode spacing is set back and the electrode area cannot be secured at the short distance 3. Furthermore, in a three-terminal device, it is desirable to reduce the carrier concentration, and therefore ξ _N becomes smaller and smaller, which has a significant effect.
As a result, in the structure shown in FIG. 1, since isolation was not provided in the part where the superconducting electrodes were far apart, the normal conduction leakage current was large in this part, and good device characteristics could not be obtained.

Next, referring to the method for manufacturing the device, FIG. 2 shows a conventional manufacturing method, in which a superconducting electrode 2 is formed on the entire surface of a semiconductor substrate 1 by vapor deposition, etc., and then a resist 5 is formed by light or electron beam lithography.
Open a window according to the required element length L in a part of the (second
Figure a), and then the superconducting electrode 2 is separated by etching (Figure 2b). By the way, in semiconductor coupled superconducting devices, L is on the order of 0.1 to 1 μm, so
It is impossible to perform etching by a wet method because of underetching. Therefore, dry etching methods such as ion milling and sputter etching have been used. However, these dry etching methods pose a problem of damage to the surface portion 6 of the semiconductor substrate after the superconducting electrode is removed. This effect is small for semiconductors made of stable materials such as silicon, but compound semiconductors, especially high-mobility semiconductors such as InAs and InSb, which are advantageous as semiconductor materials for this device, have a higher It is said to be "soft" and suffers significant damage during dry etching due to compositional separation. The mobility of the semiconductor is an important parameter in semiconductor-coupled superconducting devices, but since damage to the semiconductor causes a decrease in mobility, the surface shown in Figure 1 has a fatal effect on devices that flow superconducting current. give. Furthermore, in the etching method, there is a problem of residual superconducting electrodes due to incomplete etching, but if this occurs, superconducting current will flow directly through this portion, making it impossible to fabricate the desired device. For this reason, it is necessary to complete the electrode etching, but the more complete the etching, the greater the underetching or spatter damage, making it impossible to fabricate the device.

[Problem that the invention seeks to solve]

The present invention solves the problem that the above-mentioned conventional semiconductor-coupled superconducting device requires severe technical conditions to obtain a superconducting current and cannot obtain good device characteristics due to large normal conduction leakage current. The present invention also solves problems in manufacturing conventional semiconductor-coupled superconducting devices.

[Means for solving problems]

The present invention obtains a superconducting current by increasing the contact area between a semiconductor and a superconductor at a short distance, and uses parts where the superconducting electrodes are spaced apart (mutually separated electrode parts that do not contribute to the superconducting current). (between) to eliminate normal conduction leakage current and obtain good device characteristics. Furthermore, methods for producing them are provided.

That is, the element of the present invention is a semiconductor-coupled superconducting element in which a ridge part (convex part) is provided on a semiconductor substrate, and superconducting electrodes are formed on both walls of the ridge part with a thickness at least equal to or greater than the superconducting penetration distance of the material. be.

Further, in the manufacturing method of the present invention, after etching the semiconductor substrate other than the ridge forming portion to a predetermined depth,
After superconducting electrodes are attached diagonally to both walls of the ridge, lift-off is performed.

The present invention will be explained in detail below with reference to Examples.

〔Example〕

FIG. 3 shows an embodiment of the present invention. 1 is a semiconductor substrate, and 2 is a superconductor (electrode), which has a rigid structure in order to increase the contact area between the semiconductor and the superconductor at a short distance. That is, by providing superconducting electrodes on both wall portions 4 of the ridge (convex portion) facing each other, the electrode area at a short distance can be increased. Also, in this element, unlike the one in Figure 1,
Since superconducting current flows inside the semiconductor, various problems unique to semiconductor surfaces can be eliminated.

FIG. 4 shows an example of manufacturing the device of the present invention. This is basically based on the lift-off method, but in order for the superconducting thin film to be superconducting, its thickness must be greater than the superconducting penetration distance λ _L. Therefore, it is necessary to make the resist thickness for lift-off even thicker, but the element length L is 0.1 μm.
In the case of custom-made resists, it is difficult to increase the resist thickness. This is especially true for positive resists that are suitable for lift-off. A manufacturing example will be described in detail below. First, a resist 5 is left on a semiconductor substrate only in a portion corresponding to the superconducting electrode spacing L by an electron beam exposure method or the like. Thereafter, the semiconductor substrate 1 is etched to a required depth (FIG. 4a). The etching depth depends on L, but is usually about 0.05 to 1 μm. At this time, in the normal lift-off method, post-bake is not performed after developing the resist, but in this process, since etching is performed, post-bake is performed as necessary to improve the adhesion between the resist and the semiconductor.
Since L is usually around 0.1 μm, resist flow occurs especially when etching is performed wet.
It is important to improve adhesion. Of course, this etching can also be performed by a dry process method. In this case, unlike the conventional method, the superconducting current flows inside the semiconductor, so the effect of damage to the semiconductor due to this etching is small. Thereafter, superconducting electrodes 2 are formed by a vapor deposition method, and in order to adhere to both wall portions 4 of the ridge, they are sequentially formed from both sides by an oblique vapor deposition method. In order to obtain particularly good electrical properties at the semiconductor-superconductor interface, it is effective to remove natural oxide films or dirt on the surface of the semiconductor by a method such as γf spatter cleaning before depositing the superconducting electrode 2. However, after this cleaning, diagonal deposition is performed sequentially from both sides. After that, the device structure of the present invention (FIG. 3) is obtained by lift-off, but the underetching that occurs during etching of the substrate is
It is advantageous to provide a kind of overhang during the lift-off process. For this reason, lift-off can be performed even when performing oblique deposition from an angle close to the side. This makes it possible to more effectively form the superconducting electrode 2 on the wall surface 4 of the ridge. A superconducting thin film has a superconducting penetration distance λ _L of its material (approximately
If the thickness is thinner (about 500 Å, the length will be longer depending on the formation conditions), the properties as a superconductor will deteriorate, so use effective oblique evaporation to apply a superconducting film to the wall of the ridge to a sufficient thickness that is at least thicker than λ _L. This is important for this device. In addition, etching the substrate has the effect of increasing the apparent aspect ratio of the lift-off resist, making lift-off easier, removing dirt and process distortion on the substrate surface, and further shortening the element length L. It also has an effect. Increasing the apparent aspect ratio of the resist is of great significance since the limit of EB lithography is approximately 0.2 μm. Regarding the superconducting electrode material used next, when Nb (niobium) is used as a superconductor, Pb or
It was found that lift-off is much easier compared to PInbAu alloys. This is because Nb is known as a hard material (so-called refractory metal), and when it is formed on a resist, it has a large internal strain, and when the resist is immersed in a solution, it is easily lifted off.

Next, an example of a specific manufacturing method will be shown. A positive EB resist was used as the resist, and after EB exposure and development, post-bake and substrate etching were performed at 0.2
~0.5 μm, Nb was deposited from both diagonal directions to approximately 1000 Å to 3000 Å by electron beam evaporation under a vacuum below 10 ⁻⁷ torr, and then immersed in acetone.
If necessary, apply ultrasound and perform lift-off. L
Even when the thickness was about 0.1 μm, the lift-off yield was almost perfect. In the method of the present invention, n-
When using InAs, the carrier concentration is 2×10 ¹⁷ cm ^-3
, L is 0.4 μm or more, and L is 0.6 μm at 2×10 ¹⁸ cm ^-3
Superconducting current could also be obtained with the above device.

Next, a device for removing normal conduction current and a manufacturing method will be described.

FIG. 5 shows an insulating film 1 formed by vapor deposition from directly above the substrate after the steps up to FIG. 4a are performed in the process of the present invention.
1 For example, SiO ₂ , SiO, Si ₃ N ₄ or Al ₂ O ₃ is formed (Fig. 5a), and then the superconducting electrode 2 is deposited obliquely, followed by lift-off (Fig. 5b). ). In this embodiment, since the insulating film is deposited from directly above, the insulating film is not deposited on the wall surface 4 of the ridge. Only the wall surface 4 of the ridge is required to make contact between the semiconductor and the superconductor, and the flat part only provides almost normal conduction leakage current, so the self-aligned structure of the present invention makes it possible to ideally eliminate leakage current. Become. Similarly, in the self-aligned structure shown in FIG. 6, an ion implantation layer 12 is formed by ion implantation for insulation (FIG. 6a), and a superconducting electrode 2 is formed by oblique deposition (FIG. 6a). Figure b). The implanted ion species used is one that makes the semiconductor semi-insulating, such as protons, or one that provides conductivity type opposite to that of the substrate used. In the latter case, a p-n junction is formed in the flat portion where the leakage current was applied, so that no normal current flows until the voltage is below the potential barrier. In addition, if heat treatment is required after ion implantation, use a high-temperature resist as the resist, or use a resist instead.
Lift-off may also be performed using a thin film such as SiO ₂ . Any material may be used as long as a lift-off solution that does not damage the properties of the superconducting electrode can be used.

FIGS. 7a and 7b show other self-aligned structures according to the present invention. This uses an epitaxial film 13, and the substrate semiconductor 1 is a semi-insulating substrate or a conductivity type opposite to that of the epitaxial layer, or 10 ¹⁵
Use a low carrier concentration of less than cm ^-3 . However, the ability to eliminate leakage current by using the opposite conductivity type is limited depending on the semiconductor used. This is n
It takes advantage of the fact that the height of the shot barrier differs depending on the type and p-type or semiconductor material. For example 13
When n-InAs is used as the semiconductor substrate 1, the barrier against n-InAs is 0 when p-InAs is used as the semiconductor substrate 1;
Since the voltage is 0.47 eV, leakage current from the part where the p-InAs and the superconducting electrode are in contact is eliminated in the voltage range of several tens of mV where superconducting elements are normally used. Note that the above epitaxial layer does not matter whether it is a homogeneous junction or a heterogeneous junction.

The case of a two-terminal element has been described above. Next, an example in the case of a three-terminal element will be described. FIG. 8 shows one example of this, and a case will be described in which the epitaxial film shown in FIG. 7 is used. An MES gate electrode or MIS gate electrode 14 is formed on the epitaxial film 13 and patterned (FIG. 8a). 5 is a resist for this purpose, and after that, etching, oblique vapor deposition, and lift-off were performed using the method described above, and the result shown in FIG. 8b is that of the resist. At that time, if a pn junction is provided in the epitaxial layer in advance, a junction type gate can be formed. Of course, the three-terminal element is not limited to this; for example, in the cases shown in FIGS. 5, 6, and 7 described above, three-terminal operation can be performed by providing electrodes on the substrate side.

Finally, the features of the manufacturing method for the structures shown in FIGS. 5, 6, and 8 will be summarized.

Regarding FIG. 5, after etching the semiconductor,
Subsequently, the insulating film is attached from the upper front side,
After that, superconducting electrodes are attached obliquely to both walls of the ridge, and then lift-off is performed.

Regarding FIG. 6, after etching the semiconductor,
Subsequently, the ion implantation layer is formed from the front side of the top, and then superconducting electrodes are obliquely attached to both walls of the ridge, and then lift-off is performed.

Referring to FIG. 8, after the gate portion is formed, the semiconductor is subsequently etched, and then superconducting electrodes are attached obliquely to both walls of the ridge, and then lift-off is performed.

〔Effect of the invention〕

As explained above, the present invention provides an excellent semiconductor-coupled superconductor structure and manufacturing method that allows for a large contact area between a semiconductor and a superconductor at short distances and eliminates normal leakage current. A conductive element can be provided. moreover,
As is clear from FIGS. 3 to 8, the device structure according to the present invention is a flat structure and does not have a stepped portion unlike the conventional device, which is advantageous for integration and multilayer structure. Note that the semiconductor material used in the present invention and its internal structure can also be modified in various ways within the scope of the present invention, and can be applied to various things. It is also possible to use a combination of the embodiments shown in the present invention.

[Brief explanation of the drawing]

1 and 2 a and b are a cross-sectional view and a manufacturing process diagram of a conventional semiconductor-coupled superconducting device, respectively, FIG. 3 is a cross-sectional view of a first embodiment of a semiconductor-coupled superconducting device of the present invention, and FIG. Figures a and b are manufacturing process diagrams of the device in Figure 3, Figures 5 a and b, Figures 6 a and b, Figure 7 a,
8a and 8b are manufacturing process diagrams of second, third, fourth, and fifth embodiments of the present invention, respectively. (Main symbols), 1...Semiconductor substrate, 2...Superconductor (electrode), 4...Rid wall (surface), 5...
Resist, 11... Insulating film, 12... Ion implantation layer, 13... Epitaxial growth layer, 14...
MES gate electrode or MIS gate electrode.

Claims (1)

[Claims] 1. A semiconductor substrate is provided with a convex portion, superconducting electrodes are formed on both walls of the convex portion, and the superconducting electrode is
A semiconductor-coupled superconducting device characterized in that Nb and the semiconductor are InAs. 2. The semiconductor-coupled superconducting device according to claim 1, wherein the semiconductor substrate includes at least one semiconductor layer provided on a semi-insulating substrate. 3. A semiconductor substrate is provided with a protrusion, superconducting electrodes are formed on both walls of the protrusion, and an insulating film is provided on the semiconductor surface other than the protrusion and both walls thereof. Semiconductor-coupled superconducting device. 4. A semiconductor substrate is provided with a protrusion, superconducting electrodes are formed on both walls of the protrusion, and an ion implantation layer is formed on the semiconductor surface other than the protrusion and both walls thereof. Semiconductor-coupled superconducting device. 5. A semiconductor substrate is provided with a protrusion, superconducting electrodes are formed on both walls of the protrusion, and the protrusion has at least one p-n junction made of the same or different semiconductor material inside the protrusion. Features of semiconductor-coupled superconducting devices. 6. A semiconductor substrate is provided with a protrusion, superconducting electrodes are formed on both walls of the protrusion, and an MIS type, MES type, or junction type gate structure is further provided on the upper part of the protrusion. Semiconductor-coupled superconducting device. 7. Etching the surface of the semiconductor substrate other than the protrusion formation portion to a predetermined depth to form a protrusion, and at the same time forming a resist overhang by under-etching, forming a semiconductor protrusion narrower than the resist width, and forming a semiconductor protrusion on both sides of the protrusion. A method for manufacturing a semiconductor-coupled superconducting element, which comprises attaching a superconducting electrode to a wall surface from an oblique direction and then performing lift-off.