JPH0567070B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvement of a semiconductor device using so-called three-dimensional mounting multi-chip package technology, in which a large number of semiconductor chips are mounted in one package.

[Conventional technology]

Conventionally, in this type of semiconductor device, a plurality of semiconductor chips (LSI chips) are planarly mounted on a plurality of wiring boards, and these wiring boards are sequentially arranged side by side in the stacking direction and mounted on another wiring board. It is known to have a configuration in which these components are provided in a single package. To briefly explain such a conventional three-dimensional multi-chip package using FIG. Each of these semiconductor chips 1 has a certain function, such as a large-capacity memory or a large-scale logic circuit of a microprocessor. All the chips 1 constitute the functions of the entire semiconductor device. 2 is a plurality of first wiring boards (mounting side wiring boards) for mutually connecting the functions of a plurality of these semiconductor chips 1 arranged and fixed; 3;
is a second wiring board (connection side wiring board) which interconnects the functions of these first wiring boards by arranging them side by side in an upright state; It is packaged by being clearly placed on a substrate 4 together with individual semiconductor chips 1. Here, in the figure, 5a is an electrode (hereinafter referred to as a bump) made of a Pb-Sn alloy formed on each semiconductor chip 1 to electrically and mechanically connect it to the first wiring board 2 side, and 5b is a first electrode. Wiring board 2
with an electrode (bump) made of a Pb/Sn alloy that electrically and mechanically connects the 6 to the second wiring board side.
7 is a wire for electrically connecting the second wiring board 3 and the insulating substrate 4, and 7 is an external connection electrode (external pin) for taking out the function of this semiconductor device to the outside.

In a semiconductor device with such a configuration, the PN junctions formed on the main surface of the semiconductor chip 1 are connected to each other by wiring (not shown) made of Al or the like, and the electrical functions of the PN junctions are performed on the same plane as the main surface. The structure is such that it can be taken out from any location. Therefore, if the main surface of this semiconductor chip 1 is placed parallel to and opposed to the main surface (substrate surface) of the first wiring board 2, this semiconductor chip can be bonded by reflow bonding the bumps 5a placed in the gap. electrically connecting the functions of the chip 1 and the wiring of the first wiring board 2;
At the same time, this semiconductor chip 1 can be fixed onto the first wiring board 2. Wiring for interconnecting the semiconductor chips 1 and interconnection wiring (not shown) are formed in advance on the main surface of the first wiring board 2, so that each semiconductor chip mounted as described above The functions of 1 are connected and combined with each other. As a result, this first wiring board 2 has a plurality of semiconductor chips 1 mounted in this way.
This means that as many functions (subsystems) as there are will be configured.

On the other hand, in the first wiring board 2 on which a plurality of such semiconductor chips 1 are mounted, the electrodes 5b arranged on one side of the outer periphery in contact with the main surface (substrate surface) of the second wiring board 3 are subjected to reflow bonding. So, the second
It is arranged vertically on the main surface of the wiring board 3, thereby electrically connecting the first wiring board 2 to the second installation board 3, and also mechanically fixing it at the same time. ing. Then, on the main surface of this second wiring board 3, wiring for interconnecting the first wiring boards 2 and interconnection wiring (not shown) are formed in advance, so that the first wiring mounted on this Board 2
The above individual functions (subsystems) will be connected and combined with each other. Therefore, on this second wiring board 3, all the subsystems of the first wiring board 2, that is, all the individual functions of the large number of semiconductor chips 1 housed in this semiconductor device are mounted and combined. This can be configured as follows.

Further, after mechanically fixing this second wiring board 3 to the insulating board 4 with an adhesive (not shown), the second wiring board 3 is
This is achieved by electrically connecting the function extracting electrode (not shown) formed on the wiring board 3 and the wiring (not shown) formed on the insulating board 4 with a wire 6 made of Au or the like. All functions of the second wiring board 3 are continued to the insulating board 4 side. Since the wiring on this insulating substrate 4 is connected to an external connection electrode (external pin) 7 that extracts the function of this semiconductor device to the outside, the semiconductor chip 1, the bumps 5a, the first wiring board 2, All functions of the semiconductor device are completed through the electrode 5b, the second wiring board 3, the wire 6, and the external pin 7, and can be transmitted to the outside.

Incidentally, on the insulating substrate 4 are a semiconductor chip 1, a first wiring board 2, a second wiring board 3, and a wire 6.
A lid body (not shown) that physically and chemically protects the
Since the device was mounted with a cap on it, this function was not damaged during normal handling, and the device could be operated as a multi-chip packaged semiconductor device.

[Problem that the invention seeks to solve]

By the way, according to the conventional device described above, the first wiring board is attached to the main surface of the second wiring board 3 by the electrode 5b provided on one side of the outer periphery of the first wiring board 2 in contact with the main surface of the second wiring board 3. 2 At the same time fixing itself,
Since the configuration is such that the subsystems are connected, there is a restriction that the number of signal terminals of the subsystem must be smaller than the number of electrodes 5b.
However, on the other hand, this number of electrodes is
The relationship is determined by the length of one side of the first wiring board 2 that contacts the main surface of the wiring board 3 and the pitch between the bumps (number of electrodes = length of one side of the first wiring board 2 ÷ pitch between the bumps). Therefore, if a semiconductor chip 1 with a large number of signal terminals, such as a large-scale logic circuit LSI chip, is mounted on the first wiring board 2, the number of signal terminals of the subsystem will increase, and the number of electrodes required for functional connection will increase. It was something to put away. and,
In order to arrange such a large number of electrodes 5b on one side of the first wiring board 2, the length of one side of the first wiring board 2 must be increased or the pitch between bumps must be decreased.

However, if one side of the first wiring board 2 described above is made larger, the outer shape of the package becomes larger.
The number of semiconductor chips mounted per volume decreases, and the packaging density decreases. Furthermore, when attempting to reduce the pitch between bumps, a technique for forming fine bumps is required, resulting in increased process difficulties. In other words, when attempting to assemble a semiconductor chip 1 with a large number of signal terminals, such as a large-scale logic circuit LSI chip, into a three-dimensionally mounted multi-chip module, the semiconductor chip mounting density of the module may be reduced or the process difficulty may be increased. It had the disadvantage that it had to be increased.

The present invention was made in view of the above-mentioned circumstances, and when mounting a semiconductor chip such as a large-scale logic circuit with a large number of signal terminals, the semiconductor chip mounting density of a three-dimensionally mounted multi-chip module decreases. It is an object of the present invention to obtain a semiconductor device that does not require any increase in process difficulty.

[Means for trying to solve problems]

A semiconductor device according to the present invention includes an insulating substrate having an electrode for external connection, a connection-side wiring board provided on the insulating substrate and having a semiconductor chip mounted thereon, and a connection-side wiring board on which the semiconductor chip is mounted and mounted on the connection-side wiring board. The mounting side arrangement board is provided with a notch formed so as not to hit the semiconductor chip mounted thereon, and is disposed perpendicularly to the connection side wiring board.

[Effect]

According to the present invention, when mounting a plurality of semiconductor chips in one package, these semiconductor chips are mounted not only on the mounting side wiring board but also on the board surface of the connection side wiring board. In particular, by mounting a semiconductor chip with a large number of signal terminals on this connection wiring board, problems such as restrictions on the number of electrodes that connect between the mounting side wiring board and the connection side wiring board can be eliminated. , it is possible to efficiently package semiconductor chips within one package.

〔Example〕

Hereinafter, the present invention will be explained in detail using embodiments shown in the drawings.

Figures 1a, b, and c show one embodiment of a semiconductor device according to the present invention, and in these figures, the same or corresponding parts as in Figures 4a, b, and c described above are designated by the same numbers. The explanation will be omitted.

Now, according to the present invention, when configuring a semiconductor device using three-dimensional mounting multi-package technology by mounting a plurality of semiconductor chips 1 in one package, a plurality of semiconductor chips 1 having active and passive functions can be assembled. a plurality of semiconductor chips 1, a plurality of first wiring boards (mounting side wiring boards) 2 formed by mounting these plurality of semiconductor chips 1 on a board surface, and these first wiring boards 2 in an upright state. A second wiring board (connection side wiring board) 3 having board surfaces arranged in parallel in the stacking direction and arranged perpendicularly to the first wiring board 2, and an external circuit board on which this second wiring board 3 is mounted and fixed. A plurality of the semiconductor chips 1 are mounted on the substrate surface of the second wiring board 3 so that their main surfaces are parallel to each other. 2. Cutout portion 10 is cut out so as not to hit semiconductor chip 1 mounted on wiring board 3.
are formed on the first wiring board 2, and these semiconductor chips 1, the first wiring board 2, the second
The device is characterized in that the entire structure including the wiring board 3 and the insulating board 4 is packaged.

That is, according to the present invention, the semiconductor chip 1 is also provided on the substrate surface (principal surface) side of the second wiring board 3.
Wiring and interconnection wiring (not shown) that can be mounted and connected are formed, and the semiconductor chip 1 having a large number of signal terminals is mounted on this. In particular, in this embodiment, the semiconductor chip 1 disposed on the second wiring board 3 is connected to the first wiring board 2.
It is configured such that it is located in a notch 10 formed on the side. Note that the dimension of the notch portion 10 in the height direction depends on the thickness of the semiconductor chip 1 and the bump 5.
Height of a, cutout portion 10 on the back side of semiconductor chip 1
is set equal to the sum of the intervals up to. In this case, the thickness of the semiconductor chip 1 and the bump 5
The height of a (for example, 0.5 mm) is about 1/10 to 1/1 of the main surface dimensions of the semiconductor chip 1 (for example, 5 mm, 10 mm square).
It's small at 20. Further, a first portion having a notch portion 10
Since the wiring board 2 is formed using photolithography and etching, the processing accuracy (for example, ±0.05
mm) is excellent. This height dimension (for example, 0.6 mm) only occupies about 1/20 to 1/40 of the vertical dimension (for example, 15 mm, 25 mm) of the first wiring board 2, and such a portion Since the semiconductor chip 1, which could not be placed conventionally, can be mounted on the second wiring board 3 side, the semiconductor chip 1 can be mounted very easily and efficiently on the second wiring board 3 side. It is possible to wipe out the problems that have arisen.

To explain this in detail, the second wiring board 3 is for combining the individual functions and subsystems of a plurality of first wiring boards 2 and semiconductor chips 1,
In addition, all the combined functions are taken out from the four sides of the board surface, and external connection terminals 7 on the insulating board 4 side
connected to the outside world via. Since the entire board surface (two-dimensional plane) of the second wiring board 3 is used to combine the above-mentioned subsystems,
Wiring and even terminals are everywhere on its main surface.
Electrodes etc. can be formed freely. Therefore, it is extremely easy to arrange and fix a semiconductor chip 1 having a large number of signal terminals, such as a large-scale logic circuit LSI chip, on the substrate surface of the second wiring board 3, and moreover, it is possible to arrange and fix the semiconductor chip 1 having a large number of signal terminals, such as a large-scale logic circuit LSI chip, on the substrate surface of the second wiring board 3. Since it is directly arranged on the second wiring board 3 without going through the first wiring board 2, there is no restriction on the number of electrodes connected between the first wiring board 2 and the second wiring board 3, and as a result, the signal This allows an LSI chip with a large number of terminals to be extremely easily mounted on a three-dimensionally mounted multi-chip module.

FIGS. 2a, b, and c show another embodiment of the present invention, and in this embodiment, the first wiring board 2 described above is constructed from two parts 2A and 2B. Other than that, this embodiment is the same as the embodiment described above, and the effects thereof will be easily understood. Note that the first wiring board 2 in this case
A semiconductor chip 1 is placed on one first wiring board 2A.
This can be easily obtained by wiring the other first wiring board 2B using the same process and method as for mounting.

Further, the present invention is not limited to the structure of the embodiment described above, and the shape, structure, etc. of each part may be modified or changed as appropriate. For example, the wiring position of the semiconductor chip 1 on the second wiring board 3 can be set freely, and the method of fixing and connecting these semiconductor chips 1 to the first wiring board 2 and the second wiring board 3 can be set as desired. However, the present invention is not limited to the face-down method using the bumps 5a and 5b, and it goes without saying that the face-up method shown in FIG. 3 may be used for connection using the wire 6.

Further, in the above-described embodiment, a case was explained in which one second wiring board 3 was mounted on the insulating board 4, but a plurality of second losing boards 3 were mounted on the insulating board 4.
Of course, it is also possible to mount the .

Furthermore, in the embodiment described above, the semiconductor chip 1
has been described as a logic circuit LSI chip, but it will be easily understood that it may have other functions such as memory and sensor, and it is not limited to LSI but may also be MSI or SSI. Furthermore, the semiconductor chip 1 may have no active elements and only passive elements such as wiring, resistance, and capacitance are formed, and in addition to the semiconductor chip 1, the first wiring board 2, and the second wiring board 3, there may be coils, Passive elements such as capacitors may be mounted.

〔Effect of the invention〕

As explained above, according to the present invention, when configuring a semiconductor device using three-dimensional mounting multi-package technology by mounting a plurality of semiconductor chips in one package, an insulator having external connection electrodes is used. A substrate, a connection-side wiring board provided on the insulating substrate and on which a semiconductor chip is mounted, and a notch formed so as not to hit the semiconductor chip on which the semiconductor chip is mounted and mounted on the connection-side wiring board. and a mounting-side wiring board disposed perpendicularly to the connection-side wiring board, and is configured so that the entire package including the semiconductor chip, the mounting-side wiring board, the connection-side wiring board, and the insulating board is packaged. Therefore, despite the simple and inexpensive configuration, various excellent effects as described below can be achieved.

That is, according to the present invention, a semiconductor chip having a large number of signal terminals can be extremely easily mounted on a three-dimensional multi-chip module without being subject to restrictions on the number of connection electrodes between the mounting-side wiring board and the connection-side wiring board. This effect is achieved.

According to the present invention, an LSI chip such as a large-scale logic circuit with a large number of signal terminals can be integrated into a three-dimensional multichip without reducing the packaging density or increasing the difficulty of the process. It has the advantage that it can be easily and appropriately assembled as a module, and by packaging these components, it can be mounted in a single package with high density.

[Brief explanation of the drawing]

Figures 1a, b, and c are schematic perspective views and side views showing one embodiment of a semiconductor device according to the present invention, and Figures 2a, b, and c are schematic perspective views showing another embodiment of the present invention. 3 is a side view showing another embodiment of the present invention, and FIGS. 4a, b, and c are a schematic perspective view, a side view, and a detailed view of part A thereof showing a conventional example. 1... Semiconductor chip, 2... First wiring board, 3
...Second wiring board, 4...Insulating substrate, 5a...Bump, 5b...Electrode (bump), 6...Wire,
7... Electrode for external connection, 10... Notch part.

Claims (1)

[Scope of Claims] 1. An insulating substrate having external connection electrodes, a connection-side wiring board provided on the insulating substrate and having a semiconductor chip mounted thereon, and a semiconductor chip mounted on the connection-side wiring board and mounted on the connection-side wiring board. What is claimed is: 1. A semiconductor device comprising: a mounting side wiring board, the mounting side wiring board having a notch formed therein so as not to hit the semiconductor chip and being disposed perpendicularly to the connection side wiring board.