JPH0574952B2 - - Google Patents
Info
- Publication number
- JPH0574952B2 JPH0574952B2 JP60039910A JP3991085A JPH0574952B2 JP H0574952 B2 JPH0574952 B2 JP H0574952B2 JP 60039910 A JP60039910 A JP 60039910A JP 3991085 A JP3991085 A JP 3991085A JP H0574952 B2 JPH0574952 B2 JP H0574952B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor
- amorphous
- silicone oil
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/202—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
- H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
- H10F19/31—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は半導体装置の製法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.
［従来の技術］
従来、半導体装置を製造する際に必要とされる
パターン化は、マスク蒸着法やエツチング法など
により行なわれている。[Prior Art] Conventionally, patterning required when manufacturing a semiconductor device has been performed by a mask vapor deposition method, an etching method, or the like.
［発明が解決しようとする問題点］
半導体装置を製造する際に必要とされるパター
ン化をマスク蒸着法によりおこなうばあいには、
パターン精度がわるく、微細加工が困難であり、
エツチング法により行なうばあいにはパターン精
度がよく、微細加工も容易であり、これらの点で
はマスク蒸着法のような問題はないが、使用した
エツチング液やレジストなどが残留することがあ
り、このようなばあいには、製造された半導体装
置の信頼性が著しく低下するという問題が生ず
る。[Problems to be Solved by the Invention] When patterning required when manufacturing a semiconductor device is performed using a mask vapor deposition method,
The pattern accuracy is poor and microfabrication is difficult.
When etching is used, the pattern accuracy is good and microfabrication is easy, and there are no problems like the mask vapor deposition method in these respects, but the etching solution and resist used may remain. In such a case, a problem arises in that the reliability of the manufactured semiconductor device is significantly reduced.
本発明は半導体装置を製造する際のパターン化
を精度よく、容易にすることができ、しかもエツ
チング液やレジストが残留したりすることによる
製造された半導体装置の信頼性の低下をなくすた
めになされたものである。 The present invention has been made in order to enable accurate and easy patterning when manufacturing semiconductor devices, and also to eliminate deterioration in reliability of manufactured semiconductor devices due to residual etching solution or resist. It is something that
［問題点を解決するための手段］
本発明は、絶縁基板上に形成された第１の電極
の一部を除去したのち、第１の電極上に形成され
た非晶質を含む半導体上に形成される第２の電極
が不要な部分に相当する非晶質を含む半導体上の
部分に、あらかじめシリコーンオイルを塗布し、
ついで第２の電極を形成することを特徴とする半
導体装置の製法に関する。[Means for Solving the Problems] The present invention provides a method for removing a portion of a first electrode formed on an insulating substrate, and then removing a portion of the semiconductor formed on the first electrode, including an amorphous material. Applying silicone oil in advance to a portion of the semiconductor containing amorphous material corresponding to a portion where the second electrode to be formed is unnecessary,
The present invention relates to a method for manufacturing a semiconductor device, characterized in that a second electrode is then formed.
［実施例］
本発明に用いる絶縁基板としては、たとえばガ
ラス、セラミツクス、エポキシ系樹脂やフツ素系
樹脂などの有機高分子材料、絶縁された金属板な
どからなる厚さ0.05〜10mm程度の、一般に半導体
装置の製造に用いられている絶縁基板があげら
れ、このような絶縁基板であるかぎり使用しう
る。[Example] Insulating substrates used in the present invention are generally made of glass, ceramics, organic polymeric materials such as epoxy resins and fluorocarbon resins, or insulated metal plates with a thickness of about 0.05 to 10 mm. Examples include insulating substrates used in the manufacture of semiconductor devices, and any such insulating substrate can be used.
前記絶縁基板上には、たとえばSUS、鉄、Al、
Ni、Cu、しんちゆう、Zn、Ag、合金などの金属
電極や、ITO、In2、O8、SnO2、ITO／SnO2、
CdxSn Oy（ｘは0.5〜２、ｙは２〜４である）、Irz
O1-z（ｚは0.33〜0.5である）、Znn O(1-n)（ｍは
０〜0.5である）などの透明電極、あるいはCr−
Si、Mo−Siなどのシリサイド系電極などが、厚
さ100〜10000Å程度になるように第１の電極とし
て形成される。 On the insulating substrate, for example, SUS, iron, Al,
Metal electrodes such as Ni, Cu, silver, Zn, Ag, alloys, ITO, In 2 , O 8 , SnO 2 , ITO/SnO 2 ,
Cd x Sn O y (x is 0.5-2, y is 2-4), Ir z
Transparent electrodes such as O 1-z (z is 0.33 to 0.5), Zn n O (1-n) (m is 0 to 0.5), or Cr-
A silicide-based electrode such as Si or Mo-Si is formed as the first electrode to a thickness of about 100 to 10,000 Å.
本発明においては、絶縁基板上に形成された第
１の電極の一部を所望のパターンになるように、
たとえばエツチング法などの方法により除去した
のち、第１の電極上に形成された非晶質を含む半
導体上に形成される第２の電極が不要な部分に相
当する非晶質を含む半導体上の部分に、あらかじ
めシリコーンオイルが塗布される。 In the present invention, a part of the first electrode formed on the insulating substrate is formed into a desired pattern.
For example, after removal by a method such as etching, a second electrode is formed on the semiconductor containing amorphous formed on the first electrode. The area is pre-applied with silicone oil.
前記非晶質を含む半導体の具体例としては、
Si、Ge、Ｃの少なくとも１種を含むものや、Si、
Ge、Ｃの少なくとも１種を含むものにさらにチ
ツ素原子や酸素原子が構成成分として加えられた
ものなどがあげられ、形成された半導体のダング
リングボンドが水素原子やフツ素原子でターミネ
ートされていてもよい。またその厚さは50Å〜
50μｍ程度のものである。該非晶質を含む半導体
には微結晶状のものが含まれていてもよく、また
その構造はpn、pin、MIS（Metal Insulator
Semiconductor）、SB（Schottky Barrier）など
の構造のものであつてもよい。 As a specific example of the semiconductor containing the amorphous substance,
Those containing at least one of Si, Ge, and C, Si,
Examples include those containing at least one of Ge and C, and those in which nitrogen atoms and oxygen atoms are added as constituent components, and the formed semiconductor dangling bonds are terminated with hydrogen atoms and fluorine atoms. It's okay. Also, its thickness is 50Å~
It is about 50 μm. The amorphous-containing semiconductor may include a microcrystalline one, and its structure is pn, pin, MIS (Metal Insulator).
Semiconductor), SB (Schottky Barrier), etc. may be used.
非晶質を含む半導体上にシリコーンオイルを塗
布し、第２の電極を形成すると、塗布部には第２
の電極が形成されず、その上要すれば容易に洗い
流すことができるので好ましい。 When silicone oil is applied onto a semiconductor containing an amorphous substance to form a second electrode, a second electrode is formed on the applied part.
This is preferred because it does not form electrodes and can be easily washed away if necessary.
シリコーンオイルを非晶質を含む半導体上に塗
布するに際しては、液状にしたものを印刷により
必要なパターンを形成するように塗布したり、微
小ノズルで吹きつけ塗布したりするが、精度の高
いパターンが容易にえられる方法であればとくに
限定はなく、どのような方法であつてもよい。 When applying silicone oil onto semiconductors containing amorphous materials, it is applied in liquid form to form the required pattern by printing, or by spraying with a micro nozzle, but it is difficult to form a highly accurate pattern. There is no particular limitation on the method as long as it can be easily obtained, and any method may be used.
シリコーンオイルを塗布し、必要により乾燥さ
せたのち、第１の電極と同様の材料からなる厚さ
10〜10000Å程度の第２の電極が常法により形成
される。 After applying silicone oil and drying if necessary, the thickness is made of the same material as the first electrode.
A second electrode having a thickness of about 10 to 10,000 Å is formed by a conventional method.
このようにして製造した半導体装置には、エツ
チング液やレジストのように半導体装置に残留す
るとその信頼性を著しく低下させるような物質が
残留する余地がなく、信頼性の高い、エツチング
法なみの精度を有する微細パターンが容易にえら
れ、太陽電池、光センサー、TET（thin film
transistor）、CCD（charge coupled device）な
どの用途に好適に使用される。 Semiconductor devices manufactured in this way have no room for substances such as etching liquid or resist that would significantly reduce the reliability of the semiconductor device if they remain in the device, and are highly reliable and as accurate as the etching method. It is easy to obtain fine patterns with
It is suitable for use in applications such as transistors) and CCDs (charge coupled devices).
上記説明では第１の電極の一部を除去したの
ち、その上に形成された非晶質を含む半導体上に
シリコーンオイルを塗布したが、第１の電極の一
部を除去したのち第１の電極上に形成された非晶
質を含む半導体の一部をレーザーや機械的なひつ
かきなどにより除去し、そののち該非晶質を含む
半導体上の第２の電極が不要な部分に相当する部
分にシリコーンオイルを塗布して半導体装置を製
造してもよく、第１の電極の一部および第１の電
極上に形成された非晶質を含む半導体の一部の除
去を同時に行なつたのち、該非晶質を含む半導体
上の第２の電極が不要な部分に相当する部分にシ
リコーンオイルを塗布して半導体装置を製造して
もよい。 In the above explanation, after removing a part of the first electrode, silicone oil was applied on the semiconductor including amorphous formed thereon. A part of the semiconductor containing amorphous formed on the electrode is removed by laser or mechanical pressure, and then a portion of the semiconductor containing the amorphous corresponding to the unnecessary part of the second electrode is removed. A semiconductor device may be manufactured by applying silicone oil to the semiconductor device, and after simultaneously removing a portion of the first electrode and a portion of the semiconductor containing amorphous formed on the first electrode. A semiconductor device may be manufactured by applying silicone oil to a portion of the amorphous-containing semiconductor corresponding to a portion where the second electrode is unnecessary.
つぎに本発明の製法を参考例および実施例にも
とづき説明する。 Next, the manufacturing method of the present invention will be explained based on Reference Examples and Examples.
参考例 １
ガラス１上にSnO2電極２を設けた基板をエツ
チングして、第１図に示すように帯状のパターン
を作り、その上にグロー放電法によりＰ型ａ−
SiC：H120Å、真性ａ−Si：H6000Å、ｎ型μC
−Si：H500Åからなる半導体３を形成した。こ
れを第２図に示すようにYAGレーザーで半導体
部のみをSnO2電極のパターンからずらして平行
にスクライブした。ついで平均粒径0.5μｍのタル
ク60部（重量部、以下同様）、平均粒径1.5μｍの
炭カル25部および低重合度のポリビニルアルコー
ル５部を水に分散させたスラリーをスクリーン印
刷法で10μｍ厚になるように塗布し、第３図に示
すように印刷されたスラリー４を形成し、70℃で
乾燥させた。次いでAl電極５を全面に蒸着した
のち50℃の温水中で約３分間超音波洗浄し、水洗
後フロン乾燥させて第４図に示す太陽電池をえ
た。Reference Example 1 A substrate with a SnO 2 electrode 2 provided on a glass 1 is etched to form a band-shaped pattern as shown in Figure 1, and a P-type a-
SiC: H120Å, intrinsic a-Si: H6000Å, n-type μC
A semiconductor 3 made of -Si:H 500 Å was formed. As shown in FIG. 2, only the semiconductor portion was scribed in parallel with the SnO 2 electrode pattern using a YAG laser. Next, a slurry prepared by dispersing 60 parts of talc (parts by weight, the same applies hereinafter) with an average particle size of 0.5 μm, 25 parts of charcoal with an average particle size of 1.5 μm, and 5 parts of polyvinyl alcohol with a low degree of polymerization in water was screen-printed to form a 10 μm particle. The slurry 4 was coated thickly to form a printed slurry 4 as shown in FIG. 3, and dried at 70°C. Next, an Al electrode 5 was deposited on the entire surface, followed by ultrasonic cleaning in hot water at 50° C. for about 3 minutes, followed by water washing and drying with Freon to obtain the solar cell shown in FIG. 4.
えられた太陽電池の特性はAl電極を化学エツ
チングしたものと同じであつたが、エツチングし
たものを100℃で10Hr処理すると、太陽電池性能
は初期値の1/10になつたのに対して、前記方法に
よるものは逆に15％増加した。 The characteristics of the resulting solar cell were the same as those obtained by chemically etching Al electrodes, but when the etched material was treated at 100°C for 10 hours, the solar cell performance was 1/10 of the initial value. On the contrary, those using the above method increased by 15%.
実施例 １
参考例１で用いたスラリーのかわりにシリコー
ンオイルをインクジエクトプリンターで第３図と
同じパターンになるように塗布し、Alを真空蒸
着すると、シリコーンオイルを塗布したところに
はAlが付着せず、このままで良好な特性を示す
太陽電池がえられた。Example 1 Instead of the slurry used in Reference Example 1, silicone oil was applied using an inkjet printer in the same pattern as shown in Figure 3, and Al was vacuum-deposited. A solar cell was obtained that showed good characteristics as it was without any coating.
［発明の効果］
本発明の製法によると、精度の高い微細パター
ンを有する信頼性の高い半導体装置がエツチング
などすることなく単に第２の電極を堆積させるだ
けで容易に製造される。[Effects of the Invention] According to the manufacturing method of the present invention, a highly reliable semiconductor device having a highly accurate fine pattern can be easily manufactured by simply depositing the second electrode without etching or the like.
第１〜４図はリフトオフ法により半導体装置を
製造するばあいの一実施態様の各段階に関する説
明図であり、第１図はガラス上にSnO2電極を設
けた基板をエツチングした状態を示す説明図、第
２図は第１図に示す基板上に半導体を形成し、半
導体の一部のみをスクライブした状態を示す説明
図、第３図は第２図に示す半導体の上にスラリー
をスクリーン印刷法で塗布し、乾燥させた状態を
示す説明図、第４図はリフトオフ法により形成し
た太陽電池に関する説明図である。
（図面の符号）、１：ガラス、２：SnO2電極、
３：半導体、４：印刷されたスラリー、５：Al
電極。
Figures 1 to 4 are explanatory diagrams of each stage of an embodiment of manufacturing a semiconductor device by the lift-off method, and Figure 1 is an explanatory diagram showing a state in which a substrate with SnO 2 electrodes provided on glass is etched. , Fig. 2 is an explanatory diagram showing a state where a semiconductor is formed on the substrate shown in Fig. 1 and only a part of the semiconductor is scribed, and Fig. 3 is an explanatory diagram showing a state in which a semiconductor is formed on the substrate shown in Fig. 1, and only a part of the semiconductor is scribed. FIG. 4 is an explanatory diagram showing a solar cell formed by a lift-off method. (Drawing code), 1: Glass, 2: SnO 2 electrode,
3: Semiconductor, 4: Printed slurry, 5: Al
electrode.
Claims (1)
除去したのち、第１の電極上に形成された非晶質
を含む半導体上に形成される第２の電極が不要な
部分に相当する非晶質を含む半導体上の部分に、
あらかじめシリコーンオイルを塗布し、ついで第
２の電極を形成することを特徴とする半導体装置
の製法。 ２ 第１の電極の一部を除去したのち、第１の電
極上に形成された非晶質を含む半導体の一部を除
去し、そののち該非晶質を含む半導体上の第２の
電極が不要な部分に相当する部分にシリコーンオ
イルを塗布する特許請求の範囲第１項記載の製
法。 ３ 第１の電極の一部および第１の電極上に形成
された非晶質を含む半導体の一部の除去を同時に
行なつたのち、該非晶質を含む半導体上の第２の
電極が不要な部分に相当する部分にシリコーンオ
イルを塗布する特許請求の範囲第１項記載の製
法。[Claims] 1. After removing a part of the first electrode formed on the insulating substrate, a second electrode formed on the semiconductor containing amorphous material formed on the first electrode. In the part of the semiconductor that contains amorphous material, which corresponds to the unnecessary part,
A method for manufacturing a semiconductor device, comprising applying silicone oil in advance and then forming a second electrode. 2. After removing a part of the first electrode, part of the semiconductor containing amorphous formed on the first electrode is removed, and then the second electrode on the semiconductor containing the amorphous is removed. The manufacturing method according to claim 1, wherein silicone oil is applied to portions corresponding to unnecessary portions. 3 After simultaneously removing a portion of the first electrode and a portion of the semiconductor containing amorphous formed on the first electrode, the second electrode on the semiconductor containing the amorphous is unnecessary. The manufacturing method according to claim 1, wherein silicone oil is applied to the portion corresponding to the portion.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60039910A JPS61198686A (en) | 1985-02-27 | 1985-02-27 | Manufacture of semiconductor device |
| EP86102335A EP0193820A3 (en) | 1985-02-27 | 1986-02-22 | Method for forming a thin film pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60039910A JPS61198686A (en) | 1985-02-27 | 1985-02-27 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61198686A JPS61198686A (en) | 1986-09-03 |
| JPH0574952B2 true JPH0574952B2 (en) | 1993-10-19 |
Family
ID=12566102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60039910A Granted JPS61198686A (en) | 1985-02-27 | 1985-02-27 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61198686A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114427115A (en) * | 2022-04-01 | 2022-05-03 | 浙江大学杭州国际科创中心 | Silicon carbide single crystal wafer stripping method and stripping device |
| CN118824845B (en) * | 2024-09-18 | 2024-11-22 | 山东大学 | Silicon carbide power device and preparation method and application thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5925279A (en) * | 1982-08-02 | 1984-02-09 | Kyocera Corp | Manufacture of solar battery |
-
1985
- 1985-02-27 JP JP60039910A patent/JPS61198686A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61198686A (en) | 1986-09-03 |
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