JPH0577291B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to semiconductor devices, and more particularly to semiconductor devices having integrated capacitors.

[Conventional technology]

Integrated capacitors include junction capacitors and thin film capacitors, and thin film capacitors have an MIS structure and use an insulating film of SiO ₂ , SiO ₃ N ₄ , Ta ₂ O ₅ or the like as a dielectric film.

FIG. 2 is a sectional view of a semiconductor chip showing an example of a conventional semiconductor device.

As shown in FIG. 2, an N-type diffusion region 2 is provided on one main surface of a P-type silicon substrate 1, and a capacitor formation region and a contact formation region on the N-type diffusion region 2 are formed on the surface of the P-type silicon substrate 1. A silicon oxide film 4 is provided on the surfaces of the capacitor formation region and the contact formation region by a thermal oxidation method. Silicon oxide film 4
A silicon nitride film 5 is provided thereon, and a contact window is provided passing through the silicon nitride film 5 and silicon oxide film 4 provided in the contact formation region, and is in contact with the N-type diffusion region 2 through the contact window. Electrode 7 serving as one electrode of the capacitor
and an electrode 8 which is provided on the silicon nitride film 5 in the capacitor formation region and becomes the other electrode of the capacitor.
are selectively provided.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, in order to miniaturize the semiconductor element while maintaining a predetermined capacitance of the capacitor, it is necessary to reduce the thickness of the dielectric film, but as the film becomes thinner, it becomes difficult to make the film uniform. There were problems in that pinholes were formed, the withstand voltage was lowered, and manufacturing yield and quality reliability were lowered.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that can be miniaturized without deteriorating reliability of quality by improving a dielectric film.

[Means for solving problems]

The semiconductor device of the present invention includes a diffusion region formed on a semiconductor substrate, a first dielectric film formed on the diffusion region, and a second dielectric film formed on the first dielectric film. The semiconductor device includes a body film, a conductive layer formed by introducing impurities into the surface of the second dielectric film, and an electrode formed on the conductive layer.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a drawing of a semiconductor chip showing one embodiment of the present invention.

As shown in FIG. 1, an N-type diffusion region 2 is provided on one main surface of a P-type silicon substrate 1, and an insulating film 3 is provided on the N-type diffusion region 2 to partition a capacitor formation region and a contact formation region. A silicon oxide film 4 is provided on the surfaces of the capacitor formation region and the contact formation region by thermal oxidation. Silicon oxide film 4
A silicon nitride film 5 is provided thereon by a vapor phase growth method, and at least one type of impurity such as arsenic, boron, phosphorus, etc. is ion-implanted selectively into a portion of the surface of the silicon nitride film 5 corresponding to the capacitor formation region. A conductive layer 6 is formed. A contact window is provided through the silicon nitride film 5 and silicon oxide film 4 provided in the contact formation region, and an electrode 7 and a conductive layer 6 that contact the N-type diffusion region 2 through the contact window and become one electrode of the capacitor. An electrode 8 covering the silicon nitride film 5 and serving as the other electrode of the capacitor is selectively provided on the silicon nitride film 5.

〔Effect of the invention〕

As explained above, the present invention enables miniaturization of semiconductor elements by effectively increasing the capacitance of a capacitor using a conductive layer formed by introducing impurities into the surface of a dielectric film constituting the capacitor using an ion implantation method. This has the effect of making it possible to achieve high-density integration.

In addition, the effective capacitance of the dielectric film can be easily controlled by the energy and dose of impurity ion implantation, resulting in excellent uniformity, making it possible to control the occurrence of pinholes and prevent a drop in breakdown voltage. This has the effect of improving manufacturing yield and quality reliability.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor chip showing an embodiment of the present invention, and FIG. 2 is a sectional view of a semiconductor chip showing an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... P-type silicon substrate, 2... N-type diffusion region, 3... Insulating film, 4... Silicon oxide film, 5...
. . . silicon nitride film, 6 . . . conductive layer, 7, 8 . . . electrode.

Claims (1)

[Claims] 1 a diffusion region formed on a semiconductor substrate, a first dielectric film formed on the diffusion region, a second dielectric film formed on the first dielectric film, and a first dielectric film formed on the first dielectric film; 1. A semiconductor device comprising: a conductive layer formed by introducing impurities into the surface of a second dielectric film; and an electrode formed on the conductive layer.