JPH0580987B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Object of the Invention [Field of Industrial Application] The present invention relates to an improvement of a superheterodyne spectrum analyzer.

[Conventional technology]

FIG. 5 shows the configuration of a conventional superheterodyne spectrum analyzer. In FIG. 5, the sweep oscillator 7 outputs a sawtooth wave as shown in FIG.
oscillator) 5. Also, this sawtooth wave
Used for frequency sweep in addition to the horizontal axis of CRT20.
Since a sawtooth wave is applied to the VCO 5, it outputs a frequency _V that changes depending on the applied voltage, and adds this to the mixer 3.

On the other hand, an input signal of frequency _i (usually _i includes many frequency components) is applied to the low-pass filter 1. The low-pass filter 1 is used to pass frequencies within the range that the spectrum analyzer is intended to measure, and to cut out other frequency components. For example, if the spectrum analyzer is for observing the band from 0 to ₀ , it is a filter that has the characteristic of cutting frequency components above ₀ . Let _L be the frequency of the output signal of this low-pass filter 1.

The mixer 3 performs mixing by calculating equation (1), and sends the output signal (frequency _M ) to the next stage BPF amplifier (band pass filter amplifier 9).
Add to.

_M = _V − _L (1) The BPF amplifier 9 selects and amplifies only frequencies around a certain frequency ₁ .

In Fig. 5, in order to further increase frequency selectivity and gain gain, mixer 11, oscillator 13 and BPF are used.
It is constructed of a so-called double superheterodyne type in which the signal is amplified by an amplifier 15. This mixer 11
The apparatus shown in FIG. 5 can operate even without the oscillator 13 and BPF amplifier 15.

The amplitude of the output of the BPF amplifier 15 is detected by a detector 17, noise components are removed by a video filter 19, and the output is added to the vertical axis of the CRT 20.

In the apparatus shown in FIG. 5 as described above, a frequency spectrum waveform as shown in FIG. 3 is displayed on the CRT 20 (however, the dots in the figure are for explanation of operation and are not displayed). Its operation is as follows.

The frequency _M applied to the BPF amplifier 9 is the frequency _L whose frequency value is shifted by the frequency _V from the VCO 5, as shown in equation (1). In other words, the frequency _M is a value obtained by shifting the frequency _L , which is obtained by removing unnecessary components (components not to be measured) of the input frequency _i , by the frequency _V.

To give a specific example, if the spectrum analyzer has a measurement range of 0 to ₀ , each frequency shown in FIG. 5 is selected as follows, for example. The variable frequency range _V of VCO5 is _V = ₁ ~
( ₁ + ₀ ), output frequency _L of low-pass filter 1 =
0 to ₀ , the center frequency of the BPF amplifier is ₁ .

Therefore, since the frequency _M is a mixture of a certain instantaneous frequency value, for example, _V = _V1 , and a frequency _L that includes frequency components from 0 to ₀ , from equation (1),
_M is a frequency that includes frequency components from ( _V1 − ₀ ) to _V1 .

Among the frequencies _M with such a band, the BPF
Only the frequency values corresponding to the center frequency ₁ of the bandpass filter in the amplifier 9 can be selected and passed to the next stage. Therefore, this passable frequency is shifted by sweeping the output frequency _V of the VCO 5.

Therefore, a frequency spectrum waveform as shown in FIG. 3 is obtained.

[Problem that the invention seeks to solve]

However, in the spectrum analyzer as shown in FIG. 5, the accuracy of the frequency corresponding to the signal (level signal) detected via the BPF amplifier 9 is
Control voltage vs. output frequency characteristics of VCO5 (hereinafter referred to as VCO
5).

That is, as shown in FIG. 3, the spectrum analyzer takes frequency on the horizontal axis and displays the level of the input signal component at that frequency on the vertical axis. Since the frequency scale on the horizontal axis uses the voltage value of the sweep oscillator 7, the accuracy of this frequency scale is
It depends on the frequency accuracy of 5.

However, since the relationship between the control voltage of the VCO 5 and the output frequency generally changes depending on temperature and the like, it is difficult to obtain high frequency accuracy.

Therefore, if you want to obtain the desired frequency accuracy,
Although it is necessary to control the voltage value of the sawtooth wave generated by the sweep oscillator 7 depending on conditions such as temperature, such control is complicated and impractical.

In addition, even if the conventional device shown in Fig. 5 attempts to import the detected signal into a processor or computer for advanced processing, the timing of the import is not clear, and from this point of view, the frequency accuracy is poor. Very bad.

An object of the present invention is to provide a spectrum analyzer with accurate frequency accuracy.

B "Structure of the Invention" [Means for Solving the Problems] In order to solve the above problems, the present invention provides a VCO 5 to which a ramp waveform voltage is applied, an input signal passed through a low-pass filter, and an output signal of the VCO 5. Mixer 3 for mixing and this mixer 3
BPF with bandpass filter introducing the output of
In a device that displays a frequency spectrum waveform of an input signal on a CRT and is equipped with an amplifier 9, a processor that sets a signal corresponding to the "frequency at which data should be taken" (a, b, ...) of the spectrum waveform. 34, means 38, 61 for comparing a signal corresponding to the output frequency of the VCO 5 with a signal corresponding to the "frequency at which data should be taken"; Based on this, the level signal detected via the BPF amplifier 9 is read.

〔Example〕

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a diagram showing an embodiment of a spectrum analyzer according to the present invention. The difference between the configuration in FIG. 1 and the configuration in FIG. 5 is that the sweep oscillator 7 in FIG.
The difference is that the VCO5 and CRT20 parts have different configurations. On the other hand, no particular configuration changes have been made to the circuit consisting of the low-pass filter 1, mixer 3, BPF amplifier 9, mixer 11, oscillator 13, BPF amplifier 15, detector 17, and video filter 19 shown in FIG. , in Figure 1,
The same constituent element numbers as in FIG. 5 are given, and their redescription will be omitted.

Components different from those in FIG. 5 will be explained below. In FIG. 1, 5 is a VCO, which corresponds to VCO 5 in FIG. 5, and its output is applied to mixer 3.

U is an amplifier to which an integrating capacitor c1 is connected, which integrates the current introduced through the switch 45 and applies the resulting signal to the VCO 5.

31 is a reference frequency oscillator, which outputs a highly stable frequency using, for example, a crystal oscillator controlled at a constant temperature.

32 is a variable frequency divider, which divides the output of the reference frequency oscillator 31 by a frequency division ratio N specified by the processor 34, and generates a gate signal s2 for frequency counting.
is applied to the AND gate 35 and this signal s2 is also applied to the processor 34.

A counter 37 counts the signal s1 from the VCO 5 that has passed through the AND gate 35, and outputs the counted value C to the comparator 38. In addition, counter 3
7 and the variable frequency divider 32, a clear signal s3 is applied from the processor 34.

The comparator 38 compares the setting signal M from the processor 34 with the signal C from the counter 37, and applies the signals p ₁ , p ₂ and p ₃ to the OR gate 39 and the feedback circuit 43 as a result.

The output s4 of the OR gate 39 is applied to the processor 34, and when this signal s4 becomes active,
The processor 34 reads the output s5 of the AD converter 41. The output s5 of the AD converter 41 is the output signal (level signal) of the video filter 19 converted into a digital signal.

A signal related to the spectrum waveform is sent from the processor 34 to the CRT interface 40, and the signal converted by the CRT interface 40 is applied to the horizontal and vertical axes of the CRT 20.

Further, the setting signal D is sent from the processor 34 to DA.
It is sent to converter 46 where it is converted to an analog signal. This analog signal is applied via switch 45 to an integrator consisting of amplifier U. As a result, a signal waveform as shown in FIG. 6 is generated, and this is applied to the VCO 5. Note that the signals a and b shown in FIG. 6 correspond to the waveforms generated when the switch is connected to contacts a and b.

43 is a feedback circuit, which receives the signal from the comparator 38.
p1 and p3 are introduced, and their outputs are applied to an integrator consisting of an amplifier U via a switch 45. This feedback circuit 43 does not work during frequency sweep;
Set the start frequency in advance to start the frequency sweep.
It works to set VCO5. To explain this using FIG. 6, this feedback circuit 4
3 is in operation, the switch 45 becomes contact a, and the output of the integrator has a waveform as shown in a of FIG.

The operation of the spectrum analyzer shown in FIG. 1 configured as above will be explained.

First, an overview of the operation of the present invention will be explained.

In the present invention, the oscillation frequency _V of VCO5 is measured,
By reading the level signal at the frequency _V via the AD converter 41 and grasping the frequency and level signal as a set, a spectrum waveform with high frequency accuracy is obtained.

That is, a signal s2 having a certain pulse width T _k specified by the processor 34 is applied from the variable frequency divider 32 to the AND gate 35 . The AND gate 35 opens the gate for a period of this pulse width T _k and adds the signal from the VCO 5 to the counter 37 . The number of signals passing through the AND gate 35 corresponds to the oscillation frequency of the VCO 5.

The processor 34 uses a counter 37 to input a signal of a predetermined "frequency at which data should be taken" a for a period of _Tk .
The value at the time of counting can be calculated in advance, and this setting signal M is set in the comparator 38.

When the signal C from the counter 37 matches or exceeds the setting signal M, the AD converter 4 immediately
If you read the value Va of 1, the frequency a and level signal Va
can be understood in sets.

Thereafter, the processor 34 next sets the setting signal M at the "frequency at which data should be taken" b into the comparator 38, and repeats the above operation to obtain waveform data as shown in FIG.

The operation will be explained in detail below.

(A) When the contact of the switch 45 is "b" To perform a frequency sweep, the processor 34 sets the switch 45 to the contact b side. Processor 34 applies digital signal D to DA converter 46, which converts it to an analog signal and applies it to an integrator consisting of amplifier U, resulting in a ramp waveform as shown in period b of FIG. . The VCO 5 changes its output frequency _V according to the voltage of this ramp waveform.

It is assumed that the output voltage of the integrator is controlled in advance to a voltage equal to or lower than the voltage corresponding to the sweep start frequency _S by the method (B) described later until just before the frequency sweep is started. If this is not done, the sweep will start from an odd frequency in the middle, which is undesirable.

On the other hand, the processor 34 sends a signal N to the variable frequency divider 32 to designate the pulse width obtained from the variable frequency divider 32. This pulse width is the reference frequency oscillator 3
Since it is obtained by dividing the signal from 1, it is accurate and stable.

During this pulse width period (for example, T _k ), the AND gate 35 opens the gate and outputs the frequency signal of the VCO 5.
Add s1 to counter 37. After this period _Tk , the counter 37 outputs its count value C to the comparator 38. The comparator 38 compares the setting signal M set by the processor 34 with the signal C of the counter 37, and if C<M, the signal p1, if C=M, the signal p2, and if C>M, the signal p3. Activate one of p3. The setting signal Ma set from the processor 34 to the comparator 38 is, for example,
This corresponds to the count value when T _k is counted.

Here, if C<Ma, the signals p2 and p3 are non-active, so the processor 34 outputs the clear signal s3.
is output to clear the contents of the counter 37 and variable frequency divider 32. Then, a signal with a pulse width T _k from the variable frequency divider 32 is applied again to the AND gate 35.
Repeat the above operations until C=Ma or C>Ma.

Furthermore, to explain the inspection timing of the signals p2 and p3, the operation of the counter 37 ends when the output s2 of the variable frequency divider 32 falls.
The processor 34 processes the signal at the falling edge of the signal s2.
Checking whether p2 and p3 are active.

When C=Ma or C>Ma, signals p2, p3
becomes active, the processor 34 learns of this via the OR gate 39, and at the same time reads the output data (for example, Va) of the AD converter 41.
Therefore, the frequency of the level signal Va is a, and the processor 34 sends a signal representing the frequency a and the level signal Va to the CRT interface 40,
Points (a, Va) in Figure 3 are displayed on the CRT20.

Next, the processor 34 sets new data Mb corresponding to the "frequency at which data should be taken" b in the comparator 38, and also adds a clear signal s3 to the counter 37 and variable frequency divider 32, and performs the above-mentioned operation. is repeated, and the level signal Vb when the frequency b is detected by the comparator 38 is read.

Note that the "frequency at which data should be captured" (a, b, c, ... in Figure 3) is usually at a certain frequency interval, so the value of M is set by adding a certain number m sequentially. It's okay.

Thereafter, as shown in FIG. 3, the above-described operation is repeated a predetermined number of times as c, . . . one after another, to scan one sweep of the spectrum waveform shown in FIG. If the above scanning period is shown in FIG. 6, it corresponds to period b.

Next, the processor 34 switches the switch 45 to the contact a side.

(B) When the contact of the switch 45 is "a" When the contact of the switch 45 is "a", it is in the non-sweep mode, and the frequency of the VCO 5 is set to the start frequency in preparation for the next sweep. Perform the following actions.

The feedback circuit 43 operates to output, for example, a positive signal if the introduced signal s1 is active, and to output a negative signal if the signal s3 is active.

Now, assuming that the apparatus of FIG. 1 starts the frequency sweep from frequency _S as shown in FIG. 3, processor 34 sets a setting signal M _S corresponding to this frequency _S in comparator 38. Normally, the frequency when one sweep of the frequency sweep shown in Figure 3 is completed
_E is greater than _S. Therefore, in the comparator 38, since C>M _S , the signal p3 becomes active, and the feedback circuit 43 applies a polarity signal (negative signal) that reduces the frequency of the VCO 5 to the integrator.

Finally, in the comparator 38, C<M _S
Then, since the signal p1 becomes active, the output of the feedback circuit 43 becomes positive, and as shown in FIG. 6, the output of the integrator consisting of the amplifier U becomes in an increasing direction.

Thereafter, the signals p1 and p3 become active alternately and frequently, and the output voltage of the integrator is maintained at a substantially constant value. Therefore, the frequency of the VCO 5 is also maintained at a frequency corresponding to the frequency _S at the start of the sweep in preparation for the next sweep.

In the above manner, a spectrum waveform as shown in FIG. 3 is displayed on the CRT 20.

Note that when the output of the DA converter 46 is changed,
The slope of the ramp voltage during period b of FIG. 6 changes, resulting in a change in the sweep speed.

Further, the pulse width of the signal s2 output from the variable frequency divider 32 is set in consideration of the frequency of the VCO 5 and the counting range of the counter 37. That is, processor 3
If the pulse width set from 4 is too wide, the counter 37 will overflow in that period, and conversely, if the pulse width is too narrow, the count value of the counter 37 will be small in that period, making it impossible to accurately detect the frequency. I won't be able to do that.

Note that even if the function of the comparator 38 is incorporated into the processor 34 in FIG. 1, the output C of the counter 37 is introduced into the processor 34, and the signals p1 to p3 are outputted from the processor 34, the same operation as described above can be obtained. It is clear that this can be done.

Furthermore, in the above description, when one data of the frequency-level signal is obtained, it is sequentially displayed on the CRT 20 via the CRT interface 40. (not shown), and after one sweep is completed, the spectrum waveform may be displayed on the CRT 20.

Furthermore, the output frequency of VCO5 is high, and counter 3
If it is not possible to directly count at 7, the output of VCO 5 may be mixed with another frequency ₀ , converted to a lower frequency, and applied to counter 37 via AND gate 35.

FIG. 2 is a diagram showing another configuration example of the present invention. The basic operation is the same as the device shown in FIG.
That is, the frequency of the VCO 5 is monitored and the AD converter 41
This determines whether or not to import the data (level signal).

The difference between FIG. 2 and FIG. 1 is that the reference frequency oscillator 31, variable frequency divider 32, AND gate 35, counter 37, comparator 38, feedback circuit 43, and OR gate 39 in the device shown in FIG. Instead, a phase detector 61, variable frequency dividers 62 and 64, and a reference frequency oscillator 63 are provided. Note that the reference frequency oscillator 63 and the variable frequency divider 64 are provided with different component numbers from those in FIG. 1 because they perform functions different from those in the device shown in FIG.

Since the other constituent elements are the same as those in FIG. 1, the same constituent element numbers as in FIG. 1 are given, and their redescription will be omitted.

In Figure 2, the output of VCO5 is connected to mixer 3.
In addition, it is also added to the variable frequency divider 62. The frequency division ratio of this variable frequency divider 62 is controlled by a signal sp from the processor 34. Let _G be the output frequency of the variable frequency divider 62. This frequency _G is applied to a phase detector 61. The output of the phase detector 61 is
The signal is applied to an integrator consisting of an amplifier U via a switch 45, and is also applied to the processor 34. The reference frequency oscillator 63 is composed of, for example, a crystal oscillator controlled at a constant temperature, and applies its output to the variable frequency divider 64. The frequency division ratio of variable frequency divider 64 is controlled by a signal from the processor. Let the output frequency of the variable frequency divider 64 be _H.

The operation of the apparatus shown in FIG. 2 will be explained.

During sweeping, switch 45 is set to contact b side. In this case, a certain level of current is applied to the integrator made up of the amplifier U via the DA converter 46, so the output of the integrator increases and the output frequency of the VCO 5 also increases. The output frequency _V of the VCO 5 is divided via the variable frequency divider 62 to become the frequency _G.
It is added to the phase detector 61.

On the other hand, the processor 34 outputs a frequency _H to be compared with the frequency _V ( _G ) of the VCO 5 via the variable frequency divider 64.
You can set the value of .

The phase detector 61 can convey to the processor 34 a signal s7 in which _G < _H or _G > _H is known with respect to the frequencies of the two input signals.

Therefore, the processor 34 reads the output of the AD converter 41 at the time when the polarity of the signal s7 is switched, and can obtain a level signal at a predetermined "frequency at which data should be taken."

Next, the processor 34 changes the frequency division ratio of the variable frequency divider 64 and sets _H so as to correspond to the next "frequency at which data should be taken in", as shown in FIG.

Thereafter, the above-described operation is repeated to obtain a spectrum waveform as shown in FIG.

After one sweep is completed, the contact of the switch 45 is set to the a side, forming a phase locked loop. Then, the processor 34 changes the output frequency of the VCO 5 to the start frequency _S by setting the output frequency _H of the variable frequency divider 64 to a predetermined value.
can be locked to

C. ``Effects of the present invention'' As described above, according to the present invention, the output frequency of the VCO is monitored, and when this monitored value crosses the value of the "frequency at which data should be taken", the level signal is , it is possible to realize a spectrum analyzer with high frequency accuracy.

Furthermore, since it is locked to the start frequency during non-sweeping, the next sweep can be performed immediately.

[Brief explanation of the drawing]

Figure 1 shows an example of the configuration of a spectrum analyzer according to the present invention, Figure 2 shows another example of the configuration of the invention, and Figure 3 shows an example of a spectrum waveform displayed on a CRT. Figure 4 shows a sawtooth wave, Figure 5 shows an example of the configuration of a conventional spectrum analyzer, and Figure 6 shows the configuration of the device shown in Figure 1.
FIG. 3 is a diagram showing a voltage waveform applied to a VCO. 1...Low pass filter, 3...Mixer, 5...
...VCO, 9...BPF amplifier, 20...CRT, 3
1,63...Reference frequency oscillator, 32,62,6
4... variable frequency divider, 34... processor, 37...
... Counter, 38 ... Comparator, 43 ... Feedback circuit, 45 ... Switch, 61 ... Phase detector.

Claims (1)

[Claims] 1. A VCO 5 to which a ramp waveform voltage is applied, a mixer 3 that mixes the input signal passed through the low-pass filter and the output signal of the VCO 5, and a band-pass filter to which the output of the mixer 3 is introduced.
A processor 34 that sets a signal corresponding to the frequency (a, b, ...) at which data of the spectrum waveform should be taken in, in a device that displays a frequency spectrum waveform of an input signal on a CRT. and means 38, 61 for comparing a signal corresponding to the output frequency of the VCO 5 with a signal corresponding to the frequency at which the data should be taken, A spectrum analyzer characterized in that a level signal detected through a BPF amplifier 9 is read.