JPH0586086B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a bandpass filter (hereinafter referred to as BPF), and more specifically, a BPF is constructed by combining a differential amplifier circuit and a capacitor to form an active differentiation circuit and an integration circuit. For example, like the display circuit of a graphic equalizer, this BPF
This invention relates to a BPF that can easily discharge the residual charge of the previous signal stored in the capacitor when used in time division by switching between the right side (R) and left side (L) of a stereo signal. [Prior Art] Generally, many component stereo systems, so-called minicomputers, radio cassette recorders, etc. are equipped with a graphic equalizer device. In recent years, graphic equalizer devices have come to use displays such as LEDs to display levels corresponding to frequency components so that the status can be visually checked. Since the display speed of the graphic equalizer device can be slow since it can be viewed visually, a part of the display control circuit usually operates on a time-sharing basis by switching between left and right (L/R) stereo signals. I'm starting to do that. In such a graphic equalizer device,
Multiple BPFs corresponding to the number of frequency components to be analyzed
is installed, and on the display side, a configuration is adopted in which multiple BPFs are used for left and right time division of the stereo signal. Graphic equalizer devices including this type of BPF have various circuits integrated into ICs.
A BPF is usually constructed by forming a low-pass filter with an active differentiator circuit that combines a differential amplifier circuit and a capacitor, and forming a high-pass filter with a similar combination of active integrating circuits. [Problem to be solved] Consisting of such a differentiation circuit and an integration circuit
When the BPF is operated in a time-division manner, residual charges from the previous signal are accumulated in the differential and integral capacitors at the time of switching between the left and right channel signals, and correct filter operation cannot be expected for the next signal. Therefore, at the time of signal switching, discharge control is performed to discharge the charge in the capacitor and return it to the initial state. In conventional discharge control, a switch circuit is connected to each of the differential and integral capacitors, and a discharge period (discharge time) is set at the time when the L/R input signal is switched.
The switch circuit is turned ON to forcibly discharge the charge and return the voltage level of the capacitor to its initial state. However, with this discharge method, because there is ON resistance in the transistors, etc. that make up the switch circuit, even if an attempt is made to discharge the residual charge in the capacitor at the time of signal switching when the input signal disappears, ringing due to the residual charge will occur, resulting in a discharge time. The charge is not completely discharged within this period, and the voltage of the capacitor cannot be returned to its initial value. On the other hand, in order to recover it, you will have to take a very long destruction time. In particular, such discharge circuits usually have a level shift diode inserted in series with the switching transistor, so the transistor's ON resistance and
Since a voltage of 1 Vf (transistor forward voltage drop) is applied at the time of discharge control, ringing cannot be completely suppressed and the capacitor voltage does not return to its initial state. The present invention solves the problems of the prior art, and aims to provide a BPF that can discharge the charge of a capacitor in a short time when switching input signals. [Means for solving the problem] The present invention for achieving the above purpose
The configuration of the BPF is that an active differential circuit formed by a first differential amplifier circuit and a first capacitor is used as a low-pass filter, and a differential circuit formed by a second differential amplifier circuit and a second capacitor is used as a low-pass filter. The active integration circuit connected to the input signal is used as a high-pass filter, and the bandpass filter discharges the electric charge of the first capacitor and the second capacitor according to the discharge control signal from the outside when the input signal is switched. The amplification factors of the first and second differential amplifier circuits are controlled, and the cutoff frequencies of the differentiating circuit and the integrating circuit are shifted to a high frequency range to discharge the charges. [Function] In this way, the amplification factor of the differential amplifier circuit of the active differential/integrator circuit composed of the capacitor and the differential amplifier circuit is controlled according to the discharge control signal when switching signals, and the cutoff frequency of each is increased. By shifting the ringing to the initial level of the no-signal state, the ringing phenomenon that occurs between the residual charge due to the input signal before signal switching and the no-signal input state is generated in a high frequency region, thereby shortening the ringing toward the initial level of the no-signal state. It can be converged in time. As a result, there is no need to provide a discharge circuit such as a switch circuit and a diode, and there is almost no charge remaining in the differential and integral capacitors after the discharge time. Switching is possible, and even when using BPF in time division, accurate filter operation can be performed starting from the initial value. [Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of an embodiment of a BPF to which the present invention is applied, FIG. 2 is a timing chart for explaining its operation, and FIG. 3 is a graphic diagram showing an example of the use of this BPF. FIG. 2 is a block diagram mainly showing the display control circuit portion of the equalizer device. In FIG. 1, 1 is BPF, and 2 is
3 is the active differential circuit, 3 is the active integral circuit, 4 is a buffer amplifier inserted between the differentiating circuit 2 and the integrating circuit 3, and 5 is a buffer amplifier for connection with the next stage. The differentiating circuit 2 includes two-stage connected differential amplifiers 11 and 1.
2, and a differentiation capacitor 7, one end of which is connected to the output side of the differential amplifier circuit 6, and the other end of which receives an input signal from the input (IN). The time constant of this differentiating circuit is determined by the capacitance C ₁ of this capacitor 7 and the output impedance of the differential amplifier circuit 6. The integrating circuit 3 includes two-stage connected differential amplifiers 15 and 1.
6, and an integrating capacitor whose one end is connected to the output side of the differential amplification circuit 8 and whose other end is connected to the ground side in alternating current via the power supply line +Vcc. 9, and the time constant of the integrating circuit is determined by the capacitance C ₂ of this capacitor 9 and the output impedance of the differential amplifier circuit 8. Here, the output of the integrating circuit 8 is outputted to the output terminal (OUT) 10 via the buffer amplifier 5,
The output is fed back to the input of the differentiating circuit 2 via the output terminal 10. As a result, the voltage of the capacitor 7 on the differentiation side (voltage on the output side) is fed back to the differential amplifier 11 of the differential amplifier circuit 6, and an active differentiation circuit is constructed. Similarly, the voltage of the capacitor 9 (voltage on the output side) of the integrating circuit 8 is fed back to the input side of the differential amplifier 15 via the resistor divider circuit 19 inserted into the output terminal 10, thereby creating an active integrating circuit. is configured. The differential amplifier circuits 6 and 8 of the differentiating circuit and the integrating circuit are
Each constitutes a voltage-current conversion circuit, and their circuit configurations are almost the same. Therefore, the differential amplifier circuit 6 will be explained, and the details of the configuration of the differential amplifier circuit 8 will be omitted. The differential amplifier circuit 6 includes a differential amplifier 11 and a differential amplifier 12 that receives the respective differential outputs as inputs.
It is composed of. The differential amplifier 11 includes N-type bipolar transistors 11a and 11b, which are inserted as loads on their respective collector sides, their bases connected to each other, and their collectors connected to the power supply line +Vcc. Bipolar transistors 11c and 11d, a diode-connected N-type bipolar transistor 11e commonly connected to the bases of these load transistors 11c and 11d, and emitter resistors Re inserted on the emitter sides of transistors 11a and 11b, respectively. ₁ , one end of which is commonly connected to the resistor Re ₁ , and a current source 13 of the current source I ₁ whose other end is connected to the ground line GND, and the base side of the transistor 11a is grounded.
The base of transistor 11b receives a signal fed back from output terminal 10. The differential amplifier 12 includes N-type bipolar transistors 12a and 12b, and a current mirror-connected P-type bipolar transistor 12c (diode-connected transistor) inserted as a load on the collector side of each and whose emitters are connected to the power supply line +Vcc. ), 12d, and a current source 14 of a current source _I2 whose one end is commonly connected to the mutually connected emitters of the transistors 12a and 12b and whose other end is connected to the GND line. Then, the collector side of the transistor 12b is output, and the collector is connected to the N of the buffer amplifier 4.
The base of the bipolar transistor 20 and the capacitor 7 are connected to each other. In the differential amplifier circuit 6 having such a configuration, the current values I ₁ and I ₂ of the current sources 13 and 14 are the same as that of each differential amplifier 1.
Determine the switching current ratio of 1 and 12 and its gain Gm
is approximately given by Gm=I ₂ /I ₁・Re ₁ ... However, Re ₁ is the emitter resistance
The resistance value is Re ₁ . The above relationship is the same for the differential amplifier circuit 8; the differential amplifier 15 of the differential amplifier circuit 8 corresponds to the differential amplifier 11 of the differential amplifier circuit 6, and the differential amplifier 15 of the differential amplifier circuit 8 corresponds to the differential amplifier 11 of the differential amplifier circuit 6. The amplifier 16 corresponds to the differential amplifier 12 of the differential amplifier circuit 6. Further, transistors 15a to 15e forming the differential amplifier 15 correspond to the previous transistors 11a to 11e, respectively, and a transistor 16 forming the differential amplifier 16 corresponds to the transistors 11a to 11e, respectively.
A to 16d correspond to the previous transistors 12a to 12d, respectively. Also, emitter resistance Re ₂
corresponds to emitter resistance Re ₁ . The current value of the current source 17 corresponding to the current source 13 is I ₃ , and the current value of the current source 18 corresponding to the current source 14 is I ₄ . In addition, output terminal 1
Resistors R ₁ and R ₂ inserted in series between 0 and the ground line GND constitute a resistor divider circuit 19, and the voltage divided by this resistor divider circuit 19 is applied to the base of the transistor 15b. Feedback is being provided. Buffer amplifiers 4 and 5 have the same configuration, and buffer amplifier 4 has a power line Vcc and a ground line.
An N-type bipolar transistor 20 whose collector is connected to the power supply line Vcc between GND and a constant current source 21 whose emitter is connected are inserted in series. Batsuhua amp 5
Similarly, an N-type bipolar transistor 22 whose collector is connected to the power supply line Vcc and a constant current source 23 connected to its emitter are inserted in series between the power supply line Vcc and the ground line GND. ing. Here, the differentiating circuit 2 and the integrating circuit 3 are a low-pass filter and a high-pass filter, respectively, and by being connected in series, the BPF
1 is configured. The center frequency f ₀ of BPF1 in this case is given by the following equation.

[C] However, k ₁ = I ₂ / I ₁ , k ₂ = I ₄ / I ₃ , and Re ₁ ,
Re ₂ , R ₁ .R ₂ are resistance values of emitter resistance Re ₁ , emitter resistance Re ₂ , resistance R ₁ , and resistance R _{2 ,} respectively. Therefore, by controlling the values of k ₁ =I ₂ /I ₁ and k ₂ =I ₄ /I ₃ , the center frequency of this BPF 1 can be shifted to a higher frequency range. Current value provided in parallel to the current source 14 in FIG.
A series circuit consisting of a current source 24 of _I5 and a switch circuit 25, and a current value provided in parallel to the current source 18.
The series circuit consisting of the I ₆ current source 26 and the switch circuit 27 is provided to shift the center frequency f ₀ of the BPF 1 to a high frequency range. These circuits operate during the discharge time to discharge the charge remaining in capacitor 7 (C ₁ ) on the differential side and capacitor 9 (C ₂ ) on the integration side when input signals are switched, and the BPF is activated.
1 in high range. That is, the switch circuits 25 and 27 enter the "ON" state when receiving the discharge signal (discharge control signal) D applied to the discharge control line 28 supplied from the outside, and the switch circuits 25 and 27 enter the "ON" state in parallel to the current values I ₁ and I ₄ . Differential amplifier 1 passes preset currents I ₅ and I ₆
The current values of 2 and 16 are increased by that amount, and the center frequency is shifted to a higher frequency range using the formula. The operation will be explained according to Fig. 2.
As shown in FIG. 2a, when the input signal is switched, the discharge signal D
occurs. At the time of this input signal switching, the input signal to the capacitor 7 becomes non-signal, and at the same time the discharge signal D is applied to the switching circuits 25 and 2.
7, these switch circuits 25 and 27 are turned on. Therefore, the center frequency f ₀ of this BPF 1 shifts to a high frequency range. As a result, as shown in the figure, ringing occurs in the output signal of the output terminal 10 in a high frequency region. However, because of its high frequency, this ringing tends to its initial level when there is no signal within the discharge time and converges in a short period of time. At this time, the charges in the capacitors 7 and 9 are simultaneously discharged, and the output terminal 10 becomes the initial voltage level. Note that increasing the current values of the differential amplifiers 12 and 16 increases the respective amplification factors of the differential amplifier circuits 6 and 8, as can be understood from the equation. At this time, the output impedance decreases and the cutoff frequency of the differentiating circuit 2 and the integrating circuit 3 shifts to a high frequency range. In other words, the differential amplifier circuit 6,
By controlling the amplification factor of 8, each cutoff frequency is kept in a high range. As can be seen from the formula or formula, this means that the differential amplifier 11,
The same thing can be done by decreasing the current value of 15. On the other hand, in the conventional device, as shown in b in the same figure, ringing occurs at the output of the output terminal 10 after the input signal is switched, but the frequency is BPF
The frequency output is not high.
Therefore, as shown in c in the same figure, even if the conventional switching circuit using a transistor is turned "ON" by the discharge signal D to directly discharge the charge, residual charge remains after the discharge time and the initial voltage level fluctuates. It turns out. FIG. 3 shows a specific example of a display circuit of a graphic equalizer device as an example of switching and using such a BPF 1. A plurality of BPFs 30a, 30b, . . . , 3 provided corresponding to so-called analysis frequencies
One of L and R signals is supplied to each of 0n in a time-division manner. Each BPF30a, 30
Peak detectors (DET) 31a, 31b,..., 31n provided corresponding to b,..., 30n
Each display voltage value corresponding to the switching is obtained, and these peak detectors (DET) 31a, 31b, . . . , 3
1n voltages are sequentially selected by a multiplexer 32, and each BPF
The signal is distributed to the display circuit 33 having L/R display elements in a time-division manner in synchronization with the switching. In this case, when the left and right channels are switched, each BPF 30a, 30b, ..., 30n
receives the discharge signal D generated from the discharge signal generation circuit 34 (an L/R switching signal generation circuit may also be used), and charges in each capacitor are discharged for a short period of time. That is, at this time, the above-mentioned switch circuit 25 provided in each BPF,
27 becomes “ON” state, capacitors 7 and 9
discharge the electric charge. Thereafter, the signal on the other channel side can be received. As described above, the differential amplifier circuit of the embodiment is an example, and an operational amplifier may be used, and this operational amplifier is also included in the differential amplifier circuit. In short, if active differentiating and integrating circuits are constructed in which the output side is fed back to the input side by a capacitor and an amplifier with differential input, then by changing the amplification factor of each amplifier, the cutoff frequency can be raised to a high frequency range. It can be migrated. [Effects of the Invention] As can be understood from the above explanation, in the present invention, the amplification factor of the differential amplifier circuit of the active differential/integrator circuit constituted by the capacitor and the differential amplifier circuit is discharged when switching signals. By controlling according to the control signal and shifting each cut-off frequency to a high frequency range, the ringing phenomenon that occurs between the residual charge due to the input signal before signal switching and the unattended input state is generated in the high frequency range, so ringing is eliminated. can be converged in a short time toward the initial level of the no-signal state. As a result, it is not necessary to provide a discharge circuit using a switch circuit and a diode, etc., and even if BPF is used in a time-sharing manner, accurate filter operation can be performed starting from the initial value.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of BPF to which the present invention is applied, Fig. 2 is a timing chart for explaining its operation, and Fig. 3 is a diagram of this embodiment.
FIG. 2 is a block diagram centered on the display control circuit portion of a graphic equalizer device that is an example of the use of BPF. 1... BPF, 2... Differentiating circuit, 3... Integrating circuit, 4, 5... Buffer amplifier, 6, 8... Differential amplifier circuit, 7, 9... Capacitor, 11, 12,
15, 16...Differential amplifier, 13, 14, 17,
18, 21, 23, 24, 26... Current source.

Claims (1)

[Claims] 1 An active differentiating circuit formed by a first differential amplifier circuit and a first capacitor is used as a low-pass filter, and a second differential amplifier circuit formed by a second differential amplifier circuit and a second capacitor is connected to the differentiating circuit. A high-pass filter is used as an active integration circuit, and the bandpass filter discharges the electric charges of the first and second capacitors according to the discharge control signal from the outside when the input signal is switched. A bandpass filter characterized in that the amplification factor of the second differential amplifier circuit is controlled, and the cutoff frequencies of the differentiating circuit and the integrating circuit are shifted to a high frequency range to discharge the charges.