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JPH058993B2 - - Google Patents
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JPH058993B2 - - Google Patents

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Publication number
JPH058993B2
JPH058993B2 JP60236739A JP23673985A JPH058993B2 JP H058993 B2 JPH058993 B2 JP H058993B2 JP 60236739 A JP60236739 A JP 60236739A JP 23673985 A JP23673985 A JP 23673985A JP H058993 B2 JPH058993 B2 JP H058993B2
Authority
JP
Japan
Prior art keywords
pulse signal
circuit
voltage
detected
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60236739A
Other languages
Japanese (ja)
Other versions
JPS6295484A (en
Inventor
Shoichi Ookawa
Someyoshi Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DKK TOA Corp
Original Assignee
DKK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DKK Corp filed Critical DKK Corp
Priority to JP60236739A priority Critical patent/JPS6295484A/en
Publication of JPS6295484A publication Critical patent/JPS6295484A/en
Publication of JPH058993B2 publication Critical patent/JPH058993B2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

(産業上の利用分野) 本発明は、例えば放射線検出器の検出信号等の
増幅回路における出力の基線安定化回路に関する
ものである。 (従来の技術) 例えば放射線計測に用いられる放射線検出器の
検出信号は一般に不規則な微小パルス信号より成
るため、これを増幅するに当つて直流増幅器を用
いるときは入力オフセツト電圧又は温度ドリフト
等によつて基線が変動し、場合によつては電源電
圧によつて定まる電圧において出力電圧が飽和
し、何れの場合にも演出対象パルス信号の波高値
を正確に求めることが不可能となる。 増幅器として交流増幅器を用いるときは、交流
増幅器の特性として増幅出力の平均値が基線とな
るから、パルス数が極めて少ない場合にはパルス
の波高値をほぼ正確に求め得るが、パルスの数が
多くなるにしたがつて基線が変動下降し、パルス
の波高値が正しい値よりも小となる傾向が現れ
る。 放射線検出器の検出信号等を直流又は交流増幅
器によつて増幅した場合における上記のような欠
点を除くために、例えば第9図に示すような基線
安定化回路が提案実施されている。 図において、TIは被増幅信号の入力端子、A
1は演算増幅器で、抵抗R1,R2及びR9を適
当な値に選んで増幅度をほぼ一定ならしめてあ
る。C4は結合コンデンサ、T0は出力端子、
FETは例えば電界効果トランジスタ等より成る
常時閉成スイツチング素子、MULはその開閉制
御回路で、例えば単安定マルチバイブレータ等よ
り成る。TTIはタイミングパルス信号の入力端
子である。 この回路を、例えば放射線検出器の検出信号の
増幅に当つて増幅出力における基線の安定化に用
いる場合には、放射線検出器の検出信号を微分回
路及び主増幅器(何れも図示していない)に加
え、主増幅器において波形整形、即ち、検出出力
における検出対象パルス信号の時間幅を適宜一定
時間(例えば1μsec.乃至数μsec.)に制限して、
後続検出対象パルス信号が先行検出対象パルス信
号の立下り又は立上り部分に重畳することなく、
各検出対象パルス信号を分離し得るように波形整
形を行つた後、入力端子TIに加える。 放射線検出器の検出信号中に検出対象パルス信
号が含まれていない間は演算増幅器A1の出力側
に設けた結合コンデンサC4が常時閉成スイツチ
ング素子FETを介して接地状態に保たれ、出力
端子T0に出力が現れることはない。 放射線検出器が検出対象パルス信号を検出する
と、主増幅器において波形整形された増幅出力が
入力端子TIに加えられると共に、放射線検出器
の検出特性によつて定まる検出対象パルス信号の
極性に応じて検出対象パルス信号の立上り又は立
下りに同期した微分パルス信号が微分回路から取
り出され、入力端子TTIを介して単安定マルチ
バイブレータMULに加えられる。 この微分パルス信号を受けて単安定マルチバイ
ブレータMULが発振し、その発振出力により電
界効果トランジスタFETが開放して演算増幅器
A1の出力信号が結合コンデンサC4及び出力端
子T0を介して取り出される。 単安定マルチバイブレータMULの発振出力の
時間幅、したがつて、又、電界効果トランジスタ
FETの開放時間幅を、主増幅器における波形整
形の際の制限時間幅に一致せしめておけば、演算
増幅器A1の出力のうち、検出対象パルス信号の
み出力端子T0から取り出され、結合コンデンサ
C4の静電容量を適当に選ぶことにより検出対象
パルス信号に重畳している雑音成分を除くことが
出来る。 検出対象パルス信号の消滅と同時に電界効果ト
ランジスタFETも亦閉成し、出力端子T0の出
力は零となる。 (発明が解決しようとする問題点) 第9図に示した従来の基線安定化回路において
は、結合コンデンサC4が演算増幅器A1の負荷
となつて発振し易いばかりでなく、出力端子T0
に接続される負荷のインピーダンスが低い場合に
は、結合コンデンサC4を介して取り出される検
出対象パルス信号の波形が崩れて、正しい波高値
を求めることが出来ない。 又、検出対象パルス信号に比し雑音成分が比較
的小なる場合には、或る程度基線の安定効果を呈
するが、検出対象パルス信号に対して雑音成分が
比較的大なる場合には、基線の安定効果は殆ど認
められない。 (問題点を解決するための手段、実施例) 本発明は、上記従来の欠点を除き、検出対象パ
ルス信号の波高値に対して比較的レベルの高い雑
音成分が混入している場合にも、検出対象パルス
信号の正しい波高値を求め得る基線安定化回路を
実現することを目的とする。 第1図は、本発明の一実施例を示す図で、TI
は被増幅信号の入力端子、A1は演算増幅器で、
抵抗R1及びR2の値を適当に選んで増幅度をほ
ぼ一定ならしめてある。T0は出力端子、FET
は常時閉成スイツチング素子で、例えば電界効果
トランジスタより成る。MULはその開閉制御回
路で、例えば単安定マルチバイブレータより成
る。A2は演算増幅器で、抵抗R3,R4及びコ
ンデンサC1と共に電圧保持回路を形成する。
TTIはタイミングパルス信号の入力端子である。 本発明回路においては、常時は電界効果トラン
ジスタFETが閉成状態に保たれ、演算増幅器A
2より成る電圧保持回路の出力側A点の電圧が演
算増幅器A1の反転入力端子の電圧と等しく保た
れる。 第9図に示した従来の回路と同様、例えば放射
線検出器で検出され、主増幅器及び微分回路に導
入され、主増幅器において波形整形された後、入
力端子TIに加えられる信号が、例えば第4図イ
に示すような波形であるとすると、検出対象パル
ス信号が検出されない間は、入力信号は演算増幅
器A1、電界効果トランジスタFET及び入力抵
抗R3を介して演算増幅器A2より成る電圧保持
回路に導入され、その出力電圧が演算増幅器A1
の非反転入力端子に加えられて反転入力端子に加
えられる入力信号と差動的にう合成され、出力端
子T0に出力に現れることはない。 然しながら、放射線検出器から検出対象パルス
信号が検出されると、検出対象パルス信号の極性
に応じてその立上り又は立下りに同期した微分パ
ルス信号(第4図、ロ)が微分回路から送出さ
れ、入力端子TTIを介して単安定マルチバイブ
レータMULに加えられてこれを発振せしめる。
単安定マルチバイブレータMULの発振出力の時
間幅を主増幅器において波形整形されたパルスの
時間幅に等しくなるように調整しておけば、電界
効果トランジスタFETはこの時間幅の間だけ開
放され(第4図、ハ)、この開放中、電圧保持回
路は電界効果トランジスタFETの開放直前の電
圧をそのまま引続き保持する(第4図、ニ)。 したがつて、入力端子TIを介して演算振幅器
A1の反転入力端子に加えられた検出対象パルス
信号に重畳している雑音成分は、電圧保持回路の
保持電圧と差動的に合成され、雑音成分が除かれ
た検出対象パルス信号が出力端子T0から取り出
される(第4図、ホ)。 尚、第4図イ乃至ホの各横軸は時間T、各縦軸
は電圧Vである。 本実施例においては、電界効果トランジスタ
FETの開放中に、雑音成分のレベルが大きく変
動した場合には雑音成分の補償が完全には行われ
ず、検出対象パルス信号の正しい波高値を求め得
なくなるおそれがある。 これを波形図について説明すると、第5図(横
軸及び縦軸は、第4図と同じ)は、第4図におけ
る時刻t1乃至t2間を拡大した波形図で、イは入力
端子TIを介して演算増幅器A1の反転入力端子
に加えられた信号波形、ロは検出対象パルス信号
と同期した微分パルス信号波形、ハは電界効果ト
ランジスタFETの開閉状態を示す波形、ニは電
圧保持回路の保持電圧波形、ホは出力端子T0の
出力電圧波形をそれぞれ示すもので、各図から明
らかなように、検出対象パルス信号の検出時には
電圧保持回路における保持電圧が一定であるに対
して、雑音成分のレベルはこの間にも変動して居
り、したがつて、電界効果トランジスタFETの
開放直前における保持電圧を以てしては、この雑
音成分の変動分の補償は不可能で、出力端子T0
から取り出される検出対象パルス信号の波形は実
際の波形と異なつたものとなり、正しい波高値を
求めることが出来なくなるおそれがある。 第2図は、電界効果トランジスタFETの開放
中における雑音成分のレベル変動分をも、完全に
補償し得る本発明回路の一例を示す図で、R5及
びC2は積分回路を形成する抵抗及びコンデンサ
で、他の符号及び構成は第1図と同様である。 第6図(横軸及び縦軸は第4図と同じ)は、作
動説明のための波形図である。 前実施例の場合と同様に図には示していない
が、例えば放射線検出器の検出信号を主増幅器及
び微分回路に加え、主増幅器において前述と同様
の波形整形を施した後、入力端子TIを介して演
算増幅器A1の反転入力端子に加えると(第6
図、イ)、その反転増幅出力は電界効果トランジ
スタFETを介して演算増幅器A2より成る電圧
保持回路に加えられる。 電圧保持回路の出力電圧は抵抗R5及びコンデ
ンサC2より成る積分回路を介して演算増幅器A
1の非反転入力端子に加えられ、この端子電圧、
即ち、抵抗R5とコンデンサC2との接続点Cの
電圧(第6図、ホ)が、演算増幅器A1の反転入
力端子の電圧(第6図、イ)と等しく保たれ、出
力端子T0の出力電圧が零となるように動作す
る。 尚、第6図ニは、電圧保持回路の出力側B点の
電圧波形で、C点の電圧波形の微分波形となる。 放射線検出器から検出対象パルス信号が送出さ
れると、その立上り又は立下り同期した微分パル
ス信号(第6図、ロ)が微分回路から送出され、
タイミングパルス信号の入力端子TTIを介して
単安定マルチバイブレータMULに加えられ、こ
れを発振せしめて電界効果トランジスタFETを
一定時間幅の間だけ開放し(第6図、ハ)、電圧
保持回路は電界効果トランジスタFETの開放直
前の電圧を保持すること前実施例と同様である
が、本実施例においては、電圧保持回路の保持電
圧が抵抗R5及びコンデンサC2より成る積分回
路で積分されて演算増幅器A1の非反転入力端子
に導入され、反転入力端子に加えられる入力信号
との差電圧、即ち、検出対象パルス信号(第6
図、ヘ)が出力端子T0から取り出される。 第3図も亦、本発明の他の実施例を示す図で、
A3は演算増幅器で、抵抗R6,R7及びコンデ
ンサC3と共に積分回路を形成する。R8は入力
抵抗、R9は演算抵抗で、他の符号及び構成は第
2図と同様である。 本実施例は、前実施例において抵抗R5及びコ
ンデンサC2を以て形成した積分回路を、演算増
幅器A3、抵抗R6,R7及びコンデンサC3よ
り成る積分回路を以て置換え、この積分回路の出
力信号(入力信号と逆相)を入力抵抗R8を介し
て演算増幅器A1の反転入力端子に加えるように
構成した点が前実施例と異なるのみで、基線安定
作動は前実施例と同様である。 (発明の効果) 本発明回路は、出力インピーダンスを低くなし
得るから出力端子T0に接続される負荷のインピ
ーダンスが低い場合にも検出対象パルス信号の波
形が崩れるおそれなく、又、従来の回路のように
結合コンデンサが演算増幅器A1の負荷となつて
発振し易い等のおそれもなく、特に、第2図及び
第3図に示した実施例においては、電界効果トラ
ンジスタより成る常時閉成スイツチング素子
FETの開放中に、雑音成分が大幅に変動した場
合にも、その補償をほぼ完全に行なうことが可能
で、これを波形図について説明すると、第7図
(横軸及び縦軸は第4図と同じ)は、第6図にお
ける時刻t1乃至t2間を軸間的に拡大した波形図
で、イは第2図及び第3図に示した本発明基線安
定化回路における演算増幅器A1の反転入力端子
に加えられる入力信号波形、ロは入力端子TTI
に導入される微分パルス信号波形、ハは電界効果
トランジスタより成る常時閉成スイツチング素子
FETの開閉状態を示す波形、ニは演算増幅器A
2より成る電圧保持回路の出力側B点における電
圧波形、ホは抵抗R5及びコンデンサC2の接続
点Cにおける電圧波形、(第3図におけるC点の
波形はホの波形に対して逆相となる)、ヘは出力
端子T0から取り出される検出対象パルス信号波
形である。 図に示したように、波形ホは波形ニの積分波形
であるから、第2図及び第3図に示した積分回路
の時定数を適当に選ぶことにより、電界効果トラ
ンジスタFETの開放中におけるC点の電圧変化
率を、電界効果トランジスタFETの開放前にお
けるC点の電圧変化率とほぼ同様に保ち、したが
つて、電界効果トランジスタFETの開放中にお
けるC点の電圧変化を雑音成分のレベル変化とほ
ぼ同様になし得るから、出力端子T0から取り出
される検出対象パルス信号は雑音成分の影響を殆
ど受けていないものとなり、正確な波高値を求め
ることが出来る。 本発明者等が試作回路について行つた実験結果
に基づいて本発明回路の基線安定化に対する効果
を説明すると、第8図において、PGはパルス発
生器、NGは雑音電圧発生器、MAは主増幅器、
DFは微分回路、BLRは基線安定化回路、PHA
はパルス波高分析器で、基線安定化回路BLRを
第1図及び第2図に示した実施例の回路を以て各
構成した場合における検出対象パルス信号の波高
値の変動分を測定した結果を次表に示した。
(Industrial Application Field) The present invention relates to a baseline stabilization circuit for the output of an amplifier circuit, such as a detection signal of a radiation detector, for example. (Prior art) For example, since the detection signal of a radiation detector used for radiation measurement generally consists of irregular minute pulse signals, when using a DC amplifier to amplify this signal, input offset voltage or temperature drift, etc. As a result, the baseline fluctuates, and in some cases, the output voltage saturates at a voltage determined by the power supply voltage, making it impossible to accurately determine the peak value of the pulse signal to be produced in either case. When using an AC amplifier as an amplifier, the average value of the amplified output is a characteristic of the AC amplifier, so if the number of pulses is extremely small, the peak value of the pulse can be determined almost accurately, but if the number of pulses is large, As the value increases, the base line fluctuates and falls, and the pulse height value tends to become smaller than the correct value. In order to eliminate the above-mentioned drawbacks when the detection signal of a radiation detector is amplified by a DC or AC amplifier, a baseline stabilization circuit as shown in FIG. 9, for example, has been proposed and implemented. In the figure, TI is the input terminal of the amplified signal, A
Reference numeral 1 designates an operational amplifier, and resistors R1, R2, and R9 are selected to appropriate values to keep the degree of amplification substantially constant. C4 is a coupling capacitor, T0 is an output terminal,
The FET is a normally closed switching element made of, for example, a field effect transistor, and the MUL is its switching control circuit, which is made of, for example, a monostable multivibrator. TTI is an input terminal for timing pulse signals. When this circuit is used, for example, to stabilize the baseline in the amplified output when amplifying the detection signal of a radiation detector, the detection signal of the radiation detector is transferred to a differentiator circuit and a main amplifier (none of which are shown). In addition, waveform shaping is performed in the main amplifier, that is, the time width of the pulse signal to be detected in the detection output is appropriately limited to a fixed time (for example, 1 μsec. to several μsec.).
without the subsequent detection target pulse signal being superimposed on the falling or rising part of the preceding detection target pulse signal.
After waveform shaping is performed so that each pulse signal to be detected can be separated, it is applied to the input terminal TI. While the detection signal of the radiation detector does not include the pulse signal to be detected, the coupling capacitor C4 provided on the output side of the operational amplifier A1 is kept in a grounded state via the normally closed switching element FET, and the output terminal T0 No output appears in . When the radiation detector detects a pulse signal to be detected, the amplified output whose waveform has been shaped by the main amplifier is applied to the input terminal TI, and detection is performed according to the polarity of the pulse signal to be detected, which is determined by the detection characteristics of the radiation detector. A differential pulse signal synchronized with the rise or fall of the target pulse signal is taken out from the differentiator circuit and applied to the monostable multivibrator MUL via the input terminal TTI. In response to this differential pulse signal, the monostable multivibrator MUL oscillates, and its oscillation output opens the field effect transistor FET, and the output signal of the operational amplifier A1 is taken out via the coupling capacitor C4 and the output terminal T0. The time width of the oscillation output of the monostable multivibrator MUL, and therefore also the field effect transistor
If the open time width of the FET is made to match the time limit for waveform shaping in the main amplifier, only the pulse signal to be detected out of the output of the operational amplifier A1 will be taken out from the output terminal T0, and the By appropriately selecting the capacitance, noise components superimposed on the pulse signal to be detected can be removed. At the same time as the detection target pulse signal disappears, the field effect transistor FET is also closed, and the output of the output terminal T0 becomes zero. (Problems to be Solved by the Invention) In the conventional baseline stabilization circuit shown in FIG.
If the impedance of the load connected to is low, the waveform of the detection target pulse signal taken out via the coupling capacitor C4 will be distorted, making it impossible to determine the correct peak value. Also, when the noise component is relatively small compared to the pulse signal to be detected, the baseline stabilizes to some extent, but when the noise component is relatively large compared to the pulse signal to be detected, the baseline stabilizes. Almost no stabilizing effect was observed. (Means for Solving Problems, Embodiments) In addition to the above-mentioned drawbacks of the conventional art, the present invention can solve the problem even when a relatively high-level noise component is mixed in with respect to the peak value of the pulse signal to be detected. The purpose of this invention is to realize a baseline stabilization circuit that can determine the correct peak value of a pulse signal to be detected. FIG. 1 is a diagram showing an embodiment of the present invention.
is the input terminal of the signal to be amplified, A1 is the operational amplifier,
The values of resistors R1 and R2 are appropriately selected to keep the amplification level approximately constant. T0 is the output terminal, FET
is a normally closed switching element, for example consisting of a field effect transistor. MUL is the opening/closing control circuit, which consists of, for example, a monostable multivibrator. A2 is an operational amplifier, which together with resistors R3 and R4 and capacitor C1 forms a voltage holding circuit.
TTI is an input terminal for timing pulse signals. In the circuit of the present invention, the field effect transistor FET is always kept closed, and the operational amplifier A
The voltage at point A on the output side of the voltage holding circuit consisting of 2 is kept equal to the voltage at the inverting input terminal of operational amplifier A1. Similar to the conventional circuit shown in FIG. Assuming that the waveform is as shown in Figure A, while the pulse signal to be detected is not detected, the input signal is introduced into the voltage holding circuit consisting of the operational amplifier A2 via the operational amplifier A1, the field effect transistor FET, and the input resistor R3. and its output voltage is applied to operational amplifier A1
It is applied to the non-inverting input terminal of , and is differentially combined with the input signal applied to the inverting input terminal, and does not appear as an output at the output terminal T0. However, when the pulse signal to be detected is detected from the radiation detector, a differential pulse signal (FIG. 4, b) synchronized with the rising or falling edge of the pulse signal to be detected is sent out from the differentiating circuit according to the polarity of the pulse signal to be detected. It is applied to the monostable multivibrator MUL via the input terminal TTI to cause it to oscillate.
If the time width of the oscillation output of the monostable multivibrator MUL is adjusted to be equal to the time width of the waveform-shaped pulse in the main amplifier, the field effect transistor FET is opened only during this time width (the fourth During this opening, the voltage holding circuit continues to hold the voltage immediately before the field effect transistor FET was opened (FIG. 4, d). Therefore, the noise component superimposed on the detection target pulse signal applied to the inverting input terminal of the operational amplifier A1 via the input terminal TI is differentially synthesized with the holding voltage of the voltage holding circuit, and the noise component is The detection target pulse signal from which the component has been removed is taken out from the output terminal T0 (FIG. 4, E). In addition, each horizontal axis of FIG. 4A to 4E represents time T, and each vertical axis represents voltage V. In this example, a field effect transistor
If the level of the noise component changes significantly while the FET is open, the noise component will not be completely compensated, and there is a possibility that the correct peak value of the pulse signal to be detected cannot be determined. To explain this in terms of waveform diagrams, Fig. 5 (horizontal and vertical axes are the same as Fig. 4) is an enlarged waveform diagram from time t1 to t2 in Fig. 4. 1 is the signal waveform applied to the inverting input terminal of the operational amplifier A1, 2 is the differential pulse signal waveform synchronized with the pulse signal to be detected, 3 is the waveform indicating the open/close state of the field effect transistor FET, and d is the holding voltage of the voltage holding circuit. The waveform and E show the output voltage waveform of the output terminal T0.As is clear from each figure, when the detection target pulse signal is detected, the holding voltage in the voltage holding circuit is constant, but the level of the noise component is is fluctuating during this time, and therefore, it is impossible to compensate for the fluctuation of this noise component using the holding voltage just before the field effect transistor FET is opened, and the output terminal T0
The waveform of the pulse signal to be detected extracted from the detection target pulse signal will be different from the actual waveform, and there is a possibility that it will not be possible to obtain the correct peak value. FIG. 2 is a diagram showing an example of the circuit of the present invention that can completely compensate for level fluctuations of noise components while the field effect transistor FET is open. R5 and C2 are a resistor and a capacitor forming an integrating circuit. , other symbols and configurations are the same as in FIG. FIG. 6 (horizontal and vertical axes are the same as FIG. 4) is a waveform diagram for explaining the operation. Although not shown in the figure as in the case of the previous embodiment, for example, the detection signal of the radiation detector is applied to the main amplifier and the differential circuit, and after the main amplifier performs the same waveform shaping as described above, the input terminal TI is When applied to the inverting input terminal of operational amplifier A1 through
The inverted amplified output is applied to a voltage holding circuit consisting of an operational amplifier A2 via a field effect transistor FET. The output voltage of the voltage holding circuit is applied to the operational amplifier A via an integrating circuit consisting of a resistor R5 and a capacitor C2.
1 to the non-inverting input terminal, and this terminal voltage,
That is, the voltage at the connection point C between the resistor R5 and the capacitor C2 (FIG. 6, e) is kept equal to the voltage at the inverting input terminal of the operational amplifier A1 (FIG. 6, a), and the output voltage at the output terminal T0 It operates so that becomes zero. Note that FIG. 6D shows the voltage waveform at point B on the output side of the voltage holding circuit, which is a differential waveform of the voltage waveform at point C. When a pulse signal to be detected is sent out from the radiation detector, a differential pulse signal (FIG. 6, b) synchronized with its rising or falling edge is sent out from the differentiating circuit,
A timing pulse signal is applied to the monostable multivibrator MUL through the input terminal TTI, causing it to oscillate and opening the field effect transistor FET for a certain period of time (Fig. 6, C). Holding the voltage immediately before the effect transistor FET is opened is the same as in the previous embodiment, but in this embodiment, the voltage held by the voltage holding circuit is integrated by an integrating circuit consisting of a resistor R5 and a capacitor C2, and the voltage held by the operational amplifier A1 is The difference voltage between the input signal introduced into the non-inverting input terminal and applied to the inverting input terminal, that is, the detection target pulse signal (sixth
(F) is taken out from the output terminal T0. FIG. 3 also shows another embodiment of the present invention,
A3 is an operational amplifier, which forms an integration circuit together with resistors R6, R7 and capacitor C3. R8 is an input resistor, R9 is an operational resistor, and the other symbols and configurations are the same as in FIG. In this embodiment, the integrating circuit formed by resistor R5 and capacitor C2 in the previous embodiment is replaced with an integrating circuit consisting of operational amplifier A3, resistors R6, R7, and capacitor C3, and the output signal of this integrating circuit (inverse to the input signal) is This embodiment differs from the previous embodiment only in that it is configured to apply the phase) to the inverting input terminal of the operational amplifier A1 via the input resistor R8, and the baseline stabilization operation is the same as that of the previous embodiment. (Effects of the Invention) Since the circuit of the present invention can lower the output impedance, there is no fear that the waveform of the pulse signal to be detected will be distorted even when the impedance of the load connected to the output terminal T0 is low. In particular, in the embodiments shown in FIGS. 2 and 3, there is no fear that the coupling capacitor becomes a load on the operational amplifier A1 and is likely to cause oscillation. In particular, in the embodiments shown in FIGS.
Even if the noise component fluctuates significantly while the FET is open, it can be almost completely compensated for.This can be explained using a waveform diagram as shown in Figure 7 (horizontal and vertical axes are shown in Figure 4). ) is a waveform diagram expanded between time t1 and t2 in FIG. 6 between the axes, and A is the inverting input of the operational amplifier A1 in the baseline stabilization circuit of the present invention shown in FIGS. 2 and 3. Input signal waveform applied to the terminal, b is input terminal TTI
The differential pulse signal waveform introduced into C is a normally closed switching element consisting of a field effect transistor.
Waveform showing open/closed state of FET, D is operational amplifier A
The voltage waveform at point B on the output side of the voltage holding circuit consisting of 2, E is the voltage waveform at the connection point C between resistor R5 and capacitor C2, (the waveform at point C in Figure 3 is in reverse phase with the waveform at E). ) and F are the detection target pulse signal waveforms taken out from the output terminal T0. As shown in the figure, since waveform E is an integral waveform of waveform D, by appropriately selecting the time constant of the integrating circuit shown in FIGS. 2 and 3, the The rate of change in voltage at point C is kept almost the same as the rate of change in voltage at point C before the field effect transistor FET is opened, and therefore the change in voltage at point C while the field effect transistor FET is open is considered to be the change in the level of the noise component. Since it can be done almost in the same way as above, the pulse signal to be detected taken out from the output terminal T0 is almost unaffected by noise components, and an accurate peak value can be obtained. To explain the effect of the present invention circuit on baseline stabilization based on the experimental results conducted by the present inventors on a prototype circuit, in Fig. 8, PG is a pulse generator, NG is a noise voltage generator, and MA is a main amplifier. ,
DF is differentiator circuit, BLR is baseline stabilization circuit, PHA
is a pulse height analyzer, and the results of measuring the variation in the peak value of the pulse signal to be detected when the baseline stabilization circuit BLR is configured with the circuits of the embodiments shown in Figures 1 and 2 are shown in the table below. It was shown to.

【表】 尚、上表は、雑音電圧発生器NGにおいて200
Hz及び1kHzの正弦波電圧を発生せしめると共に、
発生電圧を0.01Vから10Vまで変化せしめ、検出
対象パルス信号としてパルス発生器PGにおいて
波高値1Vのパルス信号を発生せしめた場合のデ
ータである。 上表から明らかなように、本発明基線安定化回
路は、基線の安定効果が極めて顕著である。 以上は、放射線検出器の検出信号の増幅回路に
おける基線の安定化に本発明を実施した場合につ
いて説明したが、一般のパルス信号の増幅回路に
おける基線の安定化に用い得ること勿論である。
[Table] The above table shows the noise voltage generator NG with 200
While generating sine wave voltage of Hz and 1kHz,
This is data when the generated voltage is varied from 0.01 V to 10 V, and a pulse signal with a peak value of 1 V is generated in the pulse generator PG as the pulse signal to be detected. As is clear from the above table, the baseline stabilizing circuit of the present invention has a very remarkable baseline stabilizing effect. Although the present invention has been described above for stabilizing the baseline in a detection signal amplification circuit of a radiation detector, it is of course applicable to stabilizing the baseline in a general pulse signal amplification circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は、本発明の一実施例を示す
図、第4図乃至第7図は、その作動説明のための
波形図、第8図は、本発明の効果を説明するため
の図、第9図は、従来の回路を示す図で、TI及
びTTI:入力端子、A1乃至A3:演算増幅器、
R1乃至R9:抵抗、T0:出力端子、FET:
スイツチング素子、MUL:開閉制御回路、C1
乃至C4:コンデンサ、PG:パルス発生器、
NG:雑音電圧発生器、MA:主増幅器、DF:微
分回路、BLR:基線安定化回路、PHA:パルス
波高分析器である。
1 to 3 are diagrams showing one embodiment of the present invention, FIGS. 4 to 7 are waveform diagrams for explaining its operation, and FIG. 8 is for explaining the effects of the present invention. , and FIG. 9 are diagrams showing conventional circuits, in which TI and TTI: input terminals, A1 to A3: operational amplifiers,
R1 to R9: Resistance, T0: Output terminal, FET:
Switching element, MUL: Opening/closing control circuit, C1
to C4: capacitor, PG: pulse generator,
NG: noise voltage generator, MA: main amplifier, DF: differentiation circuit, BLR: baseline stabilization circuit, PHA: pulse height analyzer.

Claims (1)

【特許請求の範囲】 1 検出対象パルス信号の時間幅を一定に制限す
る主増幅器出力の加えられる演算増幅器と、常時
閉成スイツチング素子を介して前記演算増幅器出
力の導入される電圧保持回路と、この電圧保持回
路の保持電圧を前記演算増幅器の負帰還せしめる
回路と、前記検出対象パルス信号と同期する信号
により駆動せしめられ、前記常時閉成スイツチン
グ素子を検出対象パルス信号の時間幅だけ開放せ
しめる開閉制御回路とより成ることを特徴とする
基線安定化回路。 2 検出対象パルス信号の時間幅を一定に制限す
る主増幅器出力の加えられる演算増幅器と、常時
閉成スイツチング素子を介して前記演算増幅器出
力の導入される電圧保持回路と、この電圧保持回
路の保持電圧を積分して前記演算増幅器に負帰還
せしめる積分回路と、前記検出対象パルス信号と
同期する信号により駆動せしめられ、前記常時閉
成スイツチング素子を検出対象パルス信号の時間
幅だけ開放せしめる開閉制御回路とより成ること
を特徴とする基線安定化回路。
[Scope of Claims] 1. An operational amplifier to which a main amplifier output is applied that limits the time width of a pulse signal to be detected to a constant value, and a voltage holding circuit to which the operational amplifier output is introduced via a normally closed switching element. A circuit for negative feedback of the holding voltage of the voltage holding circuit to the operational amplifier, and a switching element driven by a signal synchronized with the pulse signal to be detected, and opening the normally closed switching element for the time width of the pulse signal to be detected. A baseline stabilization circuit comprising a control circuit. 2. An operational amplifier to which the output of the main amplifier is applied that limits the time width of the pulse signal to be detected to a constant, a voltage holding circuit to which the output of the operational amplifier is introduced via a normally closed switching element, and a holding circuit for this voltage holding circuit. an integrating circuit that integrates a voltage and provides negative feedback to the operational amplifier; and an opening/closing control circuit that is driven by a signal synchronized with the pulse signal to be detected and opens the normally closed switching element for a time width of the pulse signal to be detected. A baseline stabilization circuit characterized by comprising:
JP60236739A 1985-10-22 1985-10-22 Baseline stabilization circuit Granted JPS6295484A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60236739A JPS6295484A (en) 1985-10-22 1985-10-22 Baseline stabilization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60236739A JPS6295484A (en) 1985-10-22 1985-10-22 Baseline stabilization circuit

Publications (2)

Publication Number Publication Date
JPS6295484A JPS6295484A (en) 1987-05-01
JPH058993B2 true JPH058993B2 (en) 1993-02-03

Family

ID=17005065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60236739A Granted JPS6295484A (en) 1985-10-22 1985-10-22 Baseline stabilization circuit

Country Status (1)

Country Link
JP (1) JPS6295484A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2318411B (en) * 1996-10-15 1999-03-10 Simage Oy Imaging device for imaging radiation

Also Published As

Publication number Publication date
JPS6295484A (en) 1987-05-01

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