JPH06100622B2 - Signal processing circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a signal processing circuit suitable for use in improving a saturation phenomenon when an excessive input signal is supplied and a reduced voltage characteristic during signal transmission.

[Background technology]

In radio receivers and television receivers, a so-called AGC circuit is provided, and when the input signal becomes excessive, the detection output controls the gain of the signal transmission system. Some tape recorders and the like are provided with a noise reduction system in order to improve the S / N ratio, and a detection circuit is also used in this noise reduction system.

Since the detection output of the detection circuit serves as a control signal for gain control, it is required to accurately respond to the level change of the input signal.

On the other hand, the radio receiver, the tape recorder, or the radio cassette in which these are integrated is often a portable type, and a battery is used as a power source.

When it is used for a long time, the power supply voltage gradually decreases, so that it is not possible to supply a sufficient power supply voltage to the detection circuit, and the detection output has a saturated waveform. For this reason, it is better that this phenomenon does not appear even if the power supply voltage drops.

Therefore, the present inventors have considered rectifying an analog input signal and driving a current mirror circuit composed of PNP transistors by this rectified output to obtain a detection output. According to this circuit method, a double-rectified detection output can be obtained, but since the voltage drop of the load resistance is large, the PNP transistor that constitutes the current mirror circuit will quickly reach saturation when the power supply voltage drops. It was found that waveform distortion appears in the detection output.

Further, the above phenomenon is the same when the input signal becomes excessive, and it is noticed that the range in which the detection output corresponding to the change of the input signal can be obtained is narrow.

In view of the problems as described above, the inventors of the present invention have found that a detection output in which the saturation phenomenon at the time of the above-mentioned reduced voltage is corrected can be obtained by detecting the change in the output voltage and correcting it. It came to eggplant.

Regarding the above detection circuits, etc., "FM / TV audio multiple tuner and its live usage" (published June 15, 1980,
Published by Seibundo Shinkosha Co., Ltd., P174).

[Object of the Invention]

An object of the present invention is to provide a signal processing circuit which has an excellent voltage reduction characteristic and can obtain an output signal without waveform distortion even when an excessive input signal is supplied.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Outline of the Invention] The outline of the invention disclosed in the present application is as follows.

That is, a diode for a level shifter is provided in the input current path of the current mirror circuit, a voltage drop of the load is supplied to the output current path, and a transistor to which a control voltage is supplied by the diode is provided. By driving the transistor by the control voltage that changes the level corresponding to the change in the voltage drop, detecting the change in the voltage drop from this transistor, and correcting the voltage drop by the detection output,
The object of the present invention is to obtain a detection output with a good voltage reduction characteristic.

〔Example〕

An embodiment of a signal processing circuit to which the present invention is applied will be described below with reference to FIGS. 1 is a circuit diagram for explaining the basic operation of the signal processing circuit, and FIG. 2 (A).
(B) is a waveform diagram for explaining the circuit operation, FIG. 3 is a circuit diagram showing an application example, and FIG. 4 is a waveform diagram for explaining the circuit operation.

The feature of this embodiment is that a diode serving as a level shifter.
D ₁ , transistor Q ₃ that detects changes in load voltage drop
Has been established.

PNP transistors Q ₁ and Q _{2 form} a current mirror circuit,
The diode D ₁ acts as a level shifter. Also,
The PNP transistor Q ₃ detects a change in the detection output obtained from the load resistance R _L , and the transistor Q ₄ feedbacks the output current.

When the input signal Vin is supplied, the reference current I ₁ flows through the transistor Q ₁ and the diode D ₁ in response to the level change, and the output current I ₂ flows through the transistors Q ₂ , Q ₄ and the resistor _RL. . Transistor Q when + Vcc power supply is at a predetermined level
Base voltage of _3, + Vcc-2V would _BE -V _F, its emitter voltage is determined by the R _L × I _2, the transistor Q ₃ are in this state is turned off. Therefore, transistor Q ₃
Therefore, the output voltage is not obtained, and the detected output V _A obtained as the voltage drop of the resistor R _L does not show the waveform distortion as shown by the solid line in FIG.

On the other hand, when the + Vcc power is lowered, along with its level reduced, although the base voltage of the transistor Q ₃ is reduced, the decrease remains of _{Vcc-2V BE -V F, -} △ drops by Vcc min.

However, the detected output V _A cannot be amplified as it is in accordance with the reduced voltage, and its waveform is distorted as shown by the dotted line in FIG. 2 (A) and becomes saturated.

That is, the transistor Q4 that provides the detection output V _A from the collector is different from the ideal transistor in which the collector current is not affected by the change in the collector-emitter voltage,
When the collector-emitter voltage decreases as the power supply voltage Vcc decreases, the collector current also gradually decreases. As a result, distortion as shown by the broken line in FIG. 2 (A) appears in the detection output V _A.

However, the amount of decrease in the base potential of the transistor Q ₃ is larger than the detection output V _A. That is, transistor Q ₃
The base potential, the sum of the forward voltage V _F of the power supply potential Vcc from transistors Q2, Q4 base-emitter voltage 2V _BE (= Q1 of V _BE + Q2 of _BE) of the diode _{D1 (2V BE + V F 3V} F) Is the potential minus (Vcc-3V _F ). At this time, the base-emitter voltage V _{BE of the} transistors Q2 and Q4 and the diode
The forward voltage V _F of D1 exhibits low voltage characteristics similar to those of a normal PN junction. Therefore, the base potential (Vcc-3V _F ) of the transistor Q3 reflects the reduced voltage of the power source potential Vcc as it is, and the detection output V _A (= I
₂ R _L ). Here, the base potential of the transistor Q3 (Vcc
−3V _F ) becomes lower than the detection output V _A , and the difference voltage {V _A − (Vcc−3V _F )} exceeds the base-emitter voltage V _BE of the transistor Q3, that is, Vcc−2V _F <I ₂ R
_When it becomes _L (= V _A ), the bias voltage is supplied to the transistor Q ₃ and it operates in the ON state. Therefore, transistor Q ₃
In the collector of, a correction output voltage V _B having a waveform as shown in FIG. 2 (B) appears. The correction output voltage V _B corresponds to the saturated portion of the detection output V _A.

The detected output V _A is supplied to the adder circuit 2 via the buffer amplifier 1, and the correction output voltage V _B is supplied to the buffer amplifier 3
Is supplied to the adder circuit 2 via.

The adder circuit 2 obtains an output signal Vout obtained by adding the two, and output power in which the saturated portion is corrected as shown in FIG. 2 (C) is obtained.

Therefore, if the output signal Vout is smoothed, a detection output without a level drop can be obtained, and the influence of reduced voltage can be eliminated.

Next, a specific application example of the signal processing circuit will be described with reference to FIGS. 3 and 4. It should be noted that parts having the same circuit operation are denoted by the same reference numerals to avoid redundant description.

A is equivalent to the above signal processing circuit, and the transistors Q ₁₁ and Q ₁₂ are connected to the first current path of the current mirror circuit (Q ₁ and Q ₂ ) and operate as a rectifying circuit.
Q ₁₃ , the diode D ₃ , and the resistors R ₂ and R ₃ stabilize the base current of the transistor Q ₃ .

The operational amplifier 11, the resistor R ₄ , and the capacitor C ₁ operate as an amplifier circuit having a predetermined frequency band.

When the power supply voltage is at the normal voltage level, the transistor
The second of the current mirror circuit (Q ₁ , Q ₂ ) is used for the emitter of Q ₃ .
The voltage drop of the diode D ₄ and the resistor R _L connected to the current path of, that is, the detection output V _A is applied, but it is in the off state because the base voltage is determined in the same manner as above.

The detection output V _A is obtained by the load circuit composed of the diode D ₄ and the resistor R _L , and drives the transistor Q ₂₁ . The output voltage is then obtained from the low impedance emitter resistor R ₁₁ . The base and emitter of the transistor Q ₂₂ operate as a diode, and the detected output is converted into a direct current by a smoothing circuit composed of a resistor R ₁₂ and a capacitor C ₂ .

The transistors Q ₂₃ and Q _{24 form} a current mirror circuit, and in this case, the transistor Q ₂₂ determines the reference current. Then, the sum signal of the output current obtained through the transistor Q ₂₄ and the detection output is obtained as the output signal Vout.

On the other hand, when the power supply voltage drops, the transistor Q ₃ operates in the ON state for the same reason as above. Then, the voltage drop obtained by the diode D ₂ and the resistor R ₂₁ becomes the correction output voltage V _B , and drives the transistor Q ₃₁ . In addition,
The resistance values of the resistors R ₂₁ and R ₂₂ are set to a resistance ratio of about 3: 1 to improve the gain.

The transistor Q ₃₁ operates in accordance with the waveform as shown in FIG. 2B, and increases the reference current flowing through the transistor Q ₂₃ when the correction output voltage V _B is at low level. Further, when the correction output voltage V _B is at the high level, the reference current is lowered.

Since the detection output V _A changes as described above, the transistor Q
₂₃ and Q ₂₄ will operate as an adder circuit. Therefore,
When the voltage is reduced, the output signal Vout corrected for saturation is obtained in the same manner as described above, and the detection output whose level changes corresponding to the input signal Vin is obtained.

Although the above embodiment has described the circuit operation when the voltage is reduced, the same circuit operation is performed even if the input signal Vin changes excessively.

Therefore, the output signal Vout changes as shown by the solid line in FIG. 2 (A) regardless of whether the voltage is reduced or the input signal is excessive. Therefore, the level change shown by the dotted line does not appear, and the output signal Vout does not change.
AGC operation and noise reduction operation by Vout can be performed well.

[Effect]

(1) When the voltage is reduced or when an excessive input signal is supplied, the saturation of the detection output is detected, and the detected output is added to the detected change to obtain a detection output in which the saturation of the detection output is corrected. The effect is obtained.

(2) Since the increase in the number of circuit elements is small and the circuit configuration is simple, it is possible to obtain an effect that an IC can be easily formed.

Although the invention made by the present inventor has been specifically described based on the above embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the current mirror in the signal processing circuit 1 is not limited to the Wilson type and may be a normal current mirror.

[Field of application]

In the above description, the invention mainly made by the present inventor has been described with respect to a signal processing circuit which is a field of use which is the background of the invention, but the present invention is not limited thereto.

For example, it can be used to obtain an AGC signal of a radio receiver or a television receiver.

Further, it can be used to obtain a noise reduction signal in a tape recorder.

[Brief description of drawings]

1 to 4 show an embodiment of a signal processing circuit to which the present invention is applied, and FIG. 1 is a circuit diagram for explaining a basic circuit operation, FIGS. 2 (A), (B), FIG. 4C is a waveform diagram showing a circuit operation, FIG. 3 is a circuit diagram showing an application example of the signal processing circuit, and FIG. 4 is a waveform diagram of an output signal. 1,3 …… Buffer amplifier, 2 …… Adding circuit, V _A …… Detection output, V _B …… Output voltage, Vin …… Input signal, Vout …… Output signal, Q _{1 to} Q ₂₄ …… Transistor, D _{1 to} D ₄ ... diode, I ₁ ... reference current, I ₂ ... output current, A ... signal processing circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-52-26428 (JP, A) Actual exploitation-SHO-52-153030 (JP, U) JP-B-58-40845 (JP, B2)

Claims (1)

[Claims] 1. A first and a second transistor (Q1, Q2).
Each emitter of is connected to the power supply potential, the collector and the base of the second transistor are commonly connected to the base of the first transistor, and the emitter of the third transistor (Q4) is connected to the second transistor. By connecting to the collector and the base of the third transistor to the collector of the first transistor,
A current mirror circuit formed so that the collector of the first transistor serves as the current input point and the collector of the third transistor serves as the current output point, and the current input point of the current mirror circuit corresponds to the level change of the input signal. A signal input circuit that supplies a current, a load circuit that uses a resistance element that current-voltage converts the output current that appears at the current output point of the current mirror circuit, and a series connection in the forward direction in the input current path of the current mirror circuit. A diode that forms a shift potential on the input current path that is lowered by a predetermined level with respect to the potential at the current input point by connecting it, an emitter is connected to the current output point, and a base is formed by the diode. It is connected to the shift potential, and the difference voltage between the potential at the current output point and the shift potential is used as the base bias voltage. And a fourth transistor (Q3) provided by the load circuit, the signal voltage extracted from the collector when the fourth transistor is biased to the ON state by the difference voltage is current-voltage converted by the load circuit. A signal processing circuit, comprising: an adder circuit that adds the voltage and outputs the added voltage.