JPH0611070B2 - Wafer counter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a wafer counter capable of detecting the position and the number of semiconductor wafers stored in a wafer cassette.

(Prior Art) Semiconductor integrated circuit
When manufacturing a wafer, a wafer (w
The wafer counter is used to monitor the presence or absence of the wafer and to confirm the number of wafers to be supplied to the next process. The wafer counter detects the storage position and the number of wafers stored in the wafer cassette.

An example of such a wafer counter is, for example, SHOkai 61-12934.
No. 0 (Japanese utility model disclosure No.86-12934
There is 0). FIG. 1 shows how to detect the position and the number of wafers by the wafer counter. That is, reference numeral (1) in the figure indicates a wafer stored in a wafer cassette (not shown). The light projecting element (3) and the light receiving element (4) are arranged so as to face each other with respect to the surface of the wafer (1) so that the optical axis (2) is set in a state of being inclined at a predetermined angle (θ). ing. The light emitting element (3) and the light receiving element (4) are
The wafers (1) are intermittently moved along the arrangement direction at a movement pitch equal to the arrangement pitch (D) of the wafers (1). The optical axis goes from the light emitting element (3) to the light receiving element (4).
The wafer (1) blocks the infrared light projected along (2),
The presence of the wafer (1) is detected when the amount of infrared light input to the light receiving element (4) is attenuated. On the contrary, when the amount of infrared light is not attenuated, it is detected that the wafer (1) does not exist. The number of wafers (1) is detected by detecting the presence or absence of the wafer (1) at each intermittent movement of the light projecting element (3) and the light receiving element (4).

In addition to the above-mentioned wafer counter, there is also a wafer counter which uses a reflective sensor to project infrared rays from above the wafer cassette toward the wafer and receives the reflected light to detect the presence or absence of the wafer. Also in this case, the number of wafers is detected by intermittently scanning the infrared light projecting element and the reflected light receiving element along the wafer arrangement direction.

(Problems to be Solved by the Invention) However, in such a conventional wafer counter, the projected infrared rays may be diffusely reflected on the surface of the wafer or the edge of the wafer. In this case, the light receiving element erroneously detects the wafer. As a result, there is a problem that the position and the number of wafers cannot be detected accurately. Further, as wafer counters, actual development number Sho 101-101746, actual development number 61-55431, actual development number 61-127639
No., No. 61-153345, No. 61-129340, No. 62
There are means such as -14733. However, there is a problem that it is difficult to put it into practical use in processes such as wafer transfer.

The present invention has been made to solve the above problems,
Space saving can be achieved, and moreover, the positions and the number of a large number of semiconductor wafers are not affected by the orientation of the orientation flat of the semiconductor wafers, and all the wafers can be detected accurately and instantly without leaking. It is an object of the present invention to provide a wafer counter that can be used.

(Means for Solving the Problems) A wafer counter of the present invention is a wafer counter for detecting the position and the number of wafers stored in a wafer cassette, each of which is a plurality of wafers separated by a predetermined interval. Detecting each of the above wafers by arranging transmissive sensors consisting of a light emitting element and a light receiving element, which are arranged so as to face each other so as to sandwich every other wafer stored in the cassette, in a straight line in the longitudinal direction of the wafer cassette. A first sensor array and a transmissive sensor having the same structure as the first sensor array so as to detect every other wafer other than the wafer detected by the first sensor array. The two sensor rows and the light-emitting elements and light-receiving elements of each transmissive sensor that constitutes each of these sensor rows are located in the wafer more than the orientation flat of each wafer. And a base for supporting the respective sensor rows in parallel with each other so as to be located closer to the center.

(Operation) According to the present invention, when detecting the position and the number of wafers stored in the wafer cassette, the first sensor row has the light emitting element and the light receiving element of each transmissive sensor within the wafer cassette.
The wafers placed every other wafer are opposed to each other by sandwiching the wafers closer to the center of the wafer than the orientation flats, and the light emitting element and the light receiving element of each transmissive sensor in the wafer cassette are arranged in the wafer cassette in the second sensor row as in the first sensor row. The remaining wafers, which are placed every other wafer, face each other in a state of being sandwiched closer to the center of the wafer than the respective orientation flats, and leak all wafers by the first and second sensor rows regardless of the orientation of the wafer orientation flats. It is possible to detect the position and the number of sheets simultaneously and surely collectively without any operation.

(Example) Hereinafter, one example of the present invention will be described with reference to the drawings.

FIG. 2 is a perspective view of the wafer cassette (21) accommodating the wafer counter (20) of the present invention. This wafer cassette (2
1) is a container made of Delrin (trade name) having a U-shaped cross section, and a plurality of wafers (22) are held on both side walls (21a) (21b) of the wafer at predetermined intervals, so that the peripheral edge of the wafer is effective. A large number of housing grooves (21c) having a depth of, for example, 1.5 mm that do not affect the semiconductor chip are formed. In the case of a 6-inch wafer, this cassette (21) has a size of, for example, a length of 180 mm, a width of 145 mm, and a height of 165 mm. A through hole (21d) is provided. The wafer counter (20) can be lifted and lowered by an elevator mechanism (not shown) so as to pass through the through hole (21d) from below the bottom of the wafer cassette (21), and the peripheral edge of the wafer (22) is bitten in. It is configured to count while maintaining the interval of 22). The amount of biting of the wafer 22 is a region that does not affect effective elements of the wafer.

FIG. 3 is an enlarged perspective view of the wafer counter (20) shown in FIG. Reference numeral (23) in the drawing is a rectangular parallelepiped resin, for example, a base made of Delrin. At both sides and the center of the surface of the base (23), a wafer guide (24
Many a), (24b) and (24c) are projected. The respective wafer guides (24a) (24b) (24c) are provided in an array corresponding to the accommodation groove (21c) of the wafer cassette (21). That is, each wafer guide (24a) (24b) (24c)
(22) are separated from each other so that they can be put in and taken out smoothly. The depth into which the peripheral portion of the wafer is inserted is selected so that it does not affect the semiconductor chip. Wafer guide (24a) (24b) (24
c) is formed of a material such as Delrin as a dust-proof measure due to contact with the wafer. A large number of electrical insulators (25) are projected between the one wafer guide (24a) and the central wafer guide (24b). The arrangement of the electrical insulators (25) is set to an interval that allows a plurality of wafers (22) to be freely taken in and out, corresponding to the arrangement of the wafer guides (24a) (24b) (24c). In this way, the wafer guides (24a) (24b) (24
The c) and the electrical insulator (25) pick up the wafer (22) contained in the cassette (21) by raising the counter (20), and lower it so as to be contained in the cassette (21). 23) Three rows of comb teeth are projected on the top. These wafer guides (24a) (24b) (24c) and electrical insulator (25)
The distance between the two is set to 4.7625 mm, for example. The shape of the wafer guides (24a), (24c) on both sides is preferably a quadrangular prism shape, and the tips thereof are preferably knife-edge shaped. Further, the tip end of the wafer guide (24b) at the center has a trapezoidal shape.
These shapes facilitate the loading and unloading of the wafer (22). A pair of detection elements (26) is attached to the electrical insulator (25) so as to block the optical path when a semiconductor wafer is inserted. The detection element pair (26) is electrically connected to the signal processing section (27b) via the signal amplification section (27a).

As shown in FIG. 4, the detection element pair (26) is composed of a light emitting element (26a) and a light receiving element (26b) which are transmissive sensors and are arranged to face each other.

As shown in FIG. 4, the detection element pair (26) is composed of a photocoupler of a light emitting element (26a) and a light receiving element (26b) which are opposed to each other across a space (a). Therefore, the presence or absence of the wafer (22) in this space (a) can be optically detected by the detection element pair (26). That is, when there is no wafer (22), the light receiving element (26b) receives the light from the light emitting element (26a),
When there is a wafer (22), the output of the light receiving element (26b) becomes zero. Similarly, the presence of the wafer (22) can be detected after the space (b). At this time, the arrangement of the elements in the row of the sensing element pair (26) is
When the linear sensor (7) rows are formed in one row, the space between the light emitting element (26a) and the light receiving element (26b) that matches the storage interval of the wafers (22) stored in the wafer cassette (21). Since it is difficult to form in space, the sensor rows of the sensing element pair (26) are arranged in two rows on the electric insulator (25) as the first sensor row and the second sensor row, and the adjacent space is provided. Light-emitting element in (2
The positions of 6a) and the light receiving element (26b) are shifted. This makes it possible to save space and form a space that matches the size of the wafer cassette (21).

Next, the wafer by the wafer counter (20) of the mechanism described above
The position detection method and the number detection method of (22) will be described.

Wafer guide (24a) (24c) row and sensing element pair (26) described above
The wafer counter (20) provided with rows is pushed up by the elevating mechanism (28) as shown in FIG. As a result, the wafer counter (20) is inserted into the wafer cassette (21) containing a plurality of wafers (22). At this time, as a method of inserting the wafer counter (20) into the wafer cassette (21), the wafer cassette (21) may be lowered. Alternatively, the wafer cassette (21) may be set up so that the wafer (22) is horizontal, and the wafer counter (20) may be inserted into the wafer cassette (21).

The wafer counter (20) inserted in the wafer cassette (21) has a wafer guide (24a) (24b) as shown in FIG.
As a result, the wafer (22) is inserted into the space between the adjacent sensing element pairs (26) arranged in a comb shape. Then, infrared rays are emitted from the light emitting element (26a) to detect the presence or absence of the wafer (22). At this time, the position and number of the wafers (22) are finally detected by the signal processing unit (27b), and are reported to the next process apparatus or displayed on a monitor or the like.

In the above embodiment, the wafer counter has been described only by detecting the position and the number of wafers, but the wafers may be simultaneously conveyed.

As described above, according to this embodiment, by providing the wafer guide (24b) between the wafer guide (24a) (24c) rows provided at both ends, the wafer (22) can be accurately guided without being displaced. It becomes possible to store.

Further, since the wafers stored in the wafer cassette can be collectively detected, the position and the number of wafers can be detected in a short time.

Further, since the number of sensors that are equal to or greater than the number of wafer cassettes accommodated is provided, a special detection mechanism is not required, and detection can be performed at a cost that is less than half that of the conventional apparatus.

Next, the above-mentioned application example of the wafer counter can be effectively utilized in each step of the semiconductor device. Further, it is necessary to transfer the wafer to a heat-resistant boat when performing heat treatment in a heating furnace such as a CVD furnace, a diffusion furnace, or an oxidation furnace.

In this transfer process, if the wafer in the cassette is emptied midway, the wafer at that position will also be emptied in the boat when transferred to the boat. In the empty state, the wafers are not aligned in that portion.

This non-uniformity of the wafers results in disturbing the flow of the reaction gas during the reaction in the furnace.

The turbulent flow of gas causes non-uniformity of processing and directly affects the yield.

The counter of the present invention is applied to avoid these problems.

This example is shown in FIG.

That is, for example, a wafer stocker (61) for stocking a wafer cassette accommodating, for example, 25 wafers is provided to temporarily stock the wafers for which the previous process has been completed.

As shown in FIG. 8, this stocker (61) has four wafer cassettes (71) arranged in the horizontal direction, and five cassette loading shelves (72) arranged in the vertical direction in five stages on the inner side. The cassette row is rotated while the cassettes are maintained in a horizontal state, that is, the shelf plates (72) of each stage are maintained in a horizontal state, and a desired cassette is transferred to the take-out position. It goes without saying that the storage mechanism of such a cassette may be arranged in a plane.

The cassette thus taken out is conveyed, for example, conveyed by a belt to a position where the orientation flat portion is aligned, that is, an orientation flat aligning portion (62).

In this orientation flat aligning portion (62), as shown in FIG. 9, the roller (83) is rotated with the 25 wafers (82) arranged in the cassette (81) placed on the roller (83) from below. Then, as shown in the figure, the wafer (8
The rotation of 2) stops. Therefore, the roller (83) is also stopped.
In the alignment by the roller (83), the orientation flat portion is not aligned flush with the 25 wafers (82), although it is slight. This slight misalignment is brought into contact with the surface flat plate (85) from below to align them in a completely flush manner. The aligning means does not require the flat plate (85) when the two rollers (83) are arranged in parallel and the orientation flat surface is aligned with the plane formed by the top lines of the two rollers. After this alignment, the cassette is carried to the above-mentioned wafer counter (63). As described in the above embodiment, this counter (63) fits each wafer into the groove of the counter (63), detects the empty position of the number of wafers, etc., and transfers to the processing boat (64). Transfer to.

At this transfer section (64), one cassette (9
The wafer array (92) accommodating 25 wafers in 1) is transferred to the wafer gripper (94) by robot operation in which a circular groove is provided with a groove into which the peripheral edges of the 25 wafers are fitted. For this transfer, a wafer support (not shown) is lifted from below the cassette (91), so that 25 wafer rows (92) are fitted in the respective grooves by the weight of each wafer.

In this state, the wafer row stored in the wafer support is further pushed up above the cassette (91), and 25 wafers are simultaneously grasped from the side of the wafer row by robot operation.
Hold by (94). In this sandwiched state, the boat is transported along the transport path (95) into the storage groove of the heat-resistant quartz boat (93).

By performing this operation for, for example, four cassettes (91), 100 wafers (92) are transferred to the quartz boat.
Transfer to (93). The quartz boat in which the wafers are thus stored is carried into the processing chamber, for example, the reaction tube of the diffusion furnace.

In the above example, when it is desired to change the arrangement of the wafers for convenience of processing, the wafer may be inserted into a plasma CVD furnace.

In this case, the cassette is rotated 180 degrees by the turntable (66) for each cassette taken out from the cassette stocker (61), and the rotated wafer and the wafer from the cassette not rotated are taken out alternately one by one. Just arrange them.

Further, the wafer storage groove pitch of the processing boat and the wafer storage groove pitch of the cassette may be different. This case can be performed by checking the wafer arrangement with a counter and then executing the pitch conversion step (67).

The present invention is not limited to the above embodiment.

Here, the sensing element pair is composed of a transmissive element. The reason is to prevent irregular reflection of light projection on the wafer surface, which occurs in the case of a reflection type element, and improve detection accuracy.

It is desirable that the detection element pair be composed of a light emitting element and a light receiving element, which are photocouplers, for example. In particular, it is desirable to use, for example, a thin solar cell type light receiving element, and to occupy a small space to increase the wafer storage capacity of the wafer cassette.

The sensing element pair is preferably attached to an electrical insulator made of, for example, glass epoxy resin or the like. The reason is that the influence of electrical noise on the sensing element pair is reduced and the detection accuracy is improved.

It is desirable to provide the detection element pair in the wafer cassette such that the optical axis appearing between the light projecting element and the light receiving element is located closer to the center of the wafer than the orientation flat surface of the wafer housed in the wafer cassette. . The reason is to increase the degree of freedom in the direction of the wafers stored in the wafer cassette.

Further, the detection element pair is provided in the wafer cassette such that the optical axis appearing between the light projecting element and the light receiving element is substantially orthogonal to the surface of the wafer housed in the wafer cassette. desirable. The reason is to prevent the light projection from being irregularly reflected on the surface of the wafer.

Further, the detection element pair may be provided in the wafer cassette so as to be attachable to and detachable from each wafer storage area. The reason is that the wafer can be easily carried into or out of each processing step at the same time as the wafer position and the number of wafers are detected by the wafer counter.

It is desirable that the wafer cassette be provided with a wafer guide for each storage area of each wafer to facilitate the wafer storage operation. It is desirable that the wafer guide and the wafer cassette are made of, for example, a resin such as a fluororesin Delrin (trade name) from the viewpoint of measures against dust.

As described above, according to the present invention, in the wafer counter for detecting the position and the number of wafers stored in the wafer cassette with a plurality of wafers separated by a predetermined interval, each wafer is stored in the wafer cassette. A first sensor for detecting every other wafer by arranging transmissive sensors composed of a light emitting element and a light receiving element, which are arranged so as to face each other so as to sandwich every other wafer, linearly in the longitudinal direction of the wafer cassette. The row and the first sensor row to detect every other wafer other than the wafer to be detected by the first sensor row.
Second sensor row in which transmissive sensors having the same configuration as that of the sensor row are linearly arranged, and the light emitting element and the light receiving element of each transmissive sensor forming each of these sensor rows are respectively arranged from the orientation flat of each wafer. Since the bases for supporting the respective sensor rows in parallel with each other are provided so as to be located closer to the center of the wafer, space saving can be achieved, and moreover, the positions and the number of the plurality of semiconductor wafers can be adjusted to those of the semiconductor wafer. It is possible to provide a wafer counter that can detect all wafers accurately and instantaneously at once without being influenced by the orientation of the orientation flat.

[Brief description of drawings]

FIG. 1 is an explanatory view showing a method of detecting the position and the number of wafers by a conventional wafer counter, and FIG. 2 is a perspective view of a wafer cassette accommodating a wafer counter of one embodiment of the present invention, and FIG. 2 is an enlarged perspective view of the wafer cassette shown in FIG. 2, FIG. 4 is an explanatory view showing an arrangement state of the detection element pair shown in FIG. 2, and FIG. 5 shows a state where the wafer counter shown in FIG. FIG. 6 is an explanatory view showing a method for detecting the position and number of wafers by the wafer counter shown in FIG. 2, and FIGS. 7, 8, 9 and 10 are wafer counters shown in FIG. It is a figure for explaining other examples using the.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Atsushi Nagata 1-226-2 Nishishinjuku, Shinjuku-ku, Tokyo Within Tokyo Electron Ltd. (72) Kozo Hara 1-226-2 Nishishinjuku, Shinjuku-ku, Tokyo No. Tokyo Electron Co., Ltd. (72) Inventor, Yasuji Abe, 1-2-6-2, Nishishinjuku, Shinjuku-ku, Tokyo Tokyo Electron Co., Ltd. (56) Reference JP-A-63-13344 (JP, A) -153345 (JP, U) Actually opened 60-170869 (JP, U)

Claims (1)

[Claims] 1. A wafer counter for detecting the position and the number of wafers stored in a wafer cassette, wherein a plurality of wafers are separated from each other by a predetermined interval, and every other wafer is stored in the wafer cassette. A first sensor array for detecting every other wafer by arranging transmissive sensors composed of a light emitting element and a light receiving element, which are opposed to each other so as to sandwich them, linearly in the longitudinal direction of the wafer cassette; and Second sensor array in which transmissive sensors having the same configuration as the first sensor array are linearly arranged so as to detect every other wafer other than the wafer detected by the sensor array, and each of these sensor arrays. Each of the sensor rows is arranged so that the light emitting element and the light receiving element of each transmissive sensor constituting the above are located closer to the center of the wafer than the orientation flat of each wafer. Wafer counter, characterized in that a base for supporting parallel with each other.