JPH0618269B2 - Shutter-barrier barrier semiconductor device - Google Patents

Description

The present invention relates to a shutter barrier semiconductor device having a plurality of high breakdown voltage Schottky barrier semiconductor elements formed in one semiconductor chip.

[Prior Art] Shoutoki barrier diodes are widely used in high-frequency circuits and the like, taking advantage of their good high-speed response and low loss. The output rectifying and smoothing circuit of the FCC (Forward Coupled Converter) type high-frequency switching regulator, which is one of the main applications of power shodoki barrier diodes, has two diodes as shown in FIG.
It consists of D ₁ and D ₂ , an inductance element L ₁ and a capacitor. Since the cathodes of the _two diodes D ₁ and D ₂ are commonly connected, a center tap type Schottky barrier diode device including _two diodes D ₁ and D ₂ in one chip can be provided as shown in FIG. it can.

The semiconductor chip 1 shown in FIG. 5 includes an n ^{+ type} region 2, an n type region 3, an insulating film 4, metal electrodes 5 and 6 that form two shutter barriers, that is, a barrier metal electrode, and a common ohmic electrode 7. , Has the shutter barriers 8 and 9 that serve as the main forward current paths, and further has field plates 5a and 6a for higher withstand voltage, and guard rings 10 and 11 made of an annular p ^{+ -type} region. The field plate 5
Reference numerals a and 6a are portions where the barrier metal electrodes 5 and 6 are extended on the insulating film 4, and the guard rings 10 and 11 are arranged so as to surround the shutter barriers 8 and 9 in an annular shape.

Barrier metal electrodes 5 and 6 in the semiconductor chip 1 of FIG.
Is an anode and the ohmic electrode 7 is a common cathode. Therefore, the semiconductor chip 1 is connected to the diode D _{1 of} FIG.
Can be used as D ₂ . Of course, the diodes D ₁ and D ₂ can be individual elements. However, in order to reduce the size and cost, it is advantageous to form the composite element.

In order to further increase the breakdown voltage, as shown in FIG. 6, a structure may be adopted in which guard rings 10 and 11 and field limiting rings 12 to 15 are combined. Field limiting ring 12, 1 of one diode
3 is an annular p ^{+ type} region formed so as to double-enclose the guard ring 10, and the field limiting rings 14 and 15 of the other diode are also formed so as to double-enclose the guard ring 11. It is a circular p ^{+ type} region.
If the required breakdown voltage is low, the field limiting ring may be a single layer, or conversely, if the required breakdown voltage is high, the field limiting rings may be triple or more.

[Problems to be Solved by the Invention]

By the way, the breakdown voltage of the shutter barrier diode (the breakdown voltage around the shutter barrier) is significantly smaller than the bulk breakdown voltage (the breakdown voltage at the center of the shutter barrier). . In the conventional example shown in FIG. 5, the field plates 5a and 6a and the guard ring 1 having a typical high breakdown voltage structure are used.
Although a structure in which 0 and 11 are combined is adopted, it is the fact that only a significantly lower breakdown voltage can be obtained as compared with the bulk breakdown voltage, and further higher breakdown voltage is desired.

On the other hand, according to the structure shown in FIG. 6, although there is a design difficulty, a relatively high breakdown voltage can be obtained if the optimum design is made. However, the field limiting ring 1
Since it is unavoidable that the formation regions of 2 to 15 become considerably large, when the areas of the shutter barriers 8 and 9 are the same as those in FIG. 5, the area of the semiconductor chip 1 in FIG.
It will be much larger than the figure. As the chip area increases,
The number of chips that can be obtained from one semiconductor wafer is reduced, and the manufacturing yield is reduced due to the increase in the probability that defects are contained in the chips, and the cost of the semiconductor chips 1 is significantly increased.

In order to solve the above problems, it is necessary to form a resistance layer having a taper and a Schottky barrier effect around the Schottky barrier electrode.
No. 63 publication. According to this method, it is possible to increase the breakdown voltage.

However, in this structure, since the Schottky barrier electrode and the resistance layer are made of completely different materials, good electrical connection cannot be achieved easily.

Therefore, it is an object of the present invention to provide a Schottky barrier semiconductor device capable of favorably and easily achieving electrical connection between a resistance layer and a Schottky barrier electrode for improving withstand voltage characteristics.

[Means for Solving the Problems] In order to achieve the above object, the present invention is directed to a semiconductor region formed on the semiconductor region so that a Schottky barrier can be generated between the semiconductor region and the semiconductor region. A second barrier metal electrode formed on the semiconductor region and juxtaposed with the first barrier metal electrode so that a Schottky barrier can be generated between the first barrier metal electrode and the semiconductor region. And surrounding the first and second barrier metal electrodes, respectively, and
Is disposed on the semiconductor region so that a common part between the barrier metal electrodes is also used for increasing the withstand voltage of the first and second Schottky barriers based on the first and second barrier metal electrodes, and To electrically connect to the first and second barrier metal electrodes, to have a sheet resistance larger than that of the first and second barrier metal electrodes, and to generate a Schottky barrier with the semiconductor region. A thin layer formed so that the first and second barrier metal electrodes are formed on the semiconductor region and on the first metal layer. A second metal layer, wherein the thin layer is an oxide layer of the same metal as the first metal layer and is electrically connected to the first metal layer. For Schottky barrier semiconductor devices It is.

[Operation and Effect of the Invention] Since the thin layer according to the present invention is a layer capable of forming a Schottky barrier, a depletion layer can be formed around the barrier metal electrode based on the thin layer to achieve a high breakdown voltage.

In addition, the barrier metal electrode has first and second metal layers,
Since the thin layer is an oxide layer of the same metal as the first metal layer, good and easy electrical connection between the first metal layer and the thin layer can be achieved.

Further, since the first and second barrier metal electrodes have a structure in which a thin layer for increasing the breakdown voltage is provided without providing an insulating isolation region between them, the breakdown voltage is high. No
An increase in semiconductor chip area can be suppressed.

[Embodiment 1] A high withstand voltage Schottky barrier diode device for electric power which has two high withstand voltage Schottky barrier diodes D ₁ and D ₂ in one chip with a common cathode and separated anodes will be described along with its manufacturing process. .

First, as shown in FIG. 1 (A), GaAs (gallium arsenide)
A semiconductor substrate 21 made of is prepared. This semiconductor substrate 2
1 has a thickness of about 300 μm and an impurity concentration of 0.5 to 2 × 10.
An n-type region 23 having a thickness of 10 to 20 μm and an impurity concentration of 1 to 2 × 10 ¹⁵ cm ⁻³ is epitaxially grown on the ¹⁸ cm ⁻³ n ^{+ type} region 22. In addition, for convenience of illustration, the first
Although the figure shows a semiconductor substrate 21 having an area corresponding to one center-tatch type shutter barrier diode device, in reality, a large-area semiconductor capable of obtaining a large number of center-tap type shutter barrier diode devices. You are using a wafer.

Next, as shown in FIG. 1 (B), a thin layer 24 of Ti (titanium), that is, a Ti thin film, is formed by vacuum evaporation on the entire upper surface of the n-type region 23 made of n-type GaAs, and Al is further formed on the entire upper surface. The (aluminum) layer 25 is continuously vacuum-deposited. The Ti thin layer 24 has an extremely thin thickness of 50Å to 200Å (0.005 to 0.02 μm). The thickness of the Al layer 25 is about 2 μm, and the Ti thin layer 24
Is more than 100 times. Further, Au is formed on the lower surface of the n ^{+ type} region 22.
It is formed by vacuum deposition of the electrode 26 in ohmic contact made of an alloy of (gold) -Ge (germanium), and then 380
Heat treatment is performed at 10 ° C. for 10 seconds.

Next, as shown in FIG. 1 (C), a part of the Al layer 25 is removed by photoetching to remove the diode D ₁ ,
The Al layers 25a and 25b are left so as to correspond to the regions where the Schottky barriers that will be the main forward current paths of D ₂ are to be formed. Furthermore, from the peripheral area of the element by photo etching
The Ti thin layer 24 is removed, and it is under the Al layers 25a and 25b.
The Ti thin layers 24a and 24b and the Ti thin layer 24c surrounding and surrounding them are left. The Ti thin layer 24c has a sheet resistance of 20 to 40 because Ti itself is an extremely thin film even if it is a conductor.
It is a resistance layer of 0Ω / □, and has a resistance that is orders of magnitude higher than that of the Al layers 25a and 25b.

Next, heat treatment is performed in air at 300 ° C. for 5 to 30 minutes. As a result, as shown in FIG. 1 (D), the Al layer 25
The Ti thin layer 24c not covered with a and 25b is oxidized to form a titanium oxide thin layer 28. Al layers 25a, 25
The Ti thin layers 24a and 24b under the b are Al layers 25a and 25
Since it is masked by b, it is not oxidized. Since both Al and Ti are metals that form a shock barrier between GaAs and GaAs, these metals are combined to form barrier metal electrodes 27a and 27b.
I will call it. Since the Ti thin layers 24a and 24b are extremely thin films, the Ti thin layers 24a and 24b and the Al layers 25a and 25 are formed.
It is not always clear how b is involved in the formation of the Japanese fire clover. The Ti thin layers 24a, 2 have a role other than the formation of the shutter barrier.
4b contributes to the improvement of the adhesion of the Al layers 25a and 25b to the n-type region 23, and further, the barrier metal electrodes 27a and 27b.
A titanium oxide thin layer 28 and an Al layer 25a that surround the
It contributes to the electrical connection with 25b. Barrier metal electrode 27
The sheet resistance of a and 27b is preferably 1 Ω / □ or less, and is about 0.05 Ω / □ in this embodiment. First
As shown in FIG. (D), the titanium oxide thin layer 28 according to the present invention, which is provided so as to surround the Al layers 25a and 25b, comprises:
Increased from the thickness of the Ti thin layer 24b to an approximate value of 75Å ~ 300
Å, which is a semi-insulating high resistance layer having a seed resistance of 50 MΩ to 500 MΩ / □. That is, the titanium oxide thin layer 28 is made of TiO ₂ (titanium dioxide) which can be regarded as a perfect insulator.
However, it is considered that the so-called oxygen-poor titanium oxide TiO _x (where x is a numerical value smaller than 2) has less oxygen than TiO ₂ . Most of the forward current flows through the shutter barriers 29 and 30 based on the barrier metal electrodes 27a and 27b.

Next, as shown in FIG. 1 (E), the titanium oxide thin layer 28
Is covered with an insulating layer 31 to complete a power shutter barrier diode chip having _two shutter barrier diodes D ₁ and D ₂ . The insulating layer 31 is made of a silicon oxide film formed by a plasma CVD (chemical vapor deposition) method. The insulating layer 31 can be replaced with a silicon nitride film formed by plasma CVD or photo CVD, a polyimide resin film formed by coating, or the like, but a silicon oxide film formed by plasma CVD or photo CVD is preferable. It was. Although not shown, for example, a Ti layer and an Au layer are formed on the upper surfaces of the Al layers 25a and 25b.
It is usual that layers are sequentially provided, and this is used as a connecting electrode for the lead member.

As described above, since a semiconductor wafer including a large number of center-tap type shutter barrier diode devices is actually used, the semiconductor wafer is cut by a dicing machine after the insulating layer 31 is formed and the semiconductor wafer shown in FIG. A semiconductor chip 21a for providing one center-tap type shutter barrier diode device shown in E) is obtained.

FIG. 2 is a plan view of the semiconductor chip 21a obtained by removing the insulating layer 31 from FIG. 1 (E), that is, one center-tap type Schottky barrier diode device in the state of FIG. 1 (D). The dimensions of each part are illustrated below with reference to FIG. The vertical and horizontal widths of the semiconductor chip 21a having a quadrangular planar shape are 2.2 mm, and the barrier metal electrodes 27a, 2
7b has a width a of 680 μm and a vertical width b of 1540 μm.
m, the width c of the titanium oxide thin layer 28 other than the opposing regions of the two barrier metal electrodes 27a and 27b is 180 μm, the distance d between the titanium oxide thin layer 28 and the side surface of the semiconductor chip 21a is 150 μm, and the two barrier metal electrodes The mutual distance w between 27a and 27b, that is, the barrier metal electrode 2 of the titanium oxide thin layer 28.
The width of the common part between 7a and 27b is the width c of the other part.
The same is 180 μm.

In this power shutter diode device, the thin titanium oxide layer 28 in the portion of the interval w has two diodes.
Also used to increase the breakdown voltage of D ₁ and D ₂ . Therefore, the lateral width of the semiconductor chip 21a can be reduced at least by the width w as compared with that in FIG. This will be described in detail. In FIG. 6, the field Mitting rings 12 to 15 are shown.
Since the width c'needed to form the film is about the same as the width c of the titanium oxide thin layer 28 in FIG. 2, c '= c = 180 μm.
m, and the field limiting ring 1 shown in FIG.
If the distance d'between 3, 15 and the side surface of the semiconductor chip 1 is 150 μm, which is the same as the distance d in FIG. 2, and the mutual distance e between the field limiting rings 13, 15 is 100 μm, two barrier metal electrodes are formed. The mutual distance w'of the portions 5 and 6 which are the main forward current paths is c '+ e + c' = 460μ.
m. Therefore, by using the structure shown in FIG. 2, the structure shown in FIG.
The width is reduced by m, and the chip area is 280 μm × 22.
It can be reduced by 00 μm≈0.62 mm ² (about 13%).

On the other hand, the breakdown voltage has been remarkably improved. That is, the withstand voltage of about 60 V was obtained when the measure for increasing the withstand voltage was not taken, but the withstand voltage of 180 V or more was obtained in the example. This is much higher than the withstand voltage of the conventional example shown in FIG. 5, and is at the same level as the withstand voltage of the conventional example shown in FIG. Some of the Schottky barrier diodes of the examples have a withstand voltage of 250 V which is considered to be substantially equal to the bulk withstand voltage. In the example, the place where the breakdown finally occurs is
It is near the periphery of the barrier metal electrodes 27a and 27b.

Further, when the shutter barrier diode of the embodiment was used for the output rectifying / smoothing circuit of the FCC type switching regulator having a switching frequency of 500 kHz, it was confirmed that a good rectifying operation with extremely little noise was generated. Fifth
In the conventional example shown in FIG. 6 and FIG. 6, since the guard rings 10 and 11 are provided, it is possible to prevent the guard ring 1 from moving during forward operation.
Injection of minority carriers from 0, 11 occurs, reducing fast response. However, in the embodiment, since the guard ring is not provided, the above problem does not occur and good high speed response is obtained. Further, the field plate structure as in the conventional example of FIG. 5 has field plates 5a and 6a.
Has a field effect through the insulating film 4,
The influence of the film quality of the insulating film 4 directly affects the withstand voltage characteristic, and generally the withstand voltage characteristic becomes thermally unstable. However, in the example, since there is no equivalent to the insulating film 4, such thermal instability was not found.

Further, the guard ring structure and the field limiting ring structure add a relatively complicated manufacturing process of impurity diffusion to the manufacturing process of the shutter barrier diode. In that respect, since high withstand voltage can be obtained without the aid of the guard ring in the embodiment, as shown in FIG.
The manufacturing process is simpler than that of the conventional example shown in FIG.

In this Schottky barrier diode, not only the Schottky barriers 29 and 30 which are the main forward current paths are formed between the barrier metal electrodes 27a and 27b and the n-type region 23, but also the titanium oxide thin layer 28 and the n-type region 23 are formed. A supplementary shutter barrier 32 is formed between and. Between the titanium oxide thin layer 28 and the n-type region 23, the shutter barrier 3 is provided.
The occurrence of 2 was confirmed by the rectification characteristics, easy characteristics, saturation current characteristics, etc. of the shutter barrier diode. For example, when the area of the titanium oxide thin layer is increased from zero, the saturation current I _S increases substantially in proportion to the sum of the area of the titanium oxide thin layer and the area of the barrier metal electrode. It has been confirmed that this proportional relationship can be obtained at various temperatures of the shutter barrier diode. The fact that the saturation current I _S changes approximately proportionally to the area of the sum of the titanium oxide thin layer and the barrier metal electrode means that the reverse current flows in the titanium oxide thin layer at the same current density as the barrier metal electrode. Means flowing.
This phenomenon directly shows that the thin titanium oxide layer forms a Schottky barrier having a barrier height φ _B substantially the same as the barrier metal layer.

The high breakdown voltage of the shutter barrier diode of the embodiment is considered to be due to the following two reasons.

(1) The titanium oxide thin layer 28 functions as a so-called high resistance field plate, and exhibits a high withstand voltage effect exceeding that of the conductor field plate. That is, assuming that a reverse voltage is applied to the diode D ₁ and a forward voltage is applied to the diode D ₂ , a minute reverse current flowing through the titanium oxide thin layer 28 causes a lateral potential gradient in the titanium oxide thin layer 28. , A reverse voltage applied between the titanium oxide thin layer 28 and the n ^{+ -type} region 22 is applied from the barrier metal electrode 27a side to the titanium oxide thin layer 28.
It becomes smaller as it goes toward the outer peripheral edge. As a result, due to the electric field effect of the titanium oxide thin layer 28, the expansion (vertical thickness) of the depletion layer formed on the surface side of the n-type region 23 is also
It becomes smaller toward the outer peripheral edge of the titanium oxide thin layer 28. As a result, the electric field concentration is effectively alleviated, and the breakdown voltage around the shutter barrier 29 is improved.

(2) The connection from the barrier metal electrodes 27a and 27b to the titanium oxide thin layer 28 which functions as a file plate is n
On the surface of the shaped region 23, the shutter barriers 29, 30
It is a reasonable connection from the Totoki Barrier 32 to. Therefore, an environment in which breakdown easily occurs (occurrence of electric field concentration points or generation of points where the critical electric field strength Ecrit is lowered) is unlikely to occur at the connection points.

Next, the reason why the gap w between the shutter barriers 29 and 30 can be reduced will be described. In the embodiment, the titanium oxide thin layer 28 at the interval w is shared for the purpose of increasing the breakdown voltage of the _two diodes D ₁ and D ₂ . This is a method of use that cannot be achieved by the conventional examples shown in FIGS. Diode D ₁ ,
When a reverse voltage is applied to one of D ₂ and a forward voltage is applied to the other, a voltage substantially equal to the reverse voltage is applied between the barrier metal electrodes 27a and 27b.
An electric current flows between b and the thin titanium oxide layer 28 at the interval w. However, since the titanium oxide thin layer 28 is a semi-insulating high resistance layer, a current limitation is caused by this resistance component, and this current can be sufficiently allowed as the leakage current of the diode to which the reverse voltage is applied. It stays at the level and does not cause the breakdown voltage to drop. Note that the diode
Even if a reverse voltage is applied to both D ₁ and D ₂ , the titanium oxide thin layer 28 at the interval w still functions as a combined field plate.

Second Embodiment Next, a shutter barrier diode device according to a second embodiment of the present invention will be described with reference to FIG. However, in FIG. 3, portions having the same functions as those in FIGS. 1 and 2 are designated by the same reference numerals as those in FIGS. 1 and 2 and their description is omitted.

In FIG. 3, the shutter barrier diode device corresponding to FIG. 1 (E) is laterally expanded and only a part thereof is shown. One of the differences from the first embodiment is that the titanium oxide thin layer 28 is not directly connected to the Al layers 25a and 25b,
The Ti thin layer 24d and the Ti thin layer 24 that surround and surround the Ti thin layer 24a
Al layer 2 through Ti thin layers 24e that respectively surround b
5a, 25b. The Ti thin layers 24d and 24e are formed by the photo-etching after the oxidation process for obtaining the titanium oxide thin layer 28 by the Al layer 25.
It is obtained by removing a part of a and 25b. Since the Ti thin layers 24d and 24e are continuous with the Ti thin layers 24a and 24b and form the shutter barrier 33 between the Ti thin layers 24a and 24b, the Ti thin layers 24d and 24e are also included in the barrier metal electrodes 27a and 27b for convenience. . However, the Ti thin layers 24d and 24e are
Since the resistance is higher than that of the Al layers 25a and 25b, the shutter barrier that serves as the main forward current path is the Al layer 25a,
Only the shutter barriers 29, 30 at the bottom of 25b.

When the Ti thin layers 24d and 24e are provided, the breakdown voltage becomes higher. That is, since the Al layers 25a and 25b and the n-type region 23 are different from each other, stress concentration points 34 due to the provision of the Al layers 25a and 25b occur below the peripheral edges of the Al layers 25a and 25b. The critical electric field strength Ecrit causing the breakdown at the stress concentration point 34 is lower than that in other portions. Therefore, if the electric field is concentrated at this stress concentration point 34, breakdown is more likely to occur. Therefore, in this embodiment, by providing the Ti thin layers 24d and 24e, the inner peripheral edge of the titanium oxide thin layer 28 is separated from the stress concentration point 34. In the case of FIG. 1, Al layers 25a and 25b
The electric field was concentrated below the boundary between the titanium thin layer 28 and the titanium oxide thin layer 28. In FIG.
An electric field concentration point 35 is generated below the boundary between the d and 24e and the titanium oxide thin layer 28 having low conductivity. As the electric field concentration point 35 is separated from the stress concentration point 34 in this manner, breakdown is less likely to occur and breakdown voltage is higher than that of the Schottky barrier diode having the structure shown in FIG.

Another difference from the first embodiment is that the annular p ⁺ regions 36 and 37 serving as guard rings are provided with a shock barrier 29,
It is intended to further increase the withstand voltage by providing it so as to surround 30. The p ^{+ -type} region 36 serving as the guard ring of the diode D ₁ is formed at a position (electric field concentration point 35) from the Ti thin layer 24d to the titanium oxide thin layer 28,
It is separated from the Ti thin layer 24a. The same applies to the p ^{+ -type} region 37 that functions as a guard ring for the diode D ₂ . Therefore, due to the resistance of the Ti thin layers 24d and 24e, the forward current flowing through the p ^{+ -type} regions 36 and 37 at the time of applying the forward voltage can be ignored, and the deterioration of the high-speed response due to the injection of the minority carriers is prevented. .

The standard guard ring structure as in the conventional example may be combined with the first embodiment. In this case, a reduction in high-speed response cannot be avoided, but a high breakdown voltage is achieved.

[Modification]

The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible, for example.

(1) The effective range of the sheet resistance of the titanium oxide thin layer 28 varies depending on the semiconductor chip structure and size.
kΩ / □ to 5000 MΩ / □, preferably 10 MΩ / □
~ 1000 MΩ / □ should be selected.

(2) By setting the widths c and w ₂ of the titanium oxide thin layer 28 to be about 10 μm or more, the effect of improving the withstand voltage appears, and the thickness is 30 μm.
The effect becomes remarkable by making it m or more. However, in order to increase the yield with which a predetermined breakdown voltage is obtained, 1
It is more desirable to design the thickness to be 00 μm or more. Width c, w ₂
Even if is set to 500 μm or more, a sufficient breakdown voltage improving effect can be obtained. Therefore, there is no upper limit of the width b, but even if the widths c and w ₂ are 500 μm or more, it is not possible to expect a proportional increase in breakdown voltage, and there is a problem that the semiconductor chip becomes large. Therefore, it is desirable that the widths c and w _{2 be} in the range of 30 to 500 μm.

(3) The film thickness of the Ti thin layer 24 in FIG. 1 (B) should be 20 Å or more in consideration of film thickness control, oxidation temperature, oxidation time and the like.
The upper limit is not limited as long as the above-mentioned predetermined sheet resistance is obtained, but when the Ti thin film is thermally oxidized to form a titanium oxide thin layer, the oxidation temperature and the oxidation time are taken into consideration in the amount of 300 Å. Should be: The upper limit can be further expanded if strong oxidation such as plasma oxidation is performed.

(4) The oxidation temperature when the Ti thin layer 24c is oxidized to obtain the titanium oxide thin layer 28 is preferably 500 ° C. or lower,
When using an Au-based electrode, the temperature is 380 ° C. or lower. The lower limit of the oxidation temperature is 200 ° C. or higher when the thermal oxidation method is used, but it may be a low temperature of room temperature or lower when the plasma oxidation is used. The oxidization time varies depending on the thickness of the Ti thin layer 24, the oxidization temperature, and the oxidative atmosphere, but it is desirable to be within the range of 5 seconds to 2 hours.

(5) The thin titanium oxide layer 28 corresponding to the thin titanium oxide layer 28 is formed by vapor deposition or sputtering of titanium oxide, and the Ti thin layers 24d, 2
4e may be replaced with a titanium nitride layer having a relatively high conductivity. The titanium nitride layer can be formed by nitriding a thin Ti layer using the Al layer as a mask.

(6) A titanium oxide thin layer is suitable as the thin layer having a high sheet resistance and generating a shock barrier, but a thin oxide layer of a Ta (tantalum) -based material or the like may be used. Further, the Ti thin layer 24 and the titanium oxide thin layer 28 may be those to which In, Sn or the like is added.

(7) It can be applied to a shutter barrier semiconductor device using a III-V group compound such as Inp (indium phosphide) or silicon instead of GaAs.

(8) In the case of forming a Schottky barrier semiconductor device in an integrated circuit, an n ^{+ type} region 22 is provided so as to surround the n type region 23 in an island shape, and an ohmic electrode 26 is provided on the surface side of the n type region 23. It may be structured. It is also applicable to the case where three or more shutter barrier diodes are formed in one chip.

(9) The n-type region 23 and the n ^{+ -type} region 22 can be replaced with the p-type region.

[Brief description of drawings]

1 (A) to 1 (E) are sectional views showing a shutter barrier diode device according to a first embodiment of the present invention in the order of manufacturing steps by a portion corresponding to line II in FIG. 2, and FIG. 1 (E) is a plan view showing the shutter barrier diode device of FIG. 1 (E) with an insulating layer removed, FIG. 3 is a sectional view showing a part of the shutter barrier diode device according to Embodiment 2 of the present invention, FIG. FIG. 6 is a circuit diagram showing an output rectifying / smoothing circuit of a switching regulator in which a center tap type shutter barrier diode device is used. FIG. 5 is a sectional view showing a conventional center tap type shutter barrier diode device. FIG. 1 is a sectional view showing another conventional center tap type shutter barrier diode device. 23 ... N-type region, 27a, 27b ... Barrier metal electrode, 28 ... Titanium oxide thin layer, 29, 30 ... Shutter barrier.

Claims (1)

[Claims] 1. A first region formed on the semiconductor region so that a Schottky barrier can be generated between the semiconductor region and the semiconductor region.
And a second barrier metal electrode formed on the semiconductor region and juxtaposed to the first barrier metal electrode so that a Schottky barrier can be generated between the barrier metal electrode and the semiconductor region. A first and a second barrier metal electrodes surrounding the first and second barrier metal electrodes, respectively, and a common part between the first and second barrier metal electrodes based on the first and second barrier metal electrodes. Of the Schottky barrier so as to also serve to increase the breakdown voltage of the Schottky barrier and electrically connected to the first and second barrier metal electrodes, and
And a thin layer having a sheet resistance larger than that of the second barrier metal electrode and capable of generating a Schottky barrier between the second barrier metal electrode and the semiconductor region. The barrier metal electrode has a first metal layer formed on the semiconductor region and a second metal layer formed on the first metal layer, and the thin layer is the first metal layer. A Schottky barrier semiconductor device, which is an oxide layer of the same metal as the layer and is electrically connected to the first metal layer.