JPH0624201B2 - Method for fixing semiconductor wafer to abutting plate - Google Patents
Method for fixing semiconductor wafer to abutting plateInfo
- Publication number
- JPH0624201B2 JPH0624201B2 JP1169213A JP16921389A JPH0624201B2 JP H0624201 B2 JPH0624201 B2 JP H0624201B2 JP 1169213 A JP1169213 A JP 1169213A JP 16921389 A JP16921389 A JP 16921389A JP H0624201 B2 JPH0624201 B2 JP H0624201B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- adhesive
- contact plate
- fixing
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体ウエハの当板固着方法に関する。The present invention relates to a method for fixing a semiconductor wafer to a contact plate.
さらに詳しくは、トランジスタ,ダイオード等のディス
クリート素子(個別素子)等として利用されるシリコン
(Si)単結晶の円板形等からなる半導体ウエハからディ
スクリート素子用基板を製造する際に、半導体ウエハを
2分割切断工作する工程において半導体ウエハの周縁へ
当板を固着する方法に関する。More specifically, when a discrete element substrate is manufactured from a semiconductor wafer of a silicon (Si) single crystal disk shape or the like used as a discrete element (individual element) such as a transistor or a diode, the semiconductor wafer is divided into two parts. The present invention relates to a method of fixing a contact plate to a peripheral edge of a semiconductor wafer in a step of performing a divided cutting work.
[従来の技術] 従来、本出願人は、シリコン単結晶の消耗低減等を目的
として、中央部に不純物が拡散されていない不純物未拡
散層を有し両面に不純物が拡散された不純物拡散層を有
する半導体ウエハを、厚み巾の略中心部から切断し、各
半導体ウエハの夫々の切断面を新な不純物を拡散するた
めの不純物未拡散層とするディスクリート素子用基板の
製造方法等を先に提案している(特開平1-293613号)。
さらに、前記製造方法等における半導体ウエハの切断工
作について、工作効率の確保、切断端の損傷防止等を目
的として、半導体ウエハの周縁に当板を固着して行なう
技術についても先に提案している(特開平3-1536号)。[Prior Art] Conventionally, for the purpose of reducing consumption of a silicon single crystal, the present applicant has an impurity diffusion layer in which impurities are not diffused in a central portion and an impurity diffusion layer in which impurities are diffused on both sides. Propose a method for manufacturing a substrate for discrete devices, etc., in which the semiconductor wafer that is cut is cut from approximately the center of the thickness width and each cut surface of each semiconductor wafer is used as an impurity undiffused layer for diffusing new impurities. (Japanese Patent Laid-Open No. 1-293613).
Further, regarding the cutting work of the semiconductor wafer in the above-mentioned manufacturing method or the like, a technique for fixing a contact plate to the peripheral edge of the semiconductor wafer for the purpose of securing the working efficiency and preventing damage to the cutting edge has been previously proposed. (Japanese Patent Laid-Open No. 3-1536).
従来、前述の本出願人の先提案において、半導体ウエハ
の周縁に当板を固着する手段としては、例えばウエハキ
ャリアに並列した半導体ウエハの周縁上部に当板を一枚
づつ接着材で固着していくことが行なわれている。Conventionally, in the above-mentioned prior proposal of the applicant, as a means for fixing the contact plate to the peripheral edge of the semiconductor wafer, for example, the contact plates are fixed to the upper edge of the semiconductor wafer in parallel with the wafer carrier with an adhesive. Things are going on.
[発明が解決しようとする課題] 前述の従来の半導体ウエハの周縁に当板を固着する手段
では、第4図に示すように接着剤Cが硬化するまでに半
導体ウエハWに対して当板Pが傾倒してしまい固着強度
不足や寸法精度の誤差が生じたり、第5図に示すように
接着剤Cが半導体ウエハW側に流下してしまい汚損が生
じたりして、固着工作の仕上がりが不良となるという問
題点を有している。[Problems to be Solved by the Invention] In the above-mentioned conventional means for fixing the contact plate to the peripheral edge of the semiconductor wafer, as shown in FIG. 4, the contact plate P is applied to the semiconductor wafer W before the adhesive C is cured. Is tilted, resulting in insufficient fixing strength and error in dimensional accuracy, and as shown in FIG. 5, the adhesive C flows down to the semiconductor wafer W side and is soiled, resulting in a defective fixing work. There is a problem that
本発明はこのような問題点を解決するためになされたも
のであり、その目的は、固着工作の仕上りが良好な半導
体ウエハの当板固着方法を提供することにある。The present invention has been made to solve such a problem, and an object of the present invention is to provide a method for fixing a semiconductor wafer to a contact plate, which has a good finish of the fixing work.
[課題を解決するための手段] 斯る本発明の半導体ウエハの当板固着方法は、厚み巾の
中心部から切断して2分割される半導体ウエハの周縁に
当板を固着する方法であって; 中央部に不純物が拡散されていない不純物未拡散層を有
し両面に不純物が拡散された不純物拡散層を有する半導
体ウエハと、この半導体ウエハよりも径の大きな中間板
とを交互に接合並列して並列方向から加圧した後、接着
剤を塗布した当板を中間板の間から挾入して半導体ウエ
ハの周縁に固着し、または半導体ウエハの周縁に接着剤
を塗布して当板を中間板の間から挾入して固着すること
を特徴とする。[Means for Solving the Problems] The semiconductor wafer contact plate fixing method of the present invention is a method of fixing the contact plate to the peripheral edge of a semiconductor wafer divided into two by cutting from the center of the thickness width. A semiconductor wafer having an impurity non-diffused layer in which impurities are not diffused in the central portion and an impurity diffusion layer in which impurities are diffused on both sides, and an intermediate plate having a diameter larger than that of the semiconductor wafer are alternately joined and arranged in parallel. After applying pressure from the parallel direction, insert the adhesive-coated contact plate from between the intermediate plates and fix it to the peripheral edge of the semiconductor wafer, or apply the adhesive to the peripheral edge of the semiconductor wafer and apply the adhesive plate from between the intermediate plates. It is characterized by being inserted and fixed.
[作用] 前述の手段によると、半導体ウエハよりも径の大きな中
間板が半導体ウエハ,当板の双方を並列規制することか
ら、半導体ウエハ,当板が傾倒等することなく正確な姿
勢で当触し固着されるため、傾倒等による固着強度不足
や寸法精度の誤差が生じることはなくなる。さらに、半
導体ウエハの両面に中間板が圧接していることから、接
着剤が流出しても半導体ウエハ側(両面)に流下るのを
中間板によって阻止され、半導体ウエハを汚損すること
が防止される。このため、固着工作の仕上りが良好な半
導体ウエハの当板固着方法を提供するという目的が達成
される。[Operation] According to the above-mentioned means, the intermediate plate having a diameter larger than that of the semiconductor wafer regulates both the semiconductor wafer and the contact plate in parallel. Since they are fixed to each other, insufficient fixing strength and dimensional accuracy error due to tilting or the like will not occur. Further, since the intermediate plate is pressed against both sides of the semiconductor wafer, even if the adhesive flows out, the intermediate plate prevents the adhesive from flowing down to the semiconductor wafer side (both sides), and the contamination of the semiconductor wafer is prevented. It Therefore, it is possible to achieve an object of providing a method for fixing a semiconductor wafer to a contact plate, which has a good finish of the fixing work.
[実施例] 以下、本発明に係る半導体ウエハの当板固着方法の実施
例を第1図〜第3図に基いて説明する。[Embodiment] An embodiment of a method for fixing a semiconductor wafer to a contact plate according to the present invention will be described below with reference to FIGS. 1 to 3.
この実施例では、第1図,第2図に示すように、まず半
導体ウエハWとこの半導体ウエハWよりも径の大きな中
間板1とを交互に当接し、これ等を逆台形の溝2′を有
する基台2に並列する。この並列の両側端には、中間板
1が位置するようにしておく。なお、この半導体ウエハ
Wは、シリコン単結晶の円板形等からなり、中央部に不
純物が拡散されていない不純物未拡散層を有し両面に不
純物が拡散された不純物拡散層を有するものである。ま
た、この中間板1は、接着剤Cの影響を受けないような
材質(例えば、四ふっ化エチレン樹脂)で形成されてお
り、半導体ウエハWの全面に当接する形状に形成されて
いる。また、この基台2は、適当な材質で形成すること
ができるが、好ましくは中間板1と同様接着剤Cの影響
を受けないような材質で形成する。In this embodiment, as shown in FIGS. 1 and 2, first, a semiconductor wafer W and an intermediate plate 1 having a diameter larger than that of the semiconductor wafer W are alternately brought into contact with each other, and these are inverted trapezoidal grooves 2 '. Are arranged in parallel with the base 2. The intermediate plate 1 is positioned at both ends of this parallel arrangement. The semiconductor wafer W has a disk shape of silicon single crystal or the like, and has an impurity undiffused layer in which impurities are not diffused in the central portion and an impurity diffusion layer in which impurities are diffused on both sides. . The intermediate plate 1 is made of a material that is not affected by the adhesive C (for example, ethylene tetrafluoride resin), and has a shape that abuts the entire surface of the semiconductor wafer W. The base 2 can be made of an appropriate material, but is preferably made of a material that is not affected by the adhesive C like the intermediate plate 1.
次に、並列されている半導体ウエハW,中間板1の両側
端にさらに加圧板3を並列する。この加圧板3は、適当
な材質で形成することができるが、好ましくは中間板1
と同様接着剤Cの影響を受けないような材質で形成す
る。Next, the pressure plates 3 are further arranged in parallel on both side ends of the semiconductor wafer W and the intermediate plate 1 which are arranged in parallel. The pressure plate 3 can be made of an appropriate material, but is preferably the intermediate plate 1.
Like the above, it is formed of a material that is not affected by the adhesive C.
さらに、並列した加圧板3の両側からクランプ等で並列
方向へ加圧力を加える。この加圧は、半導体ウエハW,
中間板1の並列を規制保持し、半導体ウエハWの移動,
傾倒,ズレ等を防止すると共に、半導体ウエハW,中間
板1間の間隙を減少させ両者を近接圧接させるものであ
る。Further, a pressing force is applied in the parallel direction from both sides of the pressure plates 3 arranged in parallel by a clamp or the like. This pressure is applied to the semiconductor wafer W,
The parallel movement of the intermediate plate 1 is maintained and the semiconductor wafer W is moved,
In addition to preventing tilting and displacement, the gap between the semiconductor wafer W and the intermediate plate 1 is reduced to bring them into close contact with each other.
而後、半導体ウエハWの周縁に接着剤Cを厚く塗布し、
中間板1の間に当板Pを挾入して固着する。この接着剤
Cが塗布される半導体ウエハWの周縁は、並列の上部側
が好ましくオリフィラを利用することも可能である。ま
た、予め当板Pに接着剤Cを塗布しておいて、固着する
ことも可能である。なお、この当板Pは、カーボン,シ
リコン等で形成されたものである。この接着剤Cは、前
述した等板P,半導体ウエハWの材質から、エポキシ系
樹脂,ポリエステル系樹脂,ポリウレタン系樹脂,ポリ
イミド系樹脂,ポリアミド系樹脂等の熱効果性樹脂接着
剤の外、ゴム系接着剤も使用することができる。After that, the adhesive C is thickly applied to the periphery of the semiconductor wafer W,
The contact plate P is inserted between the intermediate plates 1 and fixed. As for the peripheral edge of the semiconductor wafer W to which the adhesive C is applied, it is preferable that the upper side in parallel is used, and it is possible to use an orifice. It is also possible to apply the adhesive C to the plate P in advance and fix it. The contact plate P is made of carbon, silicon or the like. The adhesive C may be a heat-resistant resin adhesive such as an epoxy resin, a polyester resin, a polyurethane resin, a polyimide resin, a polyamide resin, or the like, which is made of rubber, depending on the material of the equal plate P and the semiconductor wafer W. System adhesives can also be used.
しかし、この接着剤Cが、半導体ウエハの切断中には強
力な接着力で当板Pを固着している必要がある反面、半
導体ウエハの切断2分割後には特定の酸液によって当板
Pを容易に剥離させ得る必要があることを考慮すると、
とくにエポキシ系樹脂の接着剤を使用することが好まし
い。However, while the adhesive C needs to fix the contact plate P with a strong adhesive force during the cutting of the semiconductor wafer, the contact plate P is fixed by a specific acid solution after the semiconductor wafer is cut into two pieces. Considering that it can be easily peeled off,
It is particularly preferable to use an epoxy resin adhesive.
このような実施例によると、半導体ウエハWよりも径の
大きな中間板1が加圧によって半導体ウエハWを並列規
制すると共に、中間板1の間に挾入される当板Pをも並
列規制することから、半導体ウエハW,当板Pが移動,
傾倒,ズレ等することなく正確な姿勢で当触し固着され
ることになる。このため、固着工作の仕上りにおいて
は、移動,傾倒,ズレ等による固着強度不足や寸法精度
の誤差が生じることはなくなる。また、中間板1が半導
体ウエハWの全面を加圧しているため、半導体ウエハW
は折損するおそれはない。さらに、半導体ウエハWの両
面に中間板1が圧接していることから、接着剤Cが過剰
等の原因等で流出しても、半導体ウエハWの両面側に流
下るのを中間板1によって阻止され(第3図参照)、半
導体ウエハWを汚損することが防止される。According to such an embodiment, the intermediate plate 1 having a diameter larger than that of the semiconductor wafer W regulates the semiconductor wafer W in parallel by pressurization, and also regulates the contact plate P inserted between the intermediate plates 1 in parallel. Therefore, the semiconductor wafer W and the plate P move,
It will be fixed by touching in an accurate posture without tilting or slipping. Therefore, in the finish of the fixing work, insufficient fixing strength and dimensional accuracy error due to movement, tilting, displacement, etc. will not occur. Further, since the intermediate plate 1 presses the entire surface of the semiconductor wafer W, the semiconductor wafer W
Is not likely to break. Further, since the intermediate plate 1 is pressed against both sides of the semiconductor wafer W, even if the adhesive C flows out due to an excess or the like, the intermediate plate 1 prevents the adhesive C from flowing down to both sides of the semiconductor wafer W. As a result (see FIG. 3), the semiconductor wafer W is prevented from being contaminated.
[発明の効果] 本発明によれば、半導体ウエハ,当板が傾倒等すること
なく正確な姿勢で当触し固着されるため、傾倒等による
固着強度不足や寸法精度の誤差が生じることはなくな
り、また半導体ウエハの両面に中間板が圧接しているた
め、接着剤の硬化時間が長い場合で接着剤が流出しても
半導体ウエハに流れ下り半導体ウエハを汚損することが
防止される。このため、固着工作の仕上りが良好で所定
の姿勢が高精度に確保できるとともに、量産が可能で生
産性を高めることができる。従って、本発明により得ら
れた半導体ウエハを使用すれば、本出願人の先提案に係
る半導体ウエハの切断工作において、ウエハ切り終わり
部を中心に発生しやすい割れや欠けなど破損のない精密
がかつ効率的な加工を行うことができる。[Advantages of the Invention] According to the present invention, since the semiconductor wafer and the contact plate are contacted and fixed in an accurate posture without tilting or the like, insufficient fixing strength or dimensional accuracy error due to tilting or the like does not occur. Further, since the intermediate plates are pressed against both sides of the semiconductor wafer, even if the adhesive flows out when the curing time of the adhesive is long, it is possible to prevent the adhesive from flowing down to the semiconductor wafer and contaminating the semiconductor wafer. Therefore, the finish of the fixing work is good, a predetermined posture can be secured with high accuracy, mass production is possible, and productivity can be improved. Therefore, by using the semiconductor wafer obtained by the present invention, in the cutting work of the semiconductor wafer according to the applicant's previous proposal, precision without breakage such as cracks and chips that are likely to occur around the wafer cutting end and Efficient processing can be performed.
さらに、半導体ウエハの中間板を介しての並列,加圧を
利用するため、既存工具,部材を利用して安価,容易に
実施することができる効果がある。Furthermore, since the parallel and pressurization of the semiconductor wafer through the intermediate plate is used, there is an effect that the existing tools and members can be used at low cost and easily.
第1図は本発明に係る半導体ウエハの当板固着方法の実
施例を示す正面図、第2図は第1図の側面図、第3図は
第1図の要部拡大図、第4図,第5図は従来例の問題点
を示す正面図である。 1……中間板 C……接着剤 P……当板 W……半導体ウエハFIG. 1 is a front view showing an embodiment of a semiconductor wafer contact plate fixing method according to the present invention, FIG. 2 is a side view of FIG. 1, and FIG. 3 is an enlarged view of an essential part of FIG. 1 and FIG. , FIG. 5 is a front view showing the problems of the conventional example. 1 ... Intermediate plate C ... Adhesive P ... This plate W ... Semiconductor wafer
Claims (1)
半導体ウエハの周縁に当板を固着する方法であって; 中央部に不純物が拡散されていない不純物未拡散層を有
し両面に不純物が拡散された不純物拡散層を有する半導
体ウエハと、この半導体ウエハよりも径の大きな中間板
とを交互に接合並列して並列方向から加圧した後、接着
剤を塗布した当板を中間板の間から挾入して半導体ウエ
ハの周縁に固着し、または半導体ウエハの周縁に接着剤
を塗布して当板を中間板の間から挾入して固着する半導
体ウエハの当板固着方法。1. A method of fixing a contact plate to a peripheral edge of a semiconductor wafer which is cut from a center portion of a thickness width and is divided into two; a double-sided surface having an impurity undiffused layer in which impurities are not diffused A semiconductor wafer having an impurity diffusion layer in which impurities are diffused and an intermediate plate having a larger diameter than this semiconductor wafer are alternately joined in parallel and pressed from the parallel direction. A method of fixing a semiconductor wafer to a contact plate, wherein the contact plate is inserted between the plates and fixed to the peripheral edge of the semiconductor wafer, or an adhesive is applied to the peripheral edge of the semiconductor wafer and the contact plate is inserted and fixed between the intermediate plates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169213A JPH0624201B2 (en) | 1989-06-30 | 1989-06-30 | Method for fixing semiconductor wafer to abutting plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1169213A JPH0624201B2 (en) | 1989-06-30 | 1989-06-30 | Method for fixing semiconductor wafer to abutting plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0334543A JPH0334543A (en) | 1991-02-14 |
| JPH0624201B2 true JPH0624201B2 (en) | 1994-03-30 |
Family
ID=15882304
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1169213A Expired - Fee Related JPH0624201B2 (en) | 1989-06-30 | 1989-06-30 | Method for fixing semiconductor wafer to abutting plate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0624201B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020053146A (en) * | 2000-12-27 | 2002-07-05 | 구자홍 | Apparatus for Louver link at ceiling cassette type air conditioner |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06105702B2 (en) * | 1987-10-28 | 1994-12-21 | 株式会社東芝 | Method for manufacturing semiconductor substrate |
-
1989
- 1989-06-30 JP JP1169213A patent/JPH0624201B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0334543A (en) | 1991-02-14 |
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|---|---|---|---|
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Free format text: JAPANESE INTERMEDIATE CODE: R250 |
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