JPH0626041B2 - Synchronous operation device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a recording medium reproduced by a master-side reproducing device,
The present invention relates to a synchronous operation device that quickly operates a recording medium reproduced by a slave reproduction device in a synchronous manner.

(Prior Art) A multi-track recorder is a new mixed music source in which different music sources are recorded on multiple channels of a recording medium such as a magnetic tape, and these music sources are simultaneously reproduced and mixed appropriately. Is a device for recording again in another channel of the recording medium.
Therefore, in the case of mixing the music sources having the number of channels or more recorded in one multi-track recorder at one time, the recording media such as the magnetic tapes of the multi-track recorders must be operated synchronously. Then, in order to synchronously operate the plurality of multi-track recorders, absolute time information is recorded on a recording medium such as a magnetic tape.

FIG. 3 shows a block circuit diagram of an example of a conventional synchronous operation device. In FIG. 3, one multi-track recorder is the master-side player 1, and another multi-track recorder is the slave-side player 3. Then, the magnetic tape 2 running on the master side reproducing device 1 is synchronously operated with the magnetic tape 4 running on the slave side reproducing device 3. First, the absolute time information recorded on the magnetic tape 2 of the master reproducing device 1 is picked up by the master reproducing head 5, further converted into the master absolute time by the master absolute time converting means 6, and reproduced by the slave. Machine 3
It is given to the absolute time comparison means 7 provided in. Also,
The absolute time information recorded on the magnetic tape 4 of the slave reproducing device 3 is picked up by the slave reproducing head 8,
Further, the absolute time converting means 9 on the slave side converts the absolute time into the absolute time on the slave side and supplies it to the absolute time comparing means 7. Then, the absolute time comparing means 7 compares the absolute times of the master side and the slave side, and the reference clock generating means 10 provided in the slave side reproducing device 3 has a shorter cycle if the slave side is delayed with respect to the master side. Is controlled so that the clock is output, and if progressing, the clock is controlled to output at a longer cycle. The clock output from the reference clock generating means 10 is given to the servo control means 11 of the slave side reproducing device 3, and further, according to the output of the servo control means 11, the capstan motor 12 is rotated by the motor drive circuit 13 to rotate at a rotational speed. Controlled. And
An FG pulse is output from the FG pulse detecting means 14 according to the rotation speed of the capstan motor 12. This FG pulse is amplified by the FG amplifier 15, and further appropriately divided by the FG pulse divider 16, and the divided pulse is given to the servo control means 11. Then, the servo control means 11 applies the FG to the clock from the reference clock generation means 10 as is known.
The rotation speed of the capstan motor 12 is controlled so that the divided pulses from the pulse divider 16 are synchronized. Therefore, by varying the cycle of the clock output from the reference clock generating means 10 according to the deviation of the absolute time, the running of the magnetic tape 2 on the master side can be decelerated or accelerated while the running of the magnetic tape 4 on the slave side. The rotation speed of the capstan motor 12 is controlled so as to synchronize with each other. The frequency division ratio of the FG pulse frequency divider 16 is set so that the capstan motor 12 rotates at a constant speed with respect to the clock output from the reference clock generating means 10 in a normal cycle.

(Problems to be Solved by the Invention) By the way, in the above-described conventional synchronous operation device, the cycle of the clock output from the reference clock generating means 10 is relative to the clock cycle for rotating the capstan motor 12 at a constant speed. Therefore, it can be varied only within a narrow range of about 10 to 20%. Therefore, there is a problem in that the rotation speed of the capstan motor 12 cannot be changed significantly in an instant, and it takes a long time to achieve synchronization.

The present invention has been made in order to improve the problems of the above-described conventional synchronous operation device, and an object thereof is to provide a synchronous operation device that can quickly perform synchronous operation.

(Means for Solving the Problem) In order to achieve such an object, the synchronous operation device of the present invention uses a plurality of recording media in which the same absolute time information is recorded,
In a synchronous operation device that reproduces while synchronizing with the master side reproduction device and the slave side reproduction device, respectively, the absolute time of the master side reproduced by the master side reproduction device and the slave side reproduced by the slave side reproduction device. Absolute time comparing means for comparing the absolute time and outputting a signal according to the time lag, and the FG pulse output according to the rotation speed of the capstan motor of the slave regenerator are divided to generate a divided pulse. FG pulse frequency dividing means for outputting, frequency division ratio switching control means for temporarily switching the frequency dividing ratio of the FG pulse frequency dividing means according to the time lag, and of the capstan motor based on the frequency dividing pulse. Servo control means for controlling the rotation speed, and the absolute time comparison means compares the absolute time after a time longer than the lock-in time of the servo mechanism. It is configured.

The FG pulse frequency dividing means includes a first FG pulse frequency divider that divides the FG pulse at a first frequency division ratio that causes the capstan motor to rotate at a constant speed, and the first frequency divider. A second FG pulse divider having a second division ratio greater than the ratio,
A third FG having a third division ratio smaller than the first division ratio
The master side and the slave side are composed of a pulse frequency divider and a selection circuit for selecting any one of the frequency division pulses output from the first to third frequency dividers and giving it to the servo control means. The frequency dividing ratio switching means may switch and control the selection circuit according to the absolute time difference.

The frequency division ratio switching control means selects one of the second and third frequency dividers by the selection circuit according to the direction of time lag between the master side and the slave side in absolute time, and The amount of time for switching to the second or third frequency divider may be controlled by the amount.

Further, there is provided a data table memory in which time data for switching the selection circuit in correspondence with the amount of time lag between the absolute time on the master side and the absolute time on the slave side is stored in advance, and the absolute time comparison means is used to detect the time lag. The time data may be read according to the amount, and the frequency division ratio switching means may be configured to control the time during which the selection circuit is switched according to the time data.

(Operation) Since the capstan motor is decelerated or accelerated by changing the frequency division ratio of the FG pulse according to the time difference between the absolute time on the master side and the slave side, the capstan is changed by changing the frequency division ratio drastically. The motor can be significantly decelerated or accelerated in an instant, and the synchronization can be achieved accordingly. Also, after comparing the absolute times, the lock-in time of the servo mechanism is taken into account after switching the frequency division ratio, and a certain period of time is set aside. Therefore, even if there is a response delay in the servo mechanism, the absolute time comparison is performed by the servo mechanism. It is done in a stable state, not in a transient state.

Further, if the FG pulse is divided by the first to third dividers having different division ratios and these are selected by the selection circuit according to the time lag, the structure for switching the division ratio is simple. Along with this, quick switching is possible.

If the time length during which the frequency division ratio is switched according to the amount of time lag is controlled, the length of time for temporarily decelerating or accelerating the capstan motor according to the amount of time lag can be easily adjusted. Controllable.

Further, if the time data for decelerating or accelerating the capstan motor according to the amount of time lag is read from the data table memory in which the time is recorded beforehand, the switching time length can be easily set. Further, by rewriting the time data in the data table memory, the slave side regenerators having different servo mechanisms such as inertia can be synchronously operated by the same device.

(Example) Hereinafter, the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a block circuit diagram of an embodiment of the synchronous driving device of the present invention, and FIG. 2 is a flow chart for explaining the operation of FIG. In FIG. 1, the same circuit blocks as those in FIG. 3 are designated by the same reference numerals, and duplicate description will be omitted.

First, the structure of the slave side reproducing device 20 will be described with reference to FIG. The FG pulse output from the FG amplifier 15 has a first FG pulse frequency divider 21 having a first frequency division ratio for rotating the capstan motor at a constant speed and, for example, twice the first frequency division ratio. Second FG pulse divider having a division ratio of
And a third FG pulse frequency divider 23 having a frequency division ratio that is, for example, 1/2 times the first frequency division ratio. And the first
The frequency-divided pulses output from the third to third FG pulse frequency dividers 21, 22 and 23 are applied to the selection circuit 24, respectively. The selection circuit 24 is controlled by the division ratio switching control means 25,
Normally, the divided pulse of the first FG pulse divider 21 is given to the servo control means 11 to rotate the capstan motor 12 at a constant speed. When the absolute time on the slave side is delayed with respect to the absolute time on the master side, the selection circuit 24 temporarily selects the coarse frequency division pulse from the second FG pulse frequency divider 22 to perform servo control. Giving to control means 11, capstan motor
Accelerate 12 When the slave side is advancing, the selection circuit 24 temporarily selects the dense frequency-divided pulse from the third FG pulse frequency divider 23 and supplies it to the servo control means 11 to drive the capstan motor 12 to operate. Slow down. The cycle of the clock output from the reference clock generating means 10 is constant. Then, the first to third FG pulse frequency dividers 21,2
2, 23 and the selection circuit 24 constitute FG pulse frequency dividing means.

In addition, the slave side reproducing device 20 is provided with a data table memory 26, and the selection circuit 24 selects the second or the third in accordance with the amount of time difference between the absolute times of the master side and the slave side.
The time data for switching to the FG pulse frequency dividers 22 and 23 are stored in advance. The absolute time comparison means 27 compares the absolute time of the master side with that of the slave side by, for example, 500 m.
It is done after a sec time. Then, if there is a time lag, the time data corresponding to the amount is read from the data table memory 26, and this time data and lead or lag data are given to the frequency division ratio switching means 25. Therefore, the frequency division ratio switching control means 25 uses the advance or delay data to determine the second
Alternatively, either one of the third FG pulse frequency dividers 22 and 23 is selected, and the switching time is appropriately controlled according to the time data.

Next, the operation will be described with reference to FIG. In the step, absolute time conversion means 6 and 9 on the master side and the slave side respectively convert the absolute time information into absolute time, and in step further, the absolute time comparison means 27 determines whether or not the absolute times on the master side and the slave side are deviated. Is determined by. Here, if the absolute times are not shifted and the synchronization is achieved, the process waits for one cycle time of a predetermined cycle, for example, 500 msec, and returns to the step. If it is determined in step that the absolute time is shifted, the absolute time comparing means 27 determines whether or not the slave side is proceeding in step. If the slave side is advancing, the amount of advance is detected in step, and further time data is read from the data table memory 26 according to this amount of advance and given to the division ratio switching control means 25. Then, in step, the selection circuit 24 is switched for a time period corresponding to the amount of advance so that the frequency division pulse of the third FG pulse frequency divider 23 is selected. Then, in step, the capstan motor 12 is decelerated according to the time when the selection circuit 24 is switched. Then, the process waits for one cycle time. Within this one cycle, the capstan motor 12 is decelerated and further returns to a constant speed rotation, the servo mechanism is locked in and becomes stable, and the absolute time is compared again in step.

Also, if the slave side is delayed in step,
The step delay amount is detected, and further time data is read from the data table memory 26 in accordance with the delay amount and given to the frequency division ratio switching control means 25. Then, in step, the selection circuit 24 is switched so as to select the frequency-divided pulse of the second FG pulse frequency divider 22 for a time period according to the delay amount. Then, in the step, the capstan motor 12 is accelerated according to the time when the selection circuit 24 is switched, and the step is reached.

As described above, the synchronous driving device of the present invention can greatly decelerate and accelerate the capstan motor 12 by greatly changing the frequency division ratio of the FG pulse.
It can be synchronized quickly. Moreover, the absolute time comparison allows for the lock-in time of the servo mechanism, the frequency division ratio is switched, the capstan motor 12 is decelerated or accelerated, and the frequency division ratio is returned to that for constant speed rotation. Since the motor 12 is rotated for a certain period of time to return to the constant speed rotation, the absolute time is compared in the stable state of the servo mechanism. For this reason, no comparison is made in the transient state of the servomechanism, and the rotational speed of the capstan motor 12 is not excessively changed, leading to stable synchronous operation.

In the above embodiment, one third FG pulse frequency divider 23 is provided to decelerate the capstan motor 12, and one second FG pulse frequency divider 22 is provided to accelerate the capstan motor 12. However, the present invention is not limited to this, and in order to decelerate and accelerate, a plurality of FG pulse frequency dividers having different frequency division ratios are provided, and frequency division pulses having different frequency division ratios are appropriately used according to the amount of time shift. The selection circuit 24 may be used for selection. Further, the FG pulse frequency divider has a first frequency division ratio at which the capstan motor 12 rotates at a constant speed, a second frequency division ratio larger than the first frequency division ratio, and a first frequency division ratio. The frequency division ratio switching control means 25 may switch the frequency division ratio to a smaller third frequency division ratio. Further, the FG pulse frequency divider may be configured such that the frequency division ratio can be varied continuously or in the form of a number of fine steps, and the frequency division ratio is controlled according to the amount of time lag. Further, the time data for switching the selection circuit 24 in accordance with the amount of time lag of the absolute time is not limited to the data read from the data table memory 26, and the absolute time comparison means 26 or the frequency division ratio switching control means 25.
It may be configured to output the calculation as appropriate.

(Effects of the Invention) Since the synchronous operation device of the present invention is configured as described above, it has excellent effects as described below.

By changing the frequency division ratio, the capstan motor can be greatly decelerated and accelerated quickly, and the synchronous operation can be obtained accordingly. Moreover, because the absolute time on the master side and that on the slave side are compared while the capstan motor is rotating at a stable constant speed, excessive control is not performed due to the response delay of the servo mechanism, etc., and synchronous operation is extremely smooth. Is obtained.

Also, if the selection circuit selects a divided pulse with a different division ratio, the division ratio can be changed quickly, so the rotation speed of the capstan motor can be changed quickly, and synchronous operation is as much as that. Obtained quickly.

Then, if the time length during which the selection circuit is switched according to the amount of time lag is controlled, even if the frequency division ratio for decelerating or accelerating the capstan motor is fixed, the time lag can be easily adjusted. The deceleration or acceleration can be controlled according to the amount of.

Further, if the time data is read from the data table memory, it is possible to easily set the time data with respect to the amount of time shift without requiring calculation or the like. Then, by changing the time data, it is possible to operate the slave side regenerators having different servo mechanisms such as inertia in the same device in synchronization.
The synchronous operation device of the present invention is highly versatile.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of an embodiment of the synchronous driving device of the present invention, FIG. 2 is a flow chart for explaining the operation of FIG. 1, and FIG. 3 is a conventional synchronous driving device. It is a block circuit diagram of an example. 1: Master side reproducing device, 2, 4: Magnetic tape, 6, 9: Absolute time converting means, 11: Servo control means 12: Capstan motor, 14: FG pulse generating means, 20: Slave side reproducing machine, 21: 1st FG pulse divider, 22: 2nd FG pulse divider, 23: 3rd FG pulse divider, 24: selection circuit, 25: division ratio switching control means, 26: for data table Memory, 27: Absolute time comparison means.

Claims (4)

[Claims] 1. A synchronous operation device for reproducing a plurality of recording media on which the same absolute time information is recorded while synchronizing them with a master-side reproducing device and a slave-side reproducing device, respectively.
Absolute time comparing means for comparing the absolute time of the master side reproduced by the master side reproducing device and the absolute time of the slave side reproduced by the slave side reproducing device and outputting a signal according to the time lag; FG pulse frequency dividing means for frequency-dividing the FG pulse output according to the rotation speed of the capstan motor of the slave regenerator and outputting the frequency-divided pulse, and frequency division for the FG pulse frequency dividing means according to the time difference. A frequency division ratio switching control means for temporarily switching the frequency ratio, and a servo control means for controlling the rotation speed of the capstan motor on the basis of the frequency division pulse are provided, and a time longer than the lock-in time of the servo mechanism is provided. The synchronous operation device is characterized in that the absolute time comparison means is configured to compare the absolute times. 2. The FG pulse divider is a first FG pulse divider that divides the FG pulse at a first dividing ratio at which the capstan motor rotates at a constant speed, and the first FG pulse divider. A second FG pulse frequency divider having a second frequency division ratio larger than the first frequency division ratio, and a third FG pulse frequency divider having a third frequency division ratio smaller than the first frequency division ratio.
Of the FG pulse frequency divider and a selection circuit for selecting one of the frequency division pulses output from the first to third frequency dividers and giving it to the servo control means. 2. The synchronous operation device according to claim 1, wherein the frequency division ratio switching control means is configured to switch and control the selection circuit according to a time lag of the absolute time on the slave side. 3. The frequency dividing ratio switching control means selects one of the second and third frequency dividers by the selection circuit according to the direction of time lag between the master side and the slave side in absolute time, and 3. The synchronous operation device according to claim 2, wherein the time length of switching to the second or third frequency divider is controlled according to the amount of time shift. 4. A data operating table according to claim 3, wherein the time data for switching the selection circuit in correspondence with the amount of time lag between the master side and the slave side is stored in advance. A memory is provided, and the absolute time comparison means reads out the time data according to the amount of time shift, and the frequency division ratio switching control means controls the time during which the selection circuit is switched according to the time data. The synchronous operation device characterized by the above.