JPH0626053B2 - Servo circuit in recording / reproducing apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a recording / reproducing apparatus for recording and reproducing information on a tape by a rotary drum having a magnetic head, such as a digital audio tape recorder. The present invention relates to a servo circuit for detecting and obtaining a tracking error signal.

[Conventional technology]

A conventional servo circuit for controlling the rotation speed of the automatic capstan shaft will be described with reference to FIGS.

Figure 5 shows a digital audio tape recorder (hereinafter D
A), in particular, a block diagram showing an outline of a DAT capable of reproducing an odd-numbered speed, 1 is a magnetic head 1a for track A and a track B for reproducing information of track A in one frame recorded on the tape T. Play information B
A rotary drum having a track magnetic head 1b, a drum motor 2 for rotationally driving the rotary drum 1, and 3
Is a pulse generator that detects the rotational phase of the drum motor 2 to detect the rotational positions of the magnetic heads 1a and 1b, 4 is a frequency generator that detects the rotational frequency of the drum motor 2, and 5 is the pulse generator 3. The drum motor 2 is driven by the output from the frequency generator 4.
A drum servo circuit for rotating the
6 is a capstan motor for rotating the capstan shaft, 7 is a frequency generator for detecting the rotation frequency of the capstan motor 6, and 8 is the frequency from the frequency generator 7 which is 1 × speed reproduction from the system controller 15 or an odd number. A frequency dividing circuit for dividing the frequency of the double speed reproduction signal by a frequency dividing ratio according to the speed instruction signal, 9 is a frequency for converting the frequency divided by the frequency dividing circuit 8 into a voltage according to the frequency from the frequency generator 7. / Voltage converter 10 is an automatic tracking circuit (hereinafter referred to as an ATF circuit) described later.
An adder for adding the tracking error signal from 14 and the signal from the frequency / voltage converter 9, 11 controls the capstan motor 6 at a rotational speed according to the odd-numbered speed by the output from the adder 10. Drive circuit, 12
Is a head switching pulse generation circuit for outputting a pulse signal indicating which one of the magnetic heads 1a and 1b is transmitting the reproduction output by the output from the pulse generator 3, and 13 is a reproduction signal from the magnetic heads 1a and 1b. A reproducing amplifier for amplification 14 is a pulse signal from the head switching pulse generating circuit 12 and a reproducing amplifier 13
The ATF circuit for transmitting the tracking error signal from the RF signal will be described in detail later. Reference numeral 15 is a system controller which outputs a 1 × speed signal or an odd speed signal to the ATF circuit 14 and a speed instruction signal to the frequency dividing circuit 8 based on an odd speed reproduction command selected by the operator.

Thus, the rotary drum 1 is controlled at a predetermined rotation speed via the drum servo circuit 5 by the detection outputs from the pulse generator 3 and the frequency generator 4.

On the other hand, since the running of the tape T is controlled by the capstan shaft, the signals reproduced by the magnetic heads 1a and 1b are input to the ATF circuit 14 via the reproduction amplifier 13. Further, since the head switching pulse generation circuit 12 outputs a signal indicating which of the magnetic heads 1a and 1b is reproducing by the signal detected by the pulse generator 3, the ATF circuit 14 detects the tracking deviation from the ATF signal. At this time, the ATF circuit 14 detects a tracking error signal based on the 1x speed signal or the odd speed signal input from the system controller 15. Further, the signal from the frequency generator 7 for detecting the rotation frequency of the capstan motor 6 is divided by the frequency dividing circuit 8 at a frequency division ratio according to the speed instruction signal, and then the frequency / voltage converter 9 outputs a voltage signal. The voltage signal and the tracking error signal are added by the adder 10 and the output thereof is used to control the capstan motor 6 in accordance with the odd multiple speed set via the drive circuit 11 for accurate tracking. Playback is done below.

Next, details of the ATF circuit 14 of FIG. 5 will be described with reference to FIG.

Reference numeral 21 is a low-pass filter for extracting a pilot signal from the RF signal amplified by the regenerative amplifier 13 shown in FIG. 5, 22 is an envelope detector for detecting the envelope of the pilot signal from the low-pass filter 21,
23 is a time point when the first sampling pulse SP ₁ from the sampling pulse generating circuit 30 described later is input,
A first sample-hold circuit that holds the output from the envelope detector 22, and 24 outputs a value obtained by subtracting the hold output from the first sample-hold circuit 23 from the output from the envelope detector 22. The subtractor 25 holds the output from the subtractor 24 at the time when the second sampling pulse SP ₂ from the AND circuit 31 to be described later is input to the adder 10 shown in FIG. On the other hand, it is a second sample and hold circuit that outputs a tracking error signal.

26 is a band pass filter for extracting a sync signal from the RF signal from the regenerative amplifier 13, 27 is a waveform shaping circuit for shaping the sync signal from the band pass filter 26, and 28 is a signal from the waveform shaping circuit 27. And a signal from a window signal generating circuit 34, which will be described later, as input, 29 detects either of the sync signals f ₂ and f _{3 in} the ATF format shown in FIG. 7 as the sync signal from the AND circuit 28. A sync pattern detection circuit 30 is a sync signal detected by the sync pattern detection circuit 29, and is a pulse signal for sending a _first pulse signal P ₁ and a second pulse signal P ₂ after a predetermined time from the pulse signal P _1. In the circuit, the pulse signals P ₁ and P ₂ become the sampling pulse signals SP ₁ and SP ₂ described above. That is, the pulse signal P ₁ is supplied to the above-mentioned first sample-hold circuit 23 as the first sampling pulse SP ₁
And the pulse signal P ₂ becomes the sampling pulse SP _{2 of} the second sample and hold circuit 25 via the AND circuit 31.

The AND circuit 31 outputs the output from the switch 32 which is switched by the 1 × speed signal from the system controller 15 shown in FIG. 5 and the second output from the pulse generating circuit 30.
Pulse signal P ₂ is input. In addition, switch 3
The switching state of 2 shows the case of the 1 × speed mode.

Reference numeral 33 denotes a reset signal generation circuit for transmitting a reset signal immediately before the window signal generation circuit 34 described later outputs a window signal in response to the head switching pulse from the head switching pulse generation circuit 12 shown in FIG.
A window signal generating circuit 4 generates a window signal in response to a head switching pulse from the head switching pulse generating circuit 12, and the window signal is output to the AND circuit 28. Reference numeral 35 denotes a sync wave number counter for counting the number of detection pulse waves generated by the sync pattern detection circuit 29, and the count value is reset for each reset signal from the reset signal generation circuit 33. Reference numeral 36 denotes a sync length determination circuit for determining whether the sync signal input from the sync band pass filter 26 is a 1 block signal or a 0.5 block signal based on the count value from the sync wave number counter 35. When it is determined that the frame synchronization protection circuit 37,
0.5 block signal or more (including 1 block signal)
When it is determined that the output is output to the frame synchronization protection circuit 37 and the AND circuit 38.

Numeral 37 indicates a frame configuration defined by a track pattern, which will be described later, based on the 0.5 block signal from the sync length determining circuit 36, the one block signal and the head switching signal from the head switching pulse generating circuit 12. The frame sync protection circuit determines that the sync lengths match and controls the generation of the sample pulse at the 1 × speed, and its output is supplied to the AND circuit 31 via the switch 32.

39 is the head switching pulse generation circuit 12 described above.
A pulse signal is transmitted only when the first ATF1 of each of the A track and the B track is transmitted.
TF1 signal generation circuit, 40 is the ATF1 signal generation circuit 3
An area selection circuit for selecting and outputting the first ATF 1 of each track from the pulse signal from 9 and the pulse signal from the head switching pulse generation circuit 12 when an odd speed signal is input from the system controller 15. Is.

Next, the track pattern recorded on the tape T shown in FIG. 7 will be described.

ATF1 and A on the front and back of each track
The TF2 has a low-frequency signal f ₁ with a small azimuth effect as a tracking pilot signal, which detects the level of crosstalk from both adjacent tracks at the time of reproduction and detects the crosstalk component of both adjacent tracks. It is used to obtain the level difference as a tracking error signal. A low-frequency signal of 130 KHz is used as the pilot signal f ₁ .

A sync signal for determining the position where the pilot signal f ₁ is recorded is recorded in ATF1 and ATF2. Since the on-track and the adjacent track cannot be distinguished from each other when the sync signal has crosstalk, a sync signal having a frequency having an azimuth effect and having a pattern not existing in the PCM signal is selected. Assuming that the head corresponding to + azimuth is 1a and the head corresponding to −azimuth is 1b, the sync signals are different from each other in order to distinguish the 1a head and the 1b head. A sync 1 signal f ₂ of 522 KHz and a sync 2 signal f ₃ of frequency 784 KHz are recorded at predetermined positions for the 1b head.

In the DAT, the erasing head is not provided, and the rewriting of the signal is performed by so-called overwriting in which overwriting is performed on the previous recording. Therefore, the erase signal f ₄ having a frequency of 1.56 MHz is recorded at a predetermined position for erasing the pilot signal f ₁ , sync 1 signal f _2, and sync 2 signal f ₃ of the previous recording.

The positions of the ATF pilot signals are different on the on-track and on both adjacent tracks, and the levels of the on-track pilot signal and the levels of the pilot signals on both adjacent tracks are temporally different, and three types of levels are sampled respectively. Are arranged so that they can.

ATF1, the ATF region of ATF2 are respectively assigned five blocks, pilot signal _{f 1} is recorded in two blocks of them. The sync signals f ₂ and f ₃ are recorded using one block or 0.5 blocks from the center of the position where the pilot signal f ₁ is recorded on _one adjacent track. The pilot signal f ₁ on the other adjacent track is recorded such that the center thereof is located two blocks after the beginning of the sync signal recorded on the on-track. One block of sync signal is in odd frames,
The sync signal of 0.5 block is assigned to each even frame.

As described above, in the ATF, the sync signal frequency is different between the 1a head and the 1b head, and the sync signal recording length is different between the odd frame and the even frame. Therefore,
Different ATFs are given to all four consecutive tracks, so that they can be distinguished. ATF as described above
The pattern is a 4-track complete type, which is repeated every 4 tracks.

Next, in the case of performing odd-numbered speed reproduction, in the odd-numbered speed reproduction by the area selection circuit 40, it is necessary to select the first ATF 1 of each of the A and B tracks and control the capstan motor 6 accordingly. Fig. 8
It will be described together with FIG.

FIG. 8 (a) shows heads 1a, 1b and 1 for 1 × speed reproduction.
A trace state of two tracks A and B forming a frame is shown, and hatched portions are ATF1 and ATF2.

As can be seen from the figure, the head 1a is the ATF of the track A.
1 and ATF2 signals are reproduced, and the head 1b is track B
The ATF1 and ATF2 signals are reproduced. Therefore, the reproduction signal level of the track A from the head 1a is shown in FIG. 8 (b).
As shown in FIG. 8, a high level reproduction signal is obtained, and the reproduction signal level of the track B from the head 1b is a high level reproduction signal as shown in FIG. 8 (c). Therefore, the rotation speed of the capstan motor 6 is controlled by the ATF1 and ATF2 of each track from the heads 1a and 1b, for a total of four ATFs.
The tracking error voltage obtained by

Further, FIG. 9 (a) shows the head 1a in the case of odd speed reproduction,
1b shows a trace state of four tracks A and B of an even frame and an odd frame, and a hatched portion is AT.
F1 and ATF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the even frame tracks.
Since part 2 is missing, the reproduction signal level becomes as shown in FIG. 9 (b). Therefore, the high level reproduction signal is only the ATF1 of the A track in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b in the ATF1 and ATF2 on the track B in the odd-numbered frame tracks.
Part is missing, so the playback signal level is shown in Fig. 9 (c).
It becomes as shown in. Therefore, the high level reproduction signal is only the ATF1 of the B track in the odd frame track. Therefore, in order to control the rotation speed of the capstan motor 6 in the odd-numbered speed reproduction, 4 in one frame is required.
ATF1 of track A in an even frame track reproduced by the head 1a in one ATF area,
It is known that the ATF1 of the track B in the odd-numbered frame track to be reproduced by the head b is selected and the tracking servo is performed by the tracking error voltage obtained in the ATF1 of each of the A and B tracks.

Note that the odd-numbered speed reproduction in the above description is the 3x speed reproduction, but the same applies to the 5x speed, the 7x speed ...
From the four ATF areas in one frame, select two areas, ATF1 of A track and ATF1 of B track or ATF2 of A track and ATF2 of B track,
It suffices to obtain the tracking error voltage by the ATF and apply the tracking servo to the capstan motor 6.

Further, in odd-number speed reproduction, it is not necessary to select all two areas of ATF1 of A track and ATF1 of B track or ATF2 of A track and ATF2 of B track, and it is possible to select from four ATF areas of one frame. Tracking servo may be performed by selecting only one area and obtaining a tracking error voltage.

Next, the operation of the block diagram of FIG.
This will be described with reference to FIGS. 0 to 12.

The sync signal as shown in FIGS. 10 (a) and 11 (c) from the RF signal as shown in FIG. 12 (a) from the regenerative amplifier 13 and the low pass filter 2 via the band pass filter 26.
It is obtained by selecting a pilot signal as shown in FIG. An envelope as shown in FIG. 10 (c) is detected by the envelope detector 22 of this pilot signal, and the envelope signal is output to the first sample / hold circuit 23 and the subtractor 24 in the next stage.

On the other hand, the sync signal is waveform-shaped by the waveform shaping circuit 27 as shown in FIG. 1 (b) and then output to one input terminal of the AND circuit 28. Further, a window signal as shown in FIG. 11 (b) from a window signal generating circuit 34 for generating a window signal by a head switching signal from the head switching pulse generating circuit 12 is inputted to the other input terminal of the AND circuit 28. ing. Therefore, the AND circuit 28
Outputs a waveform-shaped sync signal when the window is open.

The sync signal from the AND circuit 28 is converted by the sync pattern detection circuit 29 into the sync signal A shown in FIG.
Detecting f ₂ or f ₃ on the TF track pattern, the first
A detection pulse as shown in Fig. 1 (e) is transmitted. Then, when this detection pulse is input to the pulse generation circuit 30, the pulse generation circuit 30 immediately outputs the _first pulse signal P ₁ as shown in FIG. )
As described above, the second pulse signal P ₂ is transmitted. Since the first pulse signal P ₁ becomes the sampling pulse SP _{1 as} shown in FIG. 10 (d) and is input to the first sample and hold circuit 23, the first sample and hold circuit 23
Holds the level of the envelope output from the envelope detector 22 at this time. Then, the difference between the held output and the output from the envelope detector 22 is calculated and output by the subtractor 24. The second pulse signal from the pulse generation circuit 30 is output to one input terminal of the AND circuit 31.

On the other hand, the detection pulse from the sync pattern detection circuit 29 is input to the sync wave number counter 35. Since the sync wave number counter 35 is cleared by the reset signal as shown in FIG. 11 (a) from the reset signal generation circuit 33 before the window signal is switched, it counts the sync wave number at the same time when the detection pulse is input. Since the count number of the detection pulse from the sync pattern detection circuit 29 is different between the 1 block signal and the 0.5 block signal,
1 depending on the count value from the sync wave number counter 35
Whether the signal is a block signal or a signal of 0.5 blocks or more is determined by the sync length determination circuit 36, and a signal of 0.5 blocks or more and a 1 block signal are determined as shown in FIGS. Both signals are output to the frame synchronization protection circuit 37, and a signal of 0.5 block or more is output to one input terminal of the AND circuit 38.

On the other hand, from the signal from the head switching pulse generation circuit 12 as shown in FIG.
Thus, a pulse signal as shown in FIG. 12 (c) is transmitted at a timing synchronized with ATF1 in each track A, B as shown in FIG. 12 (a). Then, in the area selection circuit 40, from the signal from the head switching pulse generation circuit 12 and the signal from the ATF1 signal generation circuit 39, in the case of odd double speed reproduction in the odd double speed reproduction mode, the twelfth
A signal (signal synchronized with each ATF1 of tracks A and B) as shown in FIG. 9D is transmitted and input to the other input terminal of the AND circuit 38.

At this time, since the system controller 15 does not input the 1x speed signal to the switch 32 in the odd speed reproduction mode, the contact of the switch 32 is switched contrary to the illustration. Therefore, the AND circuit 38 outputs an output having a sync signal of 0.5 block signal or more (including 1 block signal) from the sync length determination circuit 36, and outputs the selected ATF1 signal from the area selection circuit 40. When this is done, a gate signal as shown in FIG. 11 (j) is output to the AND circuit 31 via the switch 32. Therefore, the AND circuit 31 outputs the second sampling pulse SP ₂ when the second pulse signal P ₂ is output from the pulse generation circuit 30.
To the sample circuit 25 of. As a result, the second sampling circuit 25 holds the output signal as shown in FIG. 10 (g) from the subtractor 24 when the sampling signal SP ₂ is input. The held output is added to the adder 10
To a tracking error signal.

[Problems to be solved by the invention]

By the way, as described in the above-mentioned conventional example, the tracking error voltage is obtained at the ATF1 of the track A and the track B detected by the heads 1a and 1b at the time of odd speed reproduction.
Since the level is the same as the tracking error voltage obtained in No. 1, optimal tracking can be performed. However, at the even speed reproduction, the level of the tracking error voltage in the ATF1 obtained by the head 1a and the AT obtained by the head 1b
Since there is a considerable difference from the level of the tracking error voltage in F1, each ATF of track A and track B is
When the tracking error voltage obtained in No. 1 is used for the tracking servo, there is a problem that the tracking shifts.

[Object of the Invention]

The present invention is intended to solve the above-mentioned problem, and only one area is selected from four ATF areas in one frame in which an ATF signal is reproduced at the time of even speed reproduction.
Since the tracking error signal is obtained by F, it is an object of the present invention to provide a servo circuit in a recording / reproducing apparatus in which optimum tracking is applied to a capstan motor and faithful reproduction can be performed.

[Outline of Invention]

In order to achieve the above-mentioned object, according to the present invention, only one area is selected from four ATF areas in one frame at the time of even speed reproduction, a tracking error voltage is obtained by an ATF signal, and a tracking servo is performed by a capstan motor. The gist is that it is applied.

Example of Invention

An embodiment of the present invention will be described with reference to the block diagram of FIG.
The difference from the conventional example shown in FIG. 5 is that the system controller 15 sends an even speed signal to the ATF circuit 14.

The block diagram of FIG. 2 shows the details of the ATF circuit 14, and the same reference numerals as those in FIG.

The area selection circuit 40 according to the present invention receives an AND circuit 40a to which the ATF1 signal and the even speed signal from the ATF1 signal generation circuit 39 are input, and an ATF1 signal and an odd speed signal from the ATF1 signal generation circuit 39. It is composed of an AND circuit 40b and an OR circuit 40c to which outputs from the AND circuits 40a and 40b are input.

The circuit operation of FIG. 2 will be described below with reference to the timing chart of FIG.

Heads 1a and 1b are R-shaped as shown in FIG. 3 (a) for each frame.
While the F signal is detected, the head switching pulse generating circuit 12 sends out a head switching signal as shown in FIG. 3 (b). Therefore, the ATF1 signal generating circuit 39 outputs the head switching signal from each signal as shown in FIG. 3 (a). A on tracks A and B
A pulse signal as shown in FIG. 3 (c) is transmitted at a timing synchronized with TF1. The ATF1 signal is input to one input terminal of the AND circuit 40a in the area selection circuit 40, and the even speed signal is input to the AND circuit 40a in the even speed reproduction mode. The output from the circuit 40a is input to the OR circuit 40c. Therefore, since the output sent from the OR circuit 40c is input to the AND circuit 38, when the output which detects the 0.5 block signal from the sync length determination circuit 36 is input, the AND circuit 31 is sent via the switch 32. Send output to. As a result, when the head 1a detects the sync signal from the AND circuit 31, the sampling pulse SP ₂ is sent to the second sample and hold circuit 25, so that the tracking output from the second sample and hold circuit 25 is performed. The error voltage becomes a voltage when the head 1a detects the ATF1 of the track A, and thereafter, the capstan motor 6 is subjected to tracking servo by this tracking error voltage.

In the odd-numbered speed reproduction mode, the odd-numbered speed signal is input from the system controller 15.
A signal (e) (signal synchronized with each ATF1 of tracks A and B) is transmitted and input to the other input terminal of the AND circuit 38.

The following operation is the same as the above-described even-numbered speed reproduction operation, and therefore its explanation is omitted.

Next, the operation of detecting the ATF at the even speed reproduction in FIG. 4 will be described.

FIG. 4 (a) shows the trace state of the heads 1a and 1b and the four tracks A and B of the even frame and the odd frame in the case of odd speed reproduction, and the hatched portion is ATF1 and A.
It is TF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the even-numbered frame tracks.
Since a part is missing, the reproduction signal level becomes as shown in FIG. 4 (b). Therefore, the high level reproduction signal is only the ATF1 of the track A in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b because a part of the ATF1 in the track B in the even frame track, a part of the ATF1 in the track B in the odd frame track and a track in the odd frame track. It becomes a part of ATF2 in B. Therefore, the reproduction signal level of the track B from the head 1b becomes a low level reproduction signal as a whole as shown in FIG. 4 (c). Therefore, the tracking error voltage is obtained from the high level ATF signal in the ATF1 of the track A among the ATF signals reproduced by the heads 1a and 1b to control the capstan motor.

It should be noted that even-numbered-speed reproduction in the above description is double-speed reproduction, but the same is true for 4-times-speed, 6-times-speed ...
One ATF from the four ATF areas in the frame
It suffices to select an area, obtain a tracking error voltage by ATF, and perform tracking servo.

〔The invention's effect〕

As described above, the present invention is
Since only one area is selected from the four ATF areas in the frame to obtain the tracking error voltage by the ATF, the optimum tracking error voltage is obtained, and therefore, the capstan motor is suitable for even speed reproduction. The number of rotations can be controlled, and faithful reproduction can be performed.

[Brief description of drawings]

FIG. 1 is an overall block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of an ATF circuit of the same as above, FIG. 3 is a timing chart diagram of the same as above, and FIG. 4 shows an ATF detection state during even speed reproduction. FIG. 5, FIG. 5 is a block diagram showing the entire structure of the prior art, FIG. 6 is a block diagram of the above ATF circuit, FIG. 7 is a diagram showing an ATF track pattern, and FIG. 8 is ATF detection during 1 × speed reproduction. FIG. 9 is a diagram showing a state, FIG. 9 is a diagram showing an ATF detection state during odd-numbered speed reproduction, and FIGS. 10 to 12 are timing chart diagrams in the circuit of FIG. 6 ... Capstan motor, 12 ... Head switching pulse generation circuit, 13 ... RF signal reproduction amplifier, 14
...... ATF circuit, 15 …… System controller, 2
3, 25 ... Sample and hold circuit, 40 ... Area selection circuit

Front page continuation (72) Inventor Masafumi Nakamura 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Home Appliances Research Institute, Hitachi Ltd. In the laboratory (56) Reference JP-A-60-253050 (JP, A) JP-A-63-119056 (JP, A) Actual development Sho-63-52136 (JP, U)

Claims (1)

[Claims] 1. A sync signal and a pilot signal are reproduced from an ATF signal, and a tracking error voltage is generated based on a crosstalk level difference between pilot signals of adjacent tracks based on a detection position of the sync signal. In a servo circuit in a recording / reproducing device that performs tracking servo by a tracking error voltage, an area selection circuit that selects only one ATF area having the highest reproduction level among four ATF areas of one frame at the time of even speed reproduction is provided. A, A of one area selected by the area selection circuit
A servo circuit in a recording / reproducing apparatus, wherein a tracking error voltage is obtained from TF.