JPH063656B2 - Servo circuit in recording / reproducing apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording / reproducing apparatus for recording and reproducing information on a tape by a rotary drum having a magnetic head, such as a digital audio tape recorder, and particularly in even double speed reproduction. Improve the servo circuit so that if heads that detect ATF are clogged (tape magnetic powder adheres to the magnetic gap, etc.), other heads will detect ATF and continue playback. Regarding

[Conventional technology]

A conventional servo circuit for controlling the rotation speed of the automatic capstan shaft will be described with reference to FIGS.

Figure 5 shows a digital audio tape recorder (hereinafter D
In the block diagram showing the outline of DAT capable of variable speed reproduction, 1 is recorded on the tape T.
A rotary drum having a magnetic head for A track 1a for reproducing information of A track in a frame and a magnetic head for B track 1b for reproducing information of B track, 2 is a drum motor for rotationally driving the rotary drum 1, 3 is a pulse generator that detects the rotational phase of the drum motor 2 to detect the rotational positions of the magnetic heads 1a and 1b, 4 is a frequency generator that detects the rotational frequency of the drum motor 2, and 5 is the pulse generator 3 And the output of the frequency generator 4 from the drum motor 2
A drum servo circuit for rotating the
6 is a capstan motor for rotating the capstan shaft, 7 is a frequency generator that detects the rotation frequency of the capstan motor 6, and 8 is the frequency from the frequency generator 7 that is reproduced at 1 × speed from the system controller 15 (steady-state). Reproduction), an even speed reproduction or an odd speed reproduction signal, and a frequency dividing circuit for dividing the frequency by a frequency dividing ratio according to a speed instruction signal. Reference numeral 9 denotes a frequency divided by the frequency dividing circuit 8 from the frequency generator 7. A frequency / voltage converter 10 for converting the voltage into a voltage according to the frequency is an addition for adding a tracking error signal from an automatic tracking circuit (hereinafter referred to as an ATF circuit) 14 described later and a signal from the frequency / voltage converter 9. And 11 is a drive for controlling the capstan motor 6 by the output from the adder 10 at a rotation speed corresponding to each of the multiple speeds. Reference numeral 12 is a head switching pulse generation circuit for outputting a pulse signal indicating which one of the magnetic heads 1a and 1b is transmitting the reproduction output by the output from the pulse generator 3. Reference numeral 13 is one of the magnetic heads 1a and 1b. A reproduction amplifier that amplifies the reproduction signal,
Reference numeral 14 is an ATF circuit for sending a tracking error signal from the pulse signal from the head switching pulse generation circuit 12 and the RF signal from the reproduction amplifier 13, and the details will be described later. Reference numeral 15 denotes a system controller that outputs a 1 × speed signal, an odd speed signal or an even speed signal to the ATF circuit 14 and a speed instruction signal to the frequency dividing circuit 8 based on a double speed reproduction command selected by the operator.

Thus, the rotary drum 1 is controlled at a predetermined rotation speed via the drum servo circuit 5 by the detection outputs from the pulse generator 3 and the frequency generator 4.

On the other hand, since the running of the tape T is controlled by the capstan shaft, the signals reproduced by the magnetic heads 1a and 1b are input to the ATF circuit 14 via the reproduction amplifier 13. Further, since the head switching pulse generation circuit 12 outputs a signal indicating which of the magnetic heads 1a and 1b is reproducing by the signal detected by the pulse generator 3, the ATF circuit 14 detects the tracking deviation from the ATF signal. At this time, the ATF circuit 14 detects a tracking error signal based on the double speed signal input from the system controller 15. Further, the signal from the frequency generator 7 that detects the rotation frequency of the capstan motor 6 is divided by the frequency dividing circuit 8 at a frequency division ratio according to the speed instruction signal, and then the frequency / voltage converter 9
Is converted into a voltage signal by the adder 10, and the voltage signal and the tracking error signal are added by the adder 10,
The output controls the capstan motor 6 according to the double speed set via the drive circuit 11, and reproduction is performed under accurate tracking.

Next, details of the ATF circuit 14 of FIG. 5 will be described with reference to FIG.

Reference numeral 21 is a low-pass filter for extracting a pilot signal from the RF signal amplified by the regenerative amplifier 13 shown in FIG. 5, 22 is an envelope detector for detecting the envelope of the pilot signal from the low-pass filter 21,
23 is a time point when the first sampling pulse SP ₁ from the sampling pulse generation circuit 30 described later is input,
A first sample and hold circuit that holds the output from the envelope detector 22, and 24 subtracts the hold output from the first sample and hold circuit 23 from the output from the envelope detector 22 to obtain a value. The subtracter 25 for outputting holds the output from the subtractor 24 at the time when the second sampling pulse SP ₂ from the AND circuit 31 described later is inputted, and the adder 10 of FIG. Is a second sample and hold circuit that outputs a tracking error signal.

26 is a bandpass filter for extracting a sync signal from the RF signal from the regenerative amplifier 13, 27 is a waveform shaping circuit for waveform shaping the sync signal from the bandpass filter 26, and 28 is a signal from the waveform shaping 27. An AND circuit to which a signal from a window signal generating circuit 34 described later is input, 29 is a sync signal f from the AND circuit 28 in the ATF format shown in FIG.
Sync pattern detection circuit for detecting either ₂ or f ₃ , 3
Reference numeral 0 denotes a sync signal detected by the sync pattern detection circuit 29, which is a pulse generation circuit for sending out the first pulse signal P ₁ and the second pulse signal P ₂ after a certain time has passed from the pulse signal P _{1 for} each pulse. The signals P ₁ and P ₂ become the sampling pulse signals SP ₁ and SP ₂ described above. That is, the pulse signal P ₁ is generated by the first sample and hold circuit 2 described above.
3 with respect to the first sampling pulse SP ₁ becomes also pulse signals P _2, becomes a sampling pulse SP ₂ of the second sample-and-hold circuit 25 through the AND circuit 31.

The AND circuit 31 outputs the output from the switch 32 which is switched by the 1 × speed signal from the system controller 15 shown in FIG. 5 and the second output from the pulse generating circuit 30.
Of the pulse signal P ₂ is input. In addition, switch 3
The switching state of 2 shows the case of the 1 × speed mode.

Reference numeral 33 denotes a reset signal generation circuit for transmitting a reset signal immediately before the window signal generation circuit 34 described later outputs a window signal in response to the head switching pulse from the head switching pulse generation circuit 12 shown in FIG.
A window signal generating circuit 4 generates a window signal in response to a head switching pulse from the head switching pulse generating circuit 12, and the window signal is output to the AND circuit 28. Reference numeral 35 denotes a sync wave number counter for counting the number of detection pulse waves generated by the sync pattern detection circuit 29, and the count value is reset for each reset signal from the reset signal generation circuit 33. Reference numeral 36 denotes a sync length determination circuit for determining whether the sync signal input from the sync band pass filter 26 is a 1 block signal or a 0.5 block signal according to the count value from the sync wave number counter 35, and determines a 1 block signal. To the frame synchronization protection circuit 37, and when it is determined that the signal is 0.5 block signals or more (including 1 block signal), the frame synchronization protection circuit 37 and the AND circuit 38
Send output to and.

37 is detected for a frame structure defined by a track pattern described later based on the 0.5 block signal from the sync length determination circuit 36, one block signal and the head switching signal from the head switching pulse generation circuit 12. It is determined that the sync lengths match, and a frame synchronization protection circuit that controls the generation of the sample pulse at the 1 × speed is output.
1 is being supplied.

39 is the head switching pulse generation circuit 12 described above.
A pulse signal is transmitted only when the first ATF1 of each of the A track and the B track is transmitted.
TF1 signal generation circuit, 40 is the ATF1 signal generation circuit 3
9 and the pulse signal from the head switching pulse generation circuit 12, when the even speed signal is input from the system controller 15, only the first ATF1 of the A track is selected and output, and the system controller This is an area selection circuit that selects and outputs the first ATF 1 of each track when an odd-numbered speed signal is input from 15.

Next, the track pattern recorded on the tape T shown in FIG. 7 will be described.

ATF1 and A on the front and back of each track
The TF2 has a low-frequency signal f ₁ with a small azimuth effect as a pilot signal for tracking, which detects the level of the crosstalk from both adjacent tracks during reproduction and detects the crosstalk component of both adjacent tracks. It is used to obtain the level difference as a tracking error signal. A low frequency signal of 130 KHz is used as the pilot signal f ₁ .

Further, in ATF1 and ATF2, a sync signal for discriminating the position where the pilot signal f ₁ is recorded is recorded. Since the on-track and the adjacent track cannot be distinguished from each other if there is crosstalk in the sync signal, a frequency having an azimuth effect and a pattern which does not exist in the PCM signal is selected. Assuming that the head corresponding to + azimuth is 1a and the head corresponding to −azimuth is 1b, the sync signals are different from each other in order to distinguish the 1a head and the 1b head. The sync 1 signal f ₂ of 522 KHz and the sync 2 signal f ₃ of frequency 784 KHz are recorded at predetermined positions for the 1b head.

In the DAT, the erasing head is not provided, and the rewriting of the signal is performed by so-called overwriting in which overwriting is performed on the previous recording. Therefore, the erase signal f ₄ having a frequency of 1.56 MHz is recorded at a predetermined position for erasing the pilot signal f ₁ , the sync 1 signal f ₂ and the sync 2 signal f ₃ of the previous recording.

The positions of the ATF pilot signals are different on the on-track and on both adjacent tracks, and the levels of the on-track pilot signal and the levels of the pilot signals on both adjacent tracks are temporally different, and three types of levels are sampled respectively. Are arranged so that they can.

Five blocks are allocated to each of the ATF areas ATF1 and ATF2, and the pilot signal f ₁ is recorded in two of the blocks. The sync signals f ₂ and f ₃ are recorded using one block or 0.5 blocks from the center of the position where the pilot signal f ₁ is recorded on _one adjacent track. Pilot signal f ₁ of the other adjacent track
Is recorded such that the center is located two blocks after the beginning of the sync signal recorded on the track. The sync signal of one block is assigned to the odd frame and the sync signal of 0.5 block is assigned to the even frame.

As described above, in the ATF, the sync signal frequency is different between the 1a head and the 1b head, and the sync signal recording length is different between the odd frame and the even frame. Therefore,
Different ATFs are given to all four consecutive tracks, so that they can be distinguished. ATF as described above
The pattern is a 4-track complete type, which is repeated every 4 tracks.

Next, in the case of performing the variable speed reproduction, the area selection circuit 40 selects the first ATF1 of the A track in the even speed reproduction, and A and B in the odd speed reproduction.
It will be explained with reference to FIGS. 8 to 10 whether the first ATF 1 of each of the trucks should be selected and the capstan motor 6 should be controlled accordingly.

FIG. 8 (a) shows heads 1a, 1b and 1 for 1 × speed reproduction.
A trace state of two tracks A and B forming a frame is shown, and hatched portions are ATF1 and ATF2.

As can be seen from the figure, the head 1a is the ATF of the track A.
1 and ATF2 signals are reproduced, and the head 1b is track B
The ATF1 and ATF2 signals are reproduced. Therefore, the reproduction signal level of the track A from the head 1a is shown in FIG. 8 (b).
As shown in FIG. 8, a high level reproduction signal is obtained, and the reproduction signal level of the track B from the head 1b is a high level reproduction signal as shown in FIG. 8 (c). Therefore, the rotation speed of the capstan motor 6 is controlled by the ATF1 and ATF2 of each track from the heads 1a and 1b, for a total of four ATFs.
The tracking error voltage obtained by

Further, FIG. 9 (a) shows the head 1a in the case of even speed reproduction,
1b and four tracks A of even frame and odd frame,
Shows the trace state with B, the hatched part is ATF1
And ATF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the even-numbered frame tracks.
Since a part is missing, the reproduction level becomes as shown in FIG. 9 (b). Therefore, the high level reproduction signal is only the ATF1 of the track A in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b because a part of the ATF1 in the track B in the even frame track, a part of the ATF1 in the track B in the odd frame track and a track in the odd frame track. It becomes a part of ATF2 in B.
Therefore, the reproduction signal level of the track B from the head 1b becomes a low level reproduction signal as a whole as shown in FIG. 9 (c). Therefore, in order to control the rotation speed of the capstan motor 6 in the even-speed reproduction, the speed of 4
Of the two ATF areas, only the ATF1 of the A track reproduced by the head 1a is selected and the tracking servo is performed using the tracking error voltage obtained in the ATF1 of the A track.

Further, FIG. 10 (a) shows the head 1 in the case of odd speed reproduction.
a, 1b and four tracks A and B of an even frame and an odd frame are shown.
TF1 and ATF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the even-numbered frame tracks.
Since a part is missing, the reproduction signal level becomes as shown in FIG. 10 (b). Therefore, the high level reproduction signal is only the ATF1 of the A track in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b in the ATF1 and ATF2 on the track B in the odd-numbered frame tracks.
Part is missing, so the playback signal level is shown in Fig. 10.
As shown in (c). Therefore, the high level reproduction signal is only the ATF1 of the B track in the odd frame track. Therefore, in order to control the rotational speed of the capstan motor 6 in the odd-numbered speed reproduction, the ATF of the track A in the even-numbered frame track reproduced by the head 1a among the four ATF areas in one frame.
It is known that ATF1 of track B in the odd-numbered frame track to be reproduced by 1 and head 1b is selected, and tracking servo is performed by the tracking error voltage obtained in ATF1 of each track of A and B.

The even-speed reproduction in the above description is the case in which the ATF1 of the A track is selected in the 2-times speed reproduction, but the same applies to the 4-times speed, 6-times speed ...
Generally, one of the four ATF areas in one frame may be selected and the tracking servo may be applied to the capstan motor 6 which has obtained the tracking error voltage by the ATF.

The same is true for odd-numbered speed reproduction,
7x speed ... At the time, A-track ATF1 and B-track ATF are selected from the four ATF areas in one frame.
1 or A track AHF2 and B track ATF
It is only necessary to select 2 areas 2 and obtain the tracking error voltage by the ATF to apply the tracking servo to the capstan motor 6.

Note that it is not necessary to select all two areas of the ATF1 of the A track and the ATF1 of the B track or the ATF2 of the A track and the ATF2 of the B track in the odd number double speed reproduction. It is also possible to select only one area from the four ATF areas in the frame, obtain the tracking error voltage, and perform the tracking servo.

Next, the operation of the block diagram of FIG.
Description will be given with reference to FIGS. 1 to 13.

From the RF signal as shown in FIG. 13 (a) from the regenerative amplifier 13, the sync signal as shown in FIGS. 11 (a) and 12 (c) is passed through the bandpass filter 26 and the lowpass filter 2
It is obtained by selecting the pilot signal as shown in FIG. An envelope as shown in FIG. 11 (c) is detected by the envelope detector 22 of this pilot signal, and the envelope signal is output to the first sample / hold circuit 23 and the subtractor 24 in the next stage.

On the other hand, the sync signal is processed by the waveform shaping circuit 27 in FIG. 12 (d).
After the waveform is shaped as described above, it is output to one input terminal of the AND circuit 28. Further, a window signal as shown in FIG. 12 (b) from a window signal generating circuit 34 for generating a window signal by a head switching signal from the head switching pulse generating circuit 12 is inputted to the other input terminal of the AND circuit 28. ing. Therefore, AND circuit 2
Reference numeral 8 outputs a sync signal whose waveform has been shaped when the window is open.

The sync signal from the AND circuit 28 is converted by the sync pattern detection circuit 29 into the sync signal A shown in FIG.
Detecting f ₂ or f ₃ on the TF track pattern,
The detection pulse as shown in FIG. When this detection pulse is input to the pulse generating circuit 30, the pulse generating circuit 30 outputs the first pulse signal P _{1 as} shown in FIG. 12 (f).
Is output immediately and a second pulse signal P ₂ is output after a predetermined time as shown in FIG. 12 (g). This first pulse signal P ₁ is the sampling pulse SP _{1 as} shown in FIG. 11 (d).
Is input to the first sample and hold circuit 23, the first sample and hold circuit 23 holds the level of the envelope output from the envelope detector 22 at this time. Then, the difference between the held output and the output from the envelope detector 22 is calculated and output by the subtractor 24. Also,
The second pulse signal from the pulse generation circuit 30 is output to one input terminal of the AND circuit 31.

On the other hand, the detection pulse from the sync pattern detection circuit 29 is input to the sync wave number counter 35. Since the sync wave number counter 35 has been cleared by the reset signal generating circuit 33 as shown in FIG. 12 (a) before the window signal is switched, the sync wave number counter 35 counts the sync wave number simultaneously with the input of the detection pulse. Then, the detection pulse from the sync pattern detection circuit 29 is 1 block signal and 0.
Since the count number is different from that of the 5 block signal, the sync length determination circuit 36 determines whether the 1 block signal is a signal of 0.5 blocks or more according to the count value from the sync wave number counter 35, and FIG. As in i), the signal of 0.5 block or more and the signal of 1 block are discriminated and both signals are output to the frame synchronization protection circuit 37, and the signal of 0.5 block or more is output to one input terminal of the AND circuit 38.

On the other hand, from the signal as shown in FIG. 13 (b) from the head switching pulse generation circuit 12, the ATF1 signal generation circuit 39
Thus, a pulse signal as shown in FIG. 13 (c) is transmitted at a timing synchronized with ATF1 in each track A, B as shown in FIG. 13 (a). Then, in the area selection circuit 40, from the signal from the head switching pulse generation circuit 12 and the signal from the ATF1 signal generation circuit 39, in the case of even speed reproduction in the variable speed reproduction mode, an even speed signal is input from the system controller 15. Therefore, a signal as shown in FIG. 13 (d) (a signal synchronized with ATF1 of track A) is transmitted, and in the case of odd speed reproduction, the first signal is transmitted.
A signal as shown in FIG. 3 (e) (a signal synchronized with each ATF 1 of tracks A and B) is transmitted and input to the other input terminal of the AND circuit 38.

At this time, in the variable speed reproduction mode, since the 1x speed signal is not input to the switch 32 from the system controller 15, the contact of the switch 32 is switched contrary to the illustration. Therefore, the sync signal is output from the AND circuit 38.
When the output of 0.5 block signal or more (including 1 block signal) is output from the sync length determination circuit 36 and the selected ATF1 signal is output from the area selection circuit 40, the output signal of FIG. The gate signal as shown in j) is output to the AND circuit 31. Therefore, the AND circuit 31 receives the second pulse signal P ₂ from the pulse generating circuit 30.
Is output, the sampling signal SP ₂ is output to the _second sampling circuit 25. As a result, the second sampling circuit 25 holds the output signal as shown in FIG. 11 (g) from the subtractor 24 when the sampling signal SP ₂ is input.
Then, the held output is sent to the adder 10 as a tracking error signal.

[Problems to be solved by the invention]

By the way, as described in the above-mentioned conventional example, the ATF detected by the heads 1a and 1b at the time of odd-number speed reproduction.
Since the tracking error voltage is obtained from 1, the tracking error voltage can be obtained from the ATF1 detected by the head 1b even if the head 1a is clogged. Therefore, the capstan motor 6 is driven by this tracking error voltage. However, in the case of even speed reproduction, the tracking error voltage is obtained by the ATF1 from the head 1a, so that the head 1a is used for a long time and the magnetic powder of the tape T is accumulated in the magnetic gap portion. When the recording on the tape becomes unreproducible due to clogging, the data (music signal) can be reproduced by the other head 1b, but the tracking error voltage is not obtained by the ATF1 from the head 1b. Therefore, the tracking error voltage cannot be obtained. Therefore, there is a problem that the tracking servo of the capstan motor 6 cannot be performed, the tape runs away, and the reproduction is finally impossible.

[Object of the Invention]

The present invention is intended to solve the above-mentioned problems, and when one head reproducing an ATF signal during even-speed reproduction becomes inoperable due to clogging or the like, the other heads remaining are reproduced. The ATF signal is detected by, and thereafter, the tracking error voltage is obtained by the ATF signal from the other head to perform the tracking servo of the capstan motor. Therefore, the tape may run out and the reproduction may be impossible. An object of the present invention is to provide a servo circuit in a recording / reproducing device.

[Outline of Invention]

In order to achieve the above-mentioned object, according to the present invention, only one area is selected from four ATF areas in one frame at the time of even speed reproduction, and a tracking error voltage due to an ATF signal is obtained by one head to obtain a cap. The gist is that tracking servo voltage is applied to the stun motor, and when the head is in a reproduction disabled state, the other head detects the ATF of one area to obtain the tracking error voltage.

Example of Invention

A first embodiment of the present invention will be described with reference to the block diagram of FIG. The same reference numerals as those in FIG. 6 of the conventional example described above indicate the same circuits, and the description thereof will be omitted.

The area selection circuit 40 according to the present invention includes an exclusive OR circuit 40a (hereinafter referred to as an EX OR circuit) to which a head switching pulse and an output from a D-type flip-flop 51 described later are input, and an EX OR circuit 40a. An AND circuit 40b to which the output, the ATF1 signal from the ATF1 signal generating circuit 39, and the even speed signal are input
And an AND circuit 40c to which the ATF1 signal from the ATF1 signal generating circuit 39 and the odd-numbered speed signal are input, and an OR circuit 40d to which outputs from the AND circuits 40b and 40c are input.

Reference numeral 41 is a timing generation circuit that sends a reset pulse every 4 frames by a head switching pulse and sends a high-level and low-level latch pulse every 2 frames, and 42 is a 0.5 from the sync length determination circuit 36.
An AND circuit to which the signals of the blocks and above and the P ₂ signal from the pulse generating circuit 30 are input, 43 is an AND circuit to which the output from the AND circuit 42 and the output from the inverter 44 that reflects the head switching pulse are input and output, 45 The output of the AND circuit 43 is input to the set terminal, and the reset pulse from the timing generation circuit 41 is input to the reset terminal.
Is an AND circuit to which the output from the AND circuit 42 and the head switch pulse are input, and 47 is the AND circuit 46.
Output to the set terminal and a reset pulse from the timing generation circuit 41 to the reset terminal is input to the RS flip-flop for the head 1b. Reference numeral 48 denotes an EX OR circuit to which outputs from the RS flip-flops 45 and 47 are input. 49 is the output from the RS flip-flop 45 and EX
An OR circuit to which the output from the inverter 50 for inverting the output from the OR circuit 48 is input, and 51, the output from the OR circuit 50 is input to the data terminal and the latch pulse from the timing generation circuit 41 is input to the clock terminal. It is a D-type flip-flop.

Hereinafter, the circuit operation of FIG. 1 will be described with reference to the timing chart of FIG.

The heads 1a and 1b are R-shaped as shown in FIG. 2 (a) for each frame.
In addition to detecting the F signal, a head switching signal as shown in FIG. 2 (b) is sent from the head switching pulse generating circuit 12, so that a sync signal of 0.5 blocks or more is detected by the same operation as the above-mentioned conventional example. Then, the sync length determination circuit 36 outputs a pulse signal as shown in FIG. Then, the second pulse from the pulse signal and the pulse generation circuit 30 which has detected the sync signal of 0.5 blocks or more.
Since the pulse signal P _{2 of} is output to the AND circuit 42,
The output is sent from the AND circuit 42. A low level head switching signal indicating that the head 1a is detecting an RF signal while the output from the AND circuit 42 is being sent is a head switching pulse generation circuit 12
When a high level output is input to the AND circuit 43 via the inverter 44, the RS flip-flop 45 is set and outputs an output as shown in FIG. 2 (f).

In this state, the timing generation circuit 41 causes the timing chart shown in FIG.
When the reset signal as shown in (e) is input to the RS flip-flop 45, the RS flip-flop 45 temporarily becomes low level, but the output from the sync length determination circuit 36 and the second from the pulse generation circuit 30 are set. When the pulse signal P ₂ is output, the RS flip-flop 45 is set again and outputs the output.

On the other hand, the RS flip-flop 47 also outputs an output until a reset signal is input. When the reset signal is input, the RS flip-flop 47 temporarily becomes low level, but the output from the AND circuit 42 and the head switching pulse are input. Then, it is set again as shown in FIG. 2 (g) and the output is sent. The outputs from the RS flip-flops 45 and 47 are EX
When input to the OR circuit 48, the EX OR circuit 48 outputs a low level output, so that the output is the inverter 5
It is inverted through 0 and input to the OR circuit 49. Therefore, when a high level output as shown in FIG. 2 (h) is sent from the OR circuit 49, the D-type flip-flop 51 to which the latch pulse is input from the timing generation circuit 41 is output as shown in FIG. 2 (i). Such a high level signal is output.

Since this signal is input to the EX OR circuit 40a of the area selection circuit 40, the EX OR circuit 40a operates when the head switching pulse is at a low level, that is, the head 1a.
Is selected and the output is sent to the AND circuit 40b when the sync signal from the head 1a is detected. Since the even speed signal and the ATF1 signal output by the ATF1 signal generation circuit 39 are input to the AND circuit 40b, the output is output to the OR circuit 40d when all of these signals are input. Therefore, since the output sent from the OR circuit 40d is input to the AND circuit 38, when the output obtained by detecting the 0.5 block signal from the sync length determination circuit 36 is input, the AND circuit 3 is output via the switch 32.
Send output to 1. Thus, when the head 1a detects the sync signal from the AND circuit 31, the sampling pulse SP ₂ is supplied to the second sample and hold circuit 25.
Is transmitted, the second sample and hold circuit 25
The tracking error voltage output from the head 1a
Becomes a voltage when ATF1 of track A is detected, and thereafter, the capstan motor 6 is subjected to tracking servo by this tracking error voltage.

Even when the 0.5 block signal detected by the head 1b, a high level signal is sent from the D-type flip-flop 51, the EX OR circuit 40 of the area selection circuit 40
Since the head switching pulse input to one side of a is high level, the output from the EX OR circuit 40a becomes low level. Therefore, the sampling pulse is not transmitted from the AND circuit 31 and the tracking error signal is not transmitted.

Next, a case where the head 1a is clogged and the RF signal cannot be detected will be described.

In the above operation, the reset signal from the timing generation circuit 41 is input to the RS flip-flop 45,
Since there is no output from the AND circuit 42 after being reset, the RS flip-flop 45 is not set and does not output an output. Therefore, the output from the OR circuit 49 becomes low level, and when the latch pulse output from the timing generation circuit 41 falls, the output of the D-type flip-flop 51 becomes low level and the output thereof becomes the area selection circuit 40. Is input to the EX OR circuit 40a. Therefore, the high-level output from the head switching pulse generation circuit 12 that selects the head 1b is output to the EX OR circuit 4
0a, the EX OR circuit 40a sends an output from the area selection circuit 40 to the second sample and hold circuit 25 from the AND circuit 31 at the timing when the head 1b detects the ATF1 of the track B. Since the sampling pulse SP ₂ is output for the tracking error voltage, the tracking error voltage becomes the voltage detected by the head 1b. After that, the capstan motor 6 is controlled by this tracking error signal.

In the above embodiment, the clogging state of the head 1a is detected from the sync signal detection rate, but in the second embodiment of FIG. 3, it is detected from the RF signal. Then, as a circuit, the signal applied to the AND circuit 42 is compared with the RF window signal from the window signal generation circuit 34 and the RF signal detected by the detector 52 with the comparison voltage of a predetermined level by the comparator 53. The difference is that it is an output signal, and its operation depends on the RF window signal as shown in FIG. 4 (k) output from the AND circuit 42 and the RF detection signal as shown in FIG. 4 (j). Since the operation is the same as the first operation except that it is sent out, the description is omitted.

〔The invention's effect〕

As described above, the present invention is
When one head is selected from four areas in the frame by one head to obtain the tracking error voltage by the ATF, the head detecting the ATF causes a clogging and cannot be detected. At that time, I switched to another head to detect ATF.
Even if one head is clogged, the capstan motor is always controlled by the stable tracking servo, and the faithful reproduction can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram of an ATF circuit showing a first embodiment of the present invention, FIG. 2 is a timing chart diagram of the same, FIG. 3 is a block diagram of an ATF circuit showing a second embodiment, and FIG. Is a timing chart of the same as above, FIG. 5 is a block diagram showing the entire conventional configuration, FIG. 6 is a block diagram of the above ATF circuit, FIG. 7 is a diagram showing an ATF track pattern, and FIG. 9 is a diagram showing an ATF detection state at a time, FIG. 9 is a diagram showing an ATF detection state at an even speed reproduction, FIG. 10 is a diagram showing an ATF detection state at an odd speed reproduction, and FIGS. 6 is a timing chart of the circuit of FIG. 6 ... Capstan motor, 12 ... Head switching pulse generation circuit, 13 ... RF signal reproduction amplifier, 14 ... AT
F circuit, 15 ... System controller, 23, 25 ... Sample and hold circuit, 40 ... Area selection circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masafumi Nakamura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock company Hitachi Appliances Research Laboratories (72) Inventor, Taihei 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa (56) Reference JP-A-64-49150 (JP, A) JP-A-63-119056 (JP, A) JP-A-60-253050 (JP, A) Practical application Sho-63-52136 ( JP, U)

Claims (1)

[Claims] 1. A sync signal and a pilot signal are reproduced from an ATF signal, and a tracking error voltage is generated based on a crosstalk level difference between pilot signals of adjacent tracks based on a detection position of the sync signal. In a servo circuit in a recording / reproducing apparatus which performs tracking servo by a tracking error voltage, only one area is selected from four ATF areas of one frame by one head at the time of even speed reproduction, and a tracking error voltage by an ATF signal is obtained. And a tracking servo is applied to detect the ATF signal by selecting another head when one head detecting the ATF signal is in a non-reproducible state. circuit.