JPH0626363B2 - Padding control method by bisync protocol - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention is a padding based on a bisync protocol that makes it possible to transmit a trailing padding without performing timer control by a bisync protocol using an RS232C interface. Regarding control method.

<Prior art> The conventional padding control method by the bisync protocol changes the transition state from the state in which the communication line is not transmitting any data to the data transmission state, and vice versa, especially in each transition state To send trailing padding added after the data, of the padding characters added before and after the transmitted data for stability,
In order to send out the trailing padding completely, a monitoring routine under timer control was necessary. Explaining this concretely, for example, when the NEC μPD7201A manufactured by NEC is used as a communication controller capable of handling such a bisync protocol, a general method for transmitting each data character to a communication line is used. There is a transmission method using a transmission interrupt.

For this μPD7201A, after enabling the transmission interrupt, that is, enabling interrupts, the first transmission data is sent to this LSI.
If written to, the Tx Buffer Empty, that is, a transmission interrupt request is issued from the µPD7201A every time the written data is transmitted. Therefore, it suffices to sequentially write data to the transmission buffer of the μPD7201A by this interrupt processing routine. Repeat this to write the last data (that is, trailing padding) to the µPD7201A's transmit buffer, then if the next transmit interrupt request is generated from this LSI, determine this in the interrupt processing routine and end transmission. Perform processing. However, this transmission end processing should not be performed immediately after the transmission interrupt request is generated from the μPD7201A.

If so, the transmission interrupt request generated from the μPD7201A is
This is because, in the interrupt process before that, it occurs even if the data written in the transmission buffer of this LSI has not been completely transmitted. The transmission buffer of this LSI has a two-stage structure. When the data written in the first-stage buffer is moved to the second-stage buffer and starts to be sent to the communication line, a transmission interrupt request is issued. This is because it occurs.

In other words, in the above case, after writing the last data (that is, trailing padding) to the first-stage transmission buffer of the μPD7201A, if the next transmission interrupt request occurs, the timer control is performed by the above-mentioned interrupt processing routine.
WAIT processing is performed, and after the trailing padding is completely transmitted, the transmission end processing is performed. If this is not done, the complete transmission of trailing padding is not guaranteed.

FIG. 5 is a diagram showing the flow of the trailing padding transmission interrupt process by the timer control. First, the data counter for counting the number of remaining transmission data checks the presence of transmission data, and the transmission data still remains. If there is, μPD7201 for each byte of this data sequentially
Write to the transmission buffer of A and perform the interrupt end processing EOI (End Of Interrupt) for the interrupt request while decrementing the data counter by one.

Here, the data counter becomes 0, and when all the transmission data has been transmitted, the timer is started, WAIT until this timer times out, and after the time out,
As the transmission end processing, RTS (transmission request) is turned off and Tx In
Disable the transmit interrupt as terrupt Disable, then Tx
Disable the transmission operation as Disable, and then EOI (End
Of Interrupt) That is, an interrupt end process is performed.

<Problems to be Solved by the Invention> However, in such a conventional padding control method by the bisync protocol, WAIT processing by timer control is required in interrupt processing.
The IT time is a waste of time for the CPU, and the timer control logic is required.
Further, when this timer control is processed by using an interrupt, it is necessary to add a control logic for the timer interrupt, which is not economical.

An object of the present invention is to enable transmission of trailing padding by a bisync protocol without requiring timer control and timer interrupt logic by the CPU in the transmission interrupt processing, improving the operating efficiency of the CPU and improving the economical efficiency. It is to provide a padding control method by a bisync protocol.

<Means for Solving Problems> The present invention relates to a bisync protocol in which a modem is connected to a computer system via an RS232C interface, and data communication is performed with other devices based on the bisync protocol via the modem. In the synchronous transmission method according to, when the communication line for data transmission shifts from the state in which no data is transmitted to the data transmission state and vice versa, the padding character added before and after the data The feature is that the trailing padding data added to the rear side of is added and buffered.

<Operation> The above technical means operates as follows. When buffering the transmission data in the internal buffer of the program in the program which performs communication processing, one more trailing padding (or more) is added and buffered. When this is sent to the μPD7201A by sequential transmission interrupt, the last trailing padding is
If the next transmission interrupt is generated from this LSI after writing to the I transmission buffer and the transmission end processing is immediately performed in this interrupt processing, this last trailing padding will not be completely transmitted to the communication line. However, since one (or more) extra trailing paddings have been buffered beforehand, the first trailing padding is completely transmitted. As a result, the WAIT processing by the timer control is made unnecessary.

<Examples> Hereinafter, the present invention will be described with reference to the drawings.

FIG. 2 is a block diagram showing an example of a computer system that implements the padding control method according to the bisync protocol of the present invention. This computer system has, for example, a CPU1 including a microprocessor and the like.
Connected to the bus 2 connected to U1 is a μPD7201A communication controller 3 for achieving synchronous communication by the bisync protocol, RAM 5 for temporarily storing data, ROM 6 for fixedly storing programs and data, etc. Has been done. An RS232C interface (hereinafter abbreviated as RS232C I / F) 4 is connected to the communication controller 3, and this RS232C I / F 4 is equipped with a modem interface (hereinafter abbreviated as modem I / F) 8 via an RS232C cable. It is connected to the modem 7. The modem 7 is connected to another computer system or the like via the communication line 9,
This allows data communication with other computer systems.

FIG. 3 shows the configuration of transmission data when the computer system configured as described above performs data transmission with another computer system or the like via the communication line 9 in accordance with the bisync protocol. Incidentally, FIG. 3 shows, as an example, a data structure in the case of transmitting the inquiry control character ENQ in the bisync protocol.
In FIG. 3, PADL represents leading padding and PADT represents trailing padding, and are sequentially sent to the communication line.

FIG. 4 shows the state of the transmission buffer in the trailing padding control method according to the present invention. As shown in this figure, one extra PADT, that is, trailing padding (or more) is added to the data and set in the transmission buffer inside the program. In such a case, the trailing padding can be transmitted without controlling the timer at the end of data transmission as shown in the transmission flow of FIG. That is, in FIG. 1, first, the transmission data counter checks the rest of the data, and if there is still transmission data, one byte of data is written in the transmission buffer of the μPD7201A, the data counter is decremented by one, and then the interrupt end processing EOI ( End Of
Interrupt). When the transmission data counter reaches 0 and transmission of all data is completed, after turning off RTS (transmission request signal) and outputting, Tx Int Disable
The transmission interrupt is disabled as, and the transmission operation is disabled as Tx Disable, and then the interrupt end processing is performed.

In the above embodiment, the communication controller 3 has a μPD.
The case where the 7201A is used has been described, but the present invention is not limited to this LSI and can be applied to other elements having the same function.

<Effects of the Invention> As described above, according to the present invention, when the trailing padding is transmitted by the bisync protocol, by buffering one (or more) trailing paddings in the internal buffer of the program, Since the WAIT operation by the timer control in the transmission interrupt processing is not required, the CPU can perform other processing correspondingly and is efficient, and it is not necessary to add a control logic such as a timer interrupt, which is economical. Is.

[Brief description of drawings]

FIG. 1 is a flow chart showing a padding control method according to the bisync protocol of the present invention, FIG. 2 is a block diagram showing an example of a computer system for carrying out the present invention, and FIG. 3 is a structure of transmission data in the bisync protocol. FIG. 4 is a diagram showing a state of a transmission buffer for performing trailing padding control in the present invention, and FIG. 5 is a flow chart showing a trailing padding control system by a conventional bisync protocol. 1 …… CPU 2 …… Bus 3 …… Communication controller 4 …… RS232CI / F 5 …… RAM 6 …… ROM 7 …… Modem 8 …… Modem I / F 9 …… Communication line

Claims (1)

[Claims] 1. A synchronous transmission method according to a bisync protocol in which a modem is connected to a computer system via an RS232C interface, and data is communicated with other devices based on the bisync protocol via the modem. When the communication line to perform transitions from the state in which no data is transmitted to the data transmission state,
And, in the opposite state, padding control by the bisync protocol is characterized in that extra padding data for trailing padding added to the back of the data is added to the padding character added before and after the data and buffered. method.