JPH0626367B2 - Communication control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a communication control device with improved data transmission timing.

(Prior Art) For example, a communication control device used in the device of a vending machine is composed of a main control unit provided on the door side of the vending machine and a terminal provided on the main body of the vending machine. . A selection switch and a sales switch are connected to the main control unit, and a coin mech for processing coins and the like are connected. Further, a sold-out switch, a solenoid coil for carrying out products, etc. are connected to the terminal. Then, data such as the operation content of the selection switch is transmitted from the main control unit to the control unit of the terminal through the communication line. FIG. 4 is a schematic configuration diagram of such a communication control device, in which the main control unit 1
When transmitting data from the terminal to the terminal 2, a synchronizing signal is transmitted. Here, the transmission timings of the data and the synchronizing signal are set so that the synchronizing signal is at a low level and the data is transmitted after a predetermined period t has elapsed, as shown in FIG.
The specific operation will be described with reference to the transmission flow chart shown in FIG. 6. The main control section 1 sends a low level synchronizing signal in step s1 and counts the signal from the timer 3 in step s2. Then, as a result of the counting, when the predetermined period t has elapsed, the main control unit 1 proceeds to step s4.
Send the data at.

As described above, the data is transmitted for a predetermined period t after the synchronization signal is transmitted.
However, in some cases, it may not be transmitted after a predetermined period t has passed. The following table shows the permissible period range from the sending of the sync signal to the sending of the data and the actual period for that.

As can be seen from this table, in the case of standard A, the maximum value of the allowable period range is 530 μsec, which greatly exceeds the standard value of 313 μsec.
Further, in the case of standard B, the minimum value of the allowable period range is 1140 μsec, which is considerably shorter than the standard value of 1667 μsec. If the data is not sent within the allowable time range, it becomes difficult for the terminal to receive the data accurately.

(Problems to be Solved by the Invention) As described above, data may not be transmitted within an allowable period range from the time of transmitting a synchronization signal, which makes it difficult for a terminal to accurately receive data.

Therefore, it is an object of the present invention to provide a highly reliable communication control device capable of transmitting data within an allowable period range from the time of transmitting a synchronization signal.

[Structure of the Invention] (Means for Solving the Problems) According to the present invention, when a synchronization signal is received, communication for transmitting data to a terminal that starts data reception within a permissible period range from the reception of the synchronization signal. A microcomputer for transmitting data in a control device, generating a clock signal of a predetermined cycle, and transmitting a signal forcibly resetting by a level change of a synchronization signal when an abnormality occurs from a terminal, and the microcomputer. A synchronization signal generating circuit for detecting the output of the data transmitted from to generate the synchronization signal and transmitting it to the terminal, and forcibly resetting the transmission of the synchronization signal when receiving the signal of the forced reset from the microcomputer; A data transmission circuit that delays data within a permissible period based on a clock signal and sends the data to the terminal. A communication control device to be achieved the objective.

(Function) With the provision of such means, when the data is sent from the microcomputer, the synchronizing signal generating circuit detects the output of the data and generates the synchronizing signal, and at the same time, the data transmitting circuit permits the data. It is delayed within the period and sent to the terminal. As a result, the terminal starts data reception exactly within the allowable period range after receiving the synchronization signal.

In this case, when the terminal sends a signal to the microcomputer indicating that an abnormality has occurred, the microcomputer sends a signal for forcibly resetting, and thereby the sending of the synchronization signal is forcibly reset.

(Example) Hereinafter, one example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a communication control device. Reference numeral 10 denotes a microcomputer, and this microcomputer 10
Has a function of sending the data TXD from the p ₁ terminal, sending the end signal e of the synchronizing signal SYN after sending the data TXD, and sending a clock signal of 400 ns from the CLK terminal.

Reference numeral 11 denotes a synchronizing signal generating circuit which detects the falling edge of the data TXD, generates a synchronizing signal SYN and sends it to the terminal 12, and an end signal e of the synchronizing signal SYN.
In response to this, it has a function of ending the generation of the synchronization signal SYN which is at a low level for a period of 625 μs to 1667 μs. As a specific configuration, a flip-flop 13 is provided, and the end signal e of the synchronization signal is supplied to the flip-flop 13.
Is input as a set signal and the data TXD is input as an input signal. This flip-flop 1
The output terminal of 3 is connected to the inverter 15 through one end of the gate circuit 14. The other end of the gate circuit 14 is connected to the p ₃ terminal of the microcomputer 10.

On the other hand, 16 is a data transmission circuit, and this circuit 16 has a function of delaying the data TXD by a predetermined period t, for example, 104 μs to 313 μs, based on the clock signal, and sending it to the terminal 12. A specific configuration is a counter 17 that divides a clock signal by 32, and this counter 17
Of the shift register 18 which shifts the output of the clock signal by 18 clocks and outputs it. The microcomputer 10 uses the terminal 12 when transmitting the data TXD.
When an abnormality such as a runaway occurs at the terminal 12 and a signal indicating the occurrence of the abnormality is transmitted from this terminal 12, a forced reset is performed in response to this signal to set the output signal a of the p ₃ terminal to a low level for a period of 100 ms to 800 ms. Has the function of performing.

Next, the operation of the apparatus configured as described above will be described with reference to the timing chart shown in FIG. When transmitting the data TXD, the microcomputer 10 sets the output e of the p ₂ terminal to the high level and the output a of the p ₃ terminal to the high level. As a result, the flip-flop 13 is set and the output a of the p ₃ terminal is input to the gate circuit 14 as a gate signal. In this state, the microcomputer 10 receives the data T from the p ₁ terminal at time t1.
Send XD. The head of this data TXD is a start bit, and its level is low. However, this data TXD is the flip-flop 1
3 and the shift register 18.

When the flip-flop 13 detects the falling edge of the start bit of the data TXD, it sets the output signal b to the low level. As a result, the output level of the gate circuit 14 becomes high level, and the low level synchronization signal SYN is sent from the inverter 15. The terminal 12 uses this synchronization signal SY
When N is received, it is determined that the data TXD will be sent within the allowable period range from the time of reception.

On the other hand, the counter 17 frequency-divides the clock signal by 32 and sends it to the shift register 18. The shift register 18 shifts the data TXD by 18 according to the output of the counter 17, delays it, and sends it out. Specifically, when the clock signal of 400 ns is divided by 32, it becomes 12.8 μs, and by further shifting by 18, the delay period t of the data TXD is 230.4 μs.
s. Therefore, the data TXD 'is transmitted to the terminal 12 after the lapse of the period t from the transmission of the low level synchronization signal SYN. Thus, the terminal 12 receives the data TXD '. Then, the microcomputer 10 sets the output signal e of the p ₂ terminal to the high level at time t2 after a lapse of a predetermined time after sending the data TXD, and sends this signal to the flip-flop 13 as the end signal of the synchronization signal SYN. To do. As a result, the output b of the flip-flop 13
Becomes high level and the synchronization signal SYN becomes high level. Thus, the synchronization signal SYN in the period range of 625 μs to 1667 μs is created.

By the way, when an abnormality such as runaway or disconnection occurs in the terminal 12, the terminal 12 sends a signal indicating the occurrence of the abnormality to the microcomputer 10. Then, when the microcomputer 10 receives a signal indicating the occurrence of an abnormality from the terminal 12 when transmitting the data TXD, the microcomputer 10 receives this signal and outputs the output signal a of the p ₃ terminal from 100 ms to 100 ms, for example.
Low level for 800ms. As a result, the synchronizing signal SYN becomes high level, and at the time t3, the data TX
The D transmission is forcibly reset.

As described above, in the above-described embodiment, when the data TXD is transmitted, the start bit of the data TXD is detected, the synchronization signal SYN is transmitted to the terminal 12, the synchronization signal is terminated by the end signal e, and the data is transmitted. Since TXD is delayed by a predetermined period t based on the clock signal and is transmitted to the terminal 12, the data TXD can be reliably transmitted within the allowable period range from when the synchronization signal SYN becomes low level. Further, since the period of the synchronizing signal SYN and the period between the sending of the synchronizing signal SYN and the sending of the data TXD are directly controlled by the microcomputer 10, the influence of external noise can be avoided and the cost can be reduced. . Furthermore, when an abnormality such as a runaway or a wire breakage occurs in the terminal 12, the transmission of the synchronization signal SYN can be forcibly reset and the transmission of the data TXD can be forcibly reset.

Next, a case where the above-described one embodiment is applied to a vending machine will be described with reference to FIG. This figure shows the vending machine divided into a door side and a main body side, and a main control unit 20 is provided on the door side. The main control unit 20 includes the microcomputer 10, the synchronizing signal generating circuit 11 and the data transmitting circuit 16 shown in FIG. The main controller 20 is connected with an amount display 21, a coin meter 22, a selection switch, a sales lamp, a sold-out lamp, and the like. On the other hand, a terminal control unit 23 is provided on the main body side, and the terminal control unit 23 and the main control unit 20 are connected via a communication line 24. The terminal control unit 23 is connected to a bill burr 25 for treating paper defects, a sold-out switch, a solenoid, and the like.

With such a configuration, the main control unit 20 sends the low-level synchronization signal SYN to the terminal control unit 23, and sends the data TXD to the terminal control unit 23 after the elapse of a predetermined period. Therefore, the terminal control unit 23 operates the solenoid or the like according to the content of the data TXD to carry out the product.

As described above, if the device shown in FIG. 1 is applied to a vending machine, the data TXD can be transmitted in conformity with the communication system of the vending machine and reliably. Further, for example, if a runaway occurs in the terminal control unit 23 or the solenoid fails, the transmission of the data TXD can be forcibly reset at this time.

It should be noted that the present invention is not limited to the above-described embodiment, and may be modified without departing from the spirit of the invention.

[Effects of the Invention] As described in detail above, according to the present invention, the transmission of data can be started within the allowable period range of the terminal from the time when the synchronization signal is generated, the terminal can reliably receive the data, and It is possible to provide a communication control device that can forcibly reset data transmission when an abnormality occurs.

[Brief description of drawings]

1 to 3 are diagrams for explaining a communication control device according to the present invention. FIG. 1 is a block diagram, FIG. 2 is an operation timing diagram, and FIG. 3 is applied to a vending machine. FIGS. 4 to 6 are views for explaining the case, and FIGS. 4 to 6 are views for explaining the prior art. 10 ... Microcomputer, 11 ... Synchronous signal generating circuit, 12 ... Terminal, 13 ... Flip-flop, 14
... gate circuit, 15 ... inverter, 16 ... data transmission circuit, 17 ... counter, 18 ... shift register.

Claims (1)

[Claims] 1. A communication control device that, upon receiving a synchronization signal, sends the data to a terminal that starts data reception within an allowable period range from the time of receiving the synchronization signal, and sends the data together with a predetermined cycle. And a microcomputer for sending a signal for forcibly resetting due to a level change of the synchronizing signal when an abnormality is generated from the terminal, and an output of the data sent from the microcomputer. A synchronization signal generating circuit for detecting and generating the synchronization signal, transmitting the synchronization signal to the terminal, and forcibly resetting the transmission of the synchronization signal when receiving a signal for forced reset from the microcomputer; A data transmission circuit that delays the data within the allowable period range and sends the data to the terminal. A communication control device characterized by being provided.