JPH0628351B2 - Communication channel division method of spread spectrum communication system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a spread spectrum communication system (Spread spectr) using an M-sequence (maximum length sequence) code as a pseudo-noise code.
um communication method, hereinafter referred to as SS communication method), and particularly to a method of dividing the communication channel.

[Prior Art] As a communication channel dividing means in the conventional SS communication method, there is one using a different type of M-sequence code.

For example, if the code length of the M-sequence code is 127, the number of different kinds of codes is 18, and the number of communication channels is limited to a small number of 18.

[Problems of the Related Art] In the conventional communication channel dividing means as described above, the number of codes is limited to a small number when the code length of the M-sequence code used for the communication channel is not so long. However, there is a problem in that communication channels cannot be allocated sufficiently.

An object of the present invention is to solve the above-mentioned problems by previously determining the type of M-sequence code and the initial phase of the M-sequence code on both transmitting and receiving sides as a means for dividing a communication channel.

[Means for Solving the Problem] The invention of the present application is a spread spectrum communication method communication that performs required information transmission by correlating output of a pseudo noise code from a transmission side and a pseudo noise code generated at the reception side. In the channel division method, a pseudo noise code generator in which a plurality of cascaded shift registers and a feedback circuit for feeding back the output of the shift register to an initial shift register are arranged in parallel, and calculation based on key input is executed. And a microprocessor for controlling the pseudo noise code generator on both the transmitting side and the receiving side, and the microprocessors on the transmitting side and the receiving side are configured to operate the pseudo noise code generators on the basis of this key input. The first step of setting the number of stages of the shift register and the output terminal of the shift register, and based on the key input, The processor on the receiving side corresponds to the second step of setting the initial phase of the shift register that constitutes the pseudo noise code generator on the receiving side, and the setting of the first step and the second step. And a third step of configuring the pseudo noise code generator on the receiving side, and dividing the communication channel by presetting initial phases of both the pseudo noise code on the transmitting side and the pseudo noise code on the receiving side. This is a method of dividing a communication channel of a spectrum communication channel.

[Operation of the Invention] According to the present invention, the communication channel is divided by predetermining the initial phase of both the M series on the transmitting side and the receiving side in the first step, the second step, and the third step. , The transmission and reception sides use the same M-sequence code to divide the communication channel.

That is, when a predetermined key is input with the ten keys on the transmitting side and the receiving side, both microprocessors calculate and set the number of stages of the shift register and the number of the output terminal, respectively.

Subsequently, the microprocessor on the transmission side sets the initial phase of the shift register constituting the pseudo noise code generator on the reception side based on the settings made by both the ten keys.

Further, the microprocessor on the receiving side configures the pseudo noise code generator on the receiving side corresponding to each of the settings, thereby presetting the initial phases of both the pseudo noise code on the transmitting side and the pseudo noise code on the receiving side. It divides the communication channel.

For example, when the M-sequence code length is 127, in the present invention, it is possible to communicate using the same M-sequence code for transmission and reception as described above, so that the number of different codes is 18, and the number of communication channels is The product is 2286 (127x18).

EXAMPLES The present invention will be described below with reference to the drawings.

1 to 8A and B are views showing an embodiment of the present invention.

In FIG. 1, reference numeral U ₁ U ₂ is an SS transceiver provided in both transmitting and receiving stations, and the configuration of _one SS transceiver U ₁ will be described.

K ₁ is a numeric keypad, U _1a is a microprocessor system,
M ₁ is an M sequence generator, U _1b is a correlator, 1 is a correlation output terminal, and ANT ₁ is an antenna. As shown in FIG. 2, shift registers SR _{1 to} SR _n are cascade-connected to the M-sequence generator M _1, and a feedback circuit for feeding back to each shift register SR ₁ is provided in parallel with it.

The feedback circuit includes AND gates AND _{1 to} AND _n-1 and exclusive OR gates EOR _{1 to} EOR _n-1 , and feedback lines h _{1 to} h from the AND gates AND _{1 to} AND _n-1.
Exclusive OR gates EOR _{1 to} E corresponding to _n-1
It is connected to OR _n-1 .

One input terminal of the AND gate AND ₁ ~AND _n-1, the opening and closing control line j ₁ ~j _n-1 from the microprocessor system U _1a are connected.

Each of T _{0 to} T _n-1 is an output terminal for an M-sequence signal.
A convolver is used as the correlator U _2b , for example.

Then, the ten-key K ₁ is used to set the number of stages n of the shift registers SR _{1 to} SR _n necessary to generate the required M-sequence code, and the required AND operation is performed. As described below, the microprocessor system U _1a performs the required arithmetic processing and
The sequence generator M ₁ is controlled.

The other SS transmitter / receiver U ₂ is also configured in substantially the same manner as above.

Next, the principle and operation will be described in order, and the configuration thereof will also be described in detail.

A case where the two SS transceivers U ₁ U ₂ in FIG. 1 are transmitting from U ₁ to the U ₂ side will be described.

B) "State equation of transmitting side and receiving side M-sequence generators M ₁ M ₂ shown in FIGS. 2 and 3" First-stage shift register SR _{1 in} FIGS. 2 and 3
Assuming that the input signals to ~ SR ₁ are x (k) and y (k) << k represents discrete time respectively, It can be expressed as j = 1. here, Putting a (= represents a "definition"), wherein and wherein the _{x (k) = x n (} k + 1) = h 1 x n (k) + h 2 x n-1 (k) + ... + h n x 1 (k)… y (k) ＝ y ₁ (k + 1) ＝ l ₁ y ₁ (k) ＋ l ₂ y ₂ (k) ＋… ＋ l _n y _n (k)… and both equations and both equations are It can be expressed by vector and matrix like.

Sender However, Receiver However, In the above formula, for ∀k means "for any k". That is, X (k) = O for ∀k means that the vector X (k) does not become a zero vector no matter how the separation time k is selected.

And the equations are the state equations of the M-sequence generator M ₁ M ₂ on the transmitting side and the receiving side, respectively, where X (k) and Y (k) are state vectors (nx1) of the shift register, and A and B are shift states. The register state transition matrix (nxn), n is the number of stages of the shift register.

Further, h _j and l _j (j = 1 to n) are feedback lines as described above, Is. "ON" and "OFF" of the feedback lines h _j l _j are AND gates AND _{1 to} AND _n-1 and AND ' _{1 to} AN according to a control signal from the microprocessor system U _1a U _2a.
D' _n-1 is controlled to be opened / closed, and this control causes each M-sequence generator M ₁ M ₂ to generate a desired type of M-sequence code.

Note that there is the following relationship between the state transition matrices A and B (when the output code is an M sequence and has an image relationship).

AB = I _n ... That is, A = B ^-1 or B = A ^-1 ... Image relationship A ^N = B ^N = I _n ... However, N = 2 ⁿ -1; code length b) "Output terminal T _i T ' M-sequence code pattern output from _j] <Transmitting side> X (0) is the initial state of the shift register (time k = 0)
Then, the code pattern U _i output from the output terminal T _i by time k = N−1 can be expressed as follows using X (0) and A.

However here Then, the formula can be written as follows.

That is, the code pattern U _i output from the output terminal T _i on the transmission side is represented by an equation.

<Reception side> Set Y (0) to the initial state of the shift register (time (k = 0)
Then, the code pattern W _i output from the output terminal T _i by time k = N−1 can be expressed as follows using Y (0) and B.

The definition of each parameter in the equation is the same as the above equation. here The expression can be written as follows.

That is, the code pattern W _i output from the output terminal T ′ _i on the receiving side is expressed by an equation.

C) "Basic method of dividing communication channel by changing phases on both sides of transmission and reception" First, FIGS. 4 to 7A and B will be described. FIG. 4 is a model diagram of the M-sequence code input and the correlation output of both transmission and reception to the reception side correlator U _2b shown in FIG. 1, and the two M-sequence code inputs have an image relationship with each other. As shown in FIG. 5, the image relationship is a ₁ , a ₂ , ..., A _N ; transmission side M sequence code b ₁ , b ₂ , ..., b _N ; reception side M sequence code a ₁ = The relationship is such that b _N a ₂ = b _N-1 ... a _N = b ₁ .

6 and 7 show the relationship between the transmission / reception M sequence pattern existing in the receiving side correlator U _2b at time k = k ₀ and the generation timing of the correlation output at time k> k ₀ . is there.

FIG. 6 shows U at time k = k _{0 as} shown in a to d of A.
_2B is a diagram in the case where the correlation output occurs at a fixed timing at time k = k ₀ as shown in FIG. 7B even if the transmission and reception M-sequence code patterns existing in _2b are different from each other.

On the other hand, in FIG. 7, at time k = k ₀ , the M-sequence code pattern on the transmitting side existing in U _2b is common, and the M-sequence code pattern on the receiving side is phase-shifted by 1 bit as shown in a to d of FIG. In this case, the generation timing of the correlation output at time k> k ₀ shifts by ΔT as in a to d of FIG.

Here, a to d of A in the same figure and a to d of B have a corresponding relationship. In both figures, k is time, T is one cycle time of the code, N is one cycle length of the code, and ΔT is ΔT = T / 2N ...

Here, in order to perform the demodulation operation of the required transmission information in the SS receiver U ₂ , it is necessary to detect at least one correlation output within the time T of one cycle.

However, if the detection timing of the correlation output and the generation timing of the correlation output do not match, the correlation output cannot be detected.
For example, the detection timing k = k _o relative correlation output as the seventh FIG _{Bb~d, k 0 + T / 2} , ... can not be detected correlation output as.

That is, in order to surely obtain the correlation output required as the demodulation information, its generation timing and detection timing must match. In other words, if the generation timing and the detection timing are matched with each other, unnecessary correlation output as demodulation information is not detected.

Therefore, by appropriately controlling the detection timing or the generation timing, it means that the communication channel can be divided even if the same transmission / reception code (in this case, a code having an image relationship) is used as the communication code.

From the above consideration using FIGS. 6A and B and FIGS. 7A and 7B, it is understood that there are at least the following two methods for dividing the communication channel by the same M-sequence code for both transmission and reception.

<Division method I> i) The detection timing of the correlation output is fixed. For example, in FIG. 6A, a represents bit b ₁ , and FIG. 6b represents bit b _N.
In the figure c, bit b _N-1 and in the figure d, bit b ₂
The time when the approach point of the correlator U _2b shown by b in FIG. 4 is approached is the correlation output detection timing.

ii) In order to divide the communication channel, both transmitting and receiving M
The initial phase of the sequence code (ie the initial state of the left register in the M sequence generator M ₁ M ₂ on both transmitting and receiving sides) must be changed.

For this purpose, the initial phase of the code used in both transmission and reception may be decided in advance.

<Division Method II> i) The timing of the correlation output is irrespective of the phase state of the M-sequence code on the receiving side, for example, the bit b ₁ of a in FIG. 7A is the correlator U _2b indicated by b in FIG. The time when it approaches the entrance of is the detection timing of the correlation output. Therefore, if the phase of the M-sequence code on the receiving side changes, the detection timing also changes accordingly.

ii) In order to divide the communication channel, the initial phase of the M-sequence code on the transmission side may be fixed, the initial phase of the M-sequence code on the reception side may be fixed, and only the initial phase of the M-sequence code on the reception side may be changed. .

D) "More detailed description of division method I" The communication channel can be divided by applying any of the above division methods I and II. Of these two methods, the division method I will be described in more detail below. explain.

The initial state (state at time K = 0) of the left register in the M-sequence generators M _{1 and} M ₂ on both sides of transmission and reception is respectively set to X (0).
Assuming that Y (0), each M sequence generator M ₁ M ₂
The code pattern 1 cycle length (= N) U _i W _i output from the output terminal T ₁ T _{1 of the above} is already given by the equation and the equation.

The code pattern 1 cycle length (= N) U _i W _i has already been given by the equation and the equation.

Assuming that the detection timing of the correlation output is the time when the first bit of the M-sequence code on the receiving side approaches the correlator U _2b indicated by the code b in FIG. 4, the following equation must be established in order to divide the communication channel. I have to.

U _i = W _i … And the following equation is obtained.

From the above formula Then, the initial state Y (0) of the shift register on the receiving side is Is required. From the above, the procedure for obtaining Y (0) can be summarized as follows.

The above-mentioned various setting operations and calculations are carried out by the ten keys K ₁ , K ₂ and the microprocessor systems U _1a , U _2a .

At this time, the calculations in <Step 3> and <Step 4> are performed according to the pool algebra. That is, the addition is E
OR and multiplication are AND. This <Step 3>
And the calculation of the power of the matrix A performed in <Step 4> can be easily performed by the following algorithm.

A ^d calculation algorithm (I); Further consideration will be given to the calculation algorithm (I) for A ^d .

From the equation, A ^d can be expressed as follows using B.

A ^d = A ^{-N + d} = (A ^-1 ) ^Nd = B ^{Nd In the} formula, N-d = r ..., then A ^d = B ^r ..., and A ^d is calculated using the matrix B as follows. Is also required.

Calculation algorithm of A ^d (II); i) The 1st row to the (n-1) th row of B ^r-1 are directly shifted to the 2nd row to the nth row of ^Br (= A ^d ).

ii) The first row of B ^r (= A ^d ) is subject to the following operation.

However, whether r = 1 to N-2 calculation algorithm (I) or (II) is used is ^Ad.
Depends on the value of the order d.

That is, if d (N / 2) → (I) is used and d (N / 2) → (II) is used, the calculation time can be shortened.

For example, to obtain the matrix C in <Step 3>, A
^{Although (m-1) n} and A ^mn must be calculated, the orders (m-1) n and mn are (m-1), m as shown in the following table.
Since n> (N / 2), the algorithm (II) is used in this case.

From the table, r ₁ , r compared to using the values of d ₁ , d ₂
It can be seen that the use of ₂ can simplify the calculation of the power of the matrix A.

As described above in detail, according to the present invention, the initial phase of the M-sequence code on both the transmitting side and the receiving side is determined in advance by the procedure of <step 1> to <step 4> as described above, and thereby the communication channel Since I tried to split it, send it,
Even if the same M-sequence code is used, the communication channels can be divided, and the effect that it is possible to sufficiently cope with multi-users who cannot dramatically increase the number of communication channels can be obtained.

That is, since the predetermined code output phase is changed by inputting the data set by the microprocessor to each shift register, it is possible to obtain codes having different phases even if the output terminal is single, and the circuit scale is large. In addition to preventing an increase in size, it is possible to realize a flexible system configuration because program control is easy.

[Brief description of drawings]

FIGS. 1 to 7 Aa to d, FIGS.
FIG. 1B shows an embodiment of the spread spectrum communication system according to the present invention. FIG. 1 is a block diagram showing an SS transceiver on both transmitting and receiving sides, and FIG. 2 is the same as the M sequence generation equipped in the SS transmitter. FIG. 3 is a circuit diagram showing an M-sequence generator installed in the SS receiver, and FIG. 4 is a block diagram showing a correlator installed in the SS receiver.
FIG. 5 is a diagram for explaining that the transmitting and receiving M-sequence codes are in an image relationship, and FIGS. 6A to 6D are the correlation output when the initial phase of the transmitting and receiving M-sequence code is changed. FIG. 7 is a diagram for explaining the timing, FIGS. 7A to 7D, and FIG. 7B to FIG.
d is a diagram for explaining the generation timing of the correlation output when only the initial phase of the M sequence code on the receiving side is changed, and FIG. 8A is a micro when U ₁ is used as a transmitter and U ₂ is used as a receiver. FIG. 8B is a processor operation flowchart, and FIG. 8B is an operation flowchart of the microprocessor when U ₂ is used as a transmitter and U ₁ is used as a receiver. AND _{1 to} AND _n-1 , AND _{1 to} AND _n-1 ... AND gates EOR _{1 to} EOR _n-1 , EOR _{1 to} EOR _n-1 ... exclusive OR gates K ₁ and K ₂ ... numeric keypad, M ₁ M ₂ …… M series generator,
SR _{1 to} SR _n , SR _{1 to} SR _n ... Shift register,
T ₀ ~T _n-1 output terminals of the ...... M series generator, U ₁ U ₂ ...
... SS transceiver, U _1a, U _2a ...... microprocessor system, U _1b, U _2b ...... _{correlator, h 1 ~h n, l 1} ~l
_n ...... Feedback line, 1, 2 ...... Correlation output terminal.

Claims (1)

[Claims] 1. A spread spectrum communication method communication channel division method for performing required information transmission by a correlation output between a pseudo noise code from a transmission side and a pseudo noise code generated at the reception side, wherein the cascade connection is performed. A plurality of shift registers and a pseudo-noise code generator in which a feedback circuit for feeding back the outputs of the shift registers to the first-stage shift register is arranged in parallel, and the pseudo-noise code generation by executing calculation based on a key input. A microprocessor for controlling the transmitter and the receiver, and the microprocessor on the transmitter side and the receiver side set the number of stages and output terminals of the shift register of each code generator based on the key input. The first step, and based on the key input, the transmitter microprocessor causes the transmitter code generator to operate. Corresponding to the first step and the second step of setting the initial phase of the shift register constituting the above-mentioned step, the microprocessor on the receiving side constitutes the code generator on the receiving side. A third step of calculating and setting a desired phase of the shift register, wherein the communication channel is divided by presetting an initial phase of both the pseudo noise code on the transmitting side and the receiving side. Communication channel division method of spectrum communication channel.