JPH0630368B2 - Semiconductor characteristic measuring device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor characteristic measuring apparatus capable of easily obtaining the thickness of an impurity layer of a semiconductor to be measured.

<Prior art example> A semiconductor element obtains desired characteristics by diffusing impurities into a silicon wafer, and it is important to measure the thickness of an impurity layer.

Conventionally, in order to obtain the thickness of the impurity layer, a technique in which surface resistance measurement and etching are combined and a technique in which a semiconductor to be measured is polished to a minute angle and measured are used. FIG. 7 shows a flow chart of a technique for obtaining the thickness of the impurity layer by repeating surface resistance measurement and etching. That is, the process of slightly etching the surface of the semiconductor to be measured to obtain the etching thickness and measuring the surface resistance thereof is repeated until the impurity layer is removed. In order to obtain the thickness of the impurity layer, it is usually necessary to perform this step 50 to 100 times.

FIG. 8 shows a technique for obtaining the thickness of the impurity layer by polishing the semiconductor to be measured into minute angles. In FIG. 8, 1 is a semiconductor to be measured, and 2 is a means for measuring the surface resistance. The semiconductor 1 to be measured is obliquely polished at a minute angle θ of about 20 ′ to 5 °, and the surface resistance of this polished surface is measured at narrow intervals. If the boundary position of the impurity layer is known, the thickness of the impurity layer can be calculated from the polishing angle θ.

There is a relation between the surface resistance ρ of the semiconductor and the impurity concentration N: ρ = (Neμ) ⁻¹ e: electric charge μ: mobility of majority carriers. Therefore, the boundary of the impurity layer can be determined by measuring the surface resistance.

<Problems to be Solved by the Invention> However, such a technique for measuring the thickness of an impurity layer has the following drawbacks. In the technique of repeating surface resistance measurement and etching, it is necessary to repeat the steps of etching, etching thickness measurement and surface resistance measurement 50 to 100 times. There must be. Therefore, it takes a lot of time for the measurement, and when the sample is attached to and detached from the jig or the like, the sample may be soiled or damaged, which may make the measurement impossible.

In addition, in the technique of polishing with a minute angle for measurement, it is difficult to polish with a minute angle, and the error increases if the polished surface is not flat. Furthermore, since it is difficult to control the polishing angle, it is necessary to measure the polishing angle with an electron microscope or the like.

<Object of the Invention> An object of the present invention is to provide a semiconductor characteristic measuring apparatus capable of measuring the thickness of an impurity layer in a short time with a simple structure.

<Means for Solving Problems> In order to solve such problems, the present invention forms a etching tank by closely contacting with a semiconductor to be measured in a semiconductor characteristic device for determining the thickness of a semiconductor impurity layer. A holder, an electrode provided in the etching tank so as to be separated from the semiconductor to be measured, a power supply for supplying a current between the electrode and the semiconductor to be measured, and an output voltage or current of the power supply is measured. It comprises a measuring means and a calculating means for obtaining the thickness of the impurity layer based on the output of the measuring means.

In addition, a light source for irradiating the semiconductor under test with light having an intensity related to the output current when the output current of the power source becomes a predetermined value or less is added to such a configuration.

<Operation> A power supply causes a current to flow between the power supply and the semiconductor under test,
The semiconductor under test is etched. The etching amount is proportional to the integral value of the current flowing through the semiconductor to be measured, and the output current or output voltage of the power source changes greatly at the boundary of the impurity layer. Ask for Furthermore, since etching is difficult to proceed with an n-type semiconductor, the semiconductor to be measured is irradiated with light to proceed with etching.

<Example> FIG. 1 shows an example of a semiconductor characteristic measuring apparatus according to the present invention. In FIG. 1, 1 is a semiconductor to be measured, and 3 is an impurity layer on the semiconductor to be measured. Reference numeral 5 is an outer cylinder, 6 is an etching solution discharge port opened in the outer cylinder, 7 is a press-fitting member press-fitted into the outer cylinder 5, and 8 is an etching solution introducing port opened in the press-fitting member 7. A holder is composed of the outer cylinder 5 and the press-fitting member 7, and is in close contact with the semiconductor 1 to be measured. Reference numeral 9 is an electrode, and 10 is an electrode holding material to which the electrode 9 is fixed.
A guide port 11 is opened in the electrode holding material 10. Electrode 9
A plurality of guide holes 11 are uniformly formed in the electrode holding material 10. The semiconductor 1 to be measured, the outer cylinder 5, the press-fitting member 7 and the semiconductor 1 to be measured form an etching bath 12 and are filled with an etching solution. Reference numeral 13 is a terminal that is electrically connected to the electrode 9, and 14 is a terminal that is connected to the semiconductor 1 to be measured. A constant voltage source 15 and an ammeter 16 are connected in series between the terminals 12 and 13 so that the terminal 14 has a positive polarity. The output of the ammeter 16 is input to the calculation means 17.

Next, the operation of this embodiment will be described. The impurity layer 3 of the semiconductor 1 to be measured is p-type and the other portions are n-type. The etching solution is introduced from the etching solution introduction port 6, passes through the introduction port 11 to fill the etching tank 12, and is discharged from the etching solution discharge port 6. When a current is applied between the terminals 13 and 14 by the constant voltage source 15 while the etching bath 12 is filled with the etching solution, the impurity layer 3 is gradually etched. The change in current at this time is shown in FIG. While the current is almost constant while the impurity layer 3 is being etched, the current sharply decreases at the time T _o when the impurity layer 3 disappears and the n-type layer is exposed. At this time, the thickness of the impurity layer is proportional to the integrated value of the current I (t) flowing through the semiconductor under test 1 as shown in the equation (1).

K = proportional constant S = etching area This current I (t) is measured by the ammeter 16 and the calculation means 17 calculates the equation (1) to obtain the thickness d of the impurity layer.

In the embodiment of FIG. 1, when the impurity layer 3 is n-type, it is biased in the reverse direction, so that almost no current flows and etching does not proceed. An example of such a case is shown in FIG. The same elements as those in FIG. 1 are designated by the same reference numerals,
The description is omitted. In FIG. 3, 19 is a light source,
The output light irradiates the semiconductor 1 to be measured through the guide hole 11. Reference numeral 20 denotes a control means, which receives the output of the ammeter 20 and controls the light source power source 21. The light source power supply 21 supplies power to the light source 19.

Next, the operation of this embodiment will be described. When the semiconductor is irradiated with light, electrons and holes are generated at the interface between the semiconductor and the etching liquid, a current flows, and etching proceeds. Constant voltage source 15
The current I flowing from the to-be-measured semiconductor 1 is detected by the ammeter 16, and when the current becomes equal to or less than the predetermined value Ith, the control means 20 adjusts the output power of the light source power source 21 to irradiate the measured semiconductor 1. The intensity L of the light is set to L = A (I-Ith) A = proportional constant.

FIG. 4 shows the time variation of the current flowing through the semiconductor under test 1. In FIG. 4, a shows the case where the impurity layer 3 is n-type and the p-type is below it, and b shows the case where the impurity layer 3 is p-type and the n-type is below it. In FIG. 4a, the impurity layer 3
However, the current does not flow because it is an n-type, but light irradiation occurs and eventually the current of I _PH flows. When it reaches the bottom of the impurity layer 3, since it is p-type below, it is reverse-biased and only a current of I _NV flows. That occurs sharp decline in current at time T _o, it can be detected bottom of the impurity layer 3. In FIG. 4b, a large current flows because the impurity layer 3 is p-type. When the entire impurity layer is etched, the n-type is exposed, so the current becomes small, light irradiation occurs, and eventually the current I _PH flows. In this case sharp decrease of the current is generated at time T _o. The thickness of the impurity layer 3 is the same as that of the embodiment shown in FIG.
The calculation is performed by using the equation (1).

FIG. 5 shows an embodiment using breakdown in a reverse bias state without performing light irradiation. The same elements as those in the embodiment of FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. Fifth
In the figure, 22 is a constant current source, 23 is a voltmeter that measures the voltage across the constant current source 22, and 24 is an ammeter 16 and a voltmeter 2.
3 is an arithmetic means to which the output of 3 is input.

Next, the operation of this embodiment will be described with reference to FIG. Sixth
In the figure, a indicates that the impurity layer 3 is n-type and p is below it.
b shows the case where the impurity layer 3 is p-type and the underlying layer is n-type.
In FIG. 6A, since the impurity layer 3 is n-type, a current hardly flows, and the voltage across the constant current source 22 becomes the voltage V _s that breaks down the Schottky barrier between the etching solution and the impurity layer 3. . When the impurity layer 3 disappears, since it is p-type below, the voltage across the constant current source 22 drops to the voltage V _pn that breaks down the pn junction, and the time T _o can be determined. Further, in FIG. 6B, since the impurity layer 3 is p-type, a current easily flows, and the voltage across the constant current source 22 becomes a low value. However, when the impurity layer 3 disappears, the voltage that breaks down the Schottky barrier. Soar to V _s . This sudden change is detected by the voltmeter 23, and the thickness d of the impurity layer 3 is calculated by the calculation means 24 by the equation (1).
If the output current of the constant current source 22 is sufficiently stable, the ammeter 16 is unnecessary and the current flowing through the semiconductor under test 1 may be a constant.

<Effects of the Invention> As specifically described above with reference to the embodiments, in the present invention, the semiconductor to be measured is etched by applying a current, and the sudden change point of the current or the output voltage of the power supply is detected, and the sharp change point is reached. The thickness of the impurity layer was calculated from the current flowing through the semiconductor to be measured. Therefore, the semiconductor to be measured can be automatically measured only by attaching it once to the device, and the measurement time can be greatly reduced. Further, since it is not necessary to attach and detach the jig many times, the semiconductor to be measured is not contaminated. Furthermore, since no special technique such as fine-angle polishing is required, anyone can easily measure.

Further, since the semiconductor to be measured is irradiated with light and the intensity of the light is controlled by the current flowing through the semiconductor to be measured, it is possible to measure even an n-type impurity layer having a high breakdown voltage.

[Brief description of drawings]

FIG. 1 is a configuration block diagram showing an embodiment of a semiconductor characteristic measuring apparatus according to the present invention, and FIGS. 2 and 4 are characteristic curve diagrams showing changes in current flowing in a semiconductor to be measured, FIG. 3, and FIG. 5 is a structural block diagram showing another embodiment of the semiconductor characteristic device according to the present invention, FIG. 6 is a characteristic curve diagram showing changes in the voltage across the constant current source, and FIGS. 7 and 8 are prior arts. It is a figure for explaining. 1 ... Semiconductor to be measured, 3 ... Impurity layer, 5 ... Outer cylinder, 7
... Press-fitting member, 9 ... Electrode, 12 ... Etching layer, 1
5 ... constant voltage source, 16 ... ammeter, 17, 24 ... arithmetic means, 19 ... light source, 20 ... control means, 21 ... light source power source, 22 ... constant current source, 23 ... voltage Total.

Claims (2)

[Claims] 1. A semiconductor characteristic measuring apparatus for determining the thickness of an impurity layer of a semiconductor to be measured, comprising: a holder which forms an etching tank by contacting the semiconductor to be measured; and a holder which is separated from the semiconductor to be measured. The electrode installed in the bath, the power supply for supplying a current between the electrode and the semiconductor to be measured, the measuring means for measuring the output of the power supply, and the output of the measuring means are input to obtain the thickness of the impurity layer. An apparatus for measuring characteristics of a semiconductor, comprising: an arithmetic means for calculating the height. 2. A semiconductor characteristic measuring apparatus for determining the thickness of an impurity layer of a semiconductor to be measured, comprising: a holder which forms an etching bath by contacting the semiconductor to be measured; The electrode installed in the bath, the power supply for supplying a current between the electrode and the semiconductor to be measured, the measuring means for measuring the output of the power supply, and the output of the measuring means are input to obtain the thickness of the impurity layer. And a light source for irradiating the semiconductor under test with light having an intensity related to the output current when the output current of the power source becomes a predetermined value or less. Characteristic measuring device.