JPH0650524B2 - Mask processing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a mask processing method for performing thinning, thickening, edge extraction, filtering, etc. of an input image, and in particular, the center shown in FIG. The present invention relates to a mask processing method for a mask in which mask coefficients are symmetrically arranged with respect to a passing line.

[Conventional technology]

FIG. 8 illustrates a conventional mask processing method.
As shown in FIG. 8, conventional (2K + 1) × (2L + 1)
When performing mask processing of the size of, the input image A (x,
Each time x = p−K to p + K and y = q−L to q + L of y) is read, the sum of products with the mask coefficient is performed to obtain one pixel (p, q) of the output image.

[Problems to be solved by the invention]

In the above-mentioned conventional method, (2K +
When the mask processing of 1) × (2L + 1) is performed, M × N × (2K) is required for reading the input image and writing the output image.
+1) × (2L + 1), M × N are required. Generally, the memory inside the processor is fast but has a small capacity, and the memory for storing an image is large but not so fast.
For this reason, in the conventional method, it takes a long time to process because many accesses are made to the memory containing the images. An object of the present invention is to provide a mask processing method capable of reducing the number of times of accessing such a memory and processing at high speed.

[Means for solving problems]

According to the method of the present invention, a storage unit that stores an M × N input image, an M × N output image, and a M × (L + 1) × (2L + 1) first work area, and a read address of the input image ( x = 0 for each y, and x = 0 for each y.
~ M-1 to generate an input image reading means for reading the input image, (2K + 1) x (L + 1) mask area and (2K + 1) x (L + 1) second work area are stored to store the input image. The reading means uses the read address (p,
Each time one pixel of (q) is read, the read address (j, k) of the mask area is j = 0 to 2K, k = 0 to L.
The read / write address (l,
m) as l = Modulo (p | (2K + 1)) to Modulo
((P + 2K) | (2K + 1)), m = 0 to L The first
As the write address (g, h, i) of the work area of i = Modulo (q | (2L + 1)), h = 0 to L, g = p
-K is generated and the value of the input image read by the input image reading means and the value read from the mask area (K +
1) × (L + 1) Max coefficients and the sum is added to the value read from the second work area to update the value.
Work area of 1 = Modulo (p | (2K + 1)), m
= 0 to L part is written in the first work area Writing means in the first work area, and the first work area writing means writes the one pixel in the first work area each time the first work area is written in the first work area. As a read address (g, h, i) of the work area of g = p−K, i = Modulo ((q +
s) | (2L + 1)), h = | s |, s = -L to L are generated and read from the first work area (2L +
1) a summing means for summing the values, and a write address (x,
y) has x = p−K, y = q−L, and has an output image writing means for writing as an output image, and the mask coefficients having the same value are symmetrical with respect to the center of the mask on the two-dimensional arrangement. A mask process of size (2K + 1) × (2L + 1) is configured to obtain one pixel of the output image each time one pixel is read from the input image by holding the intermediate result in the first and second work areas. To be done.

〔Example〕

 Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 3 shows the principle of the present invention. Here, the following conditions are assumed.

Input image A (x, y) x = 0 to M-1, y = 0 to N-1 Output image C (x, y) x = 0 to M-1, y = 0 to N-1 First work Area W (g, h, i) g = 0 to M-1, h = 0 to L, i = 0 to 2L Second work area B (l, m) l = 0 to 2K, m = 0 to L Mask area M (j, k) j = 0 to 2K, k = 0 to L The processing when the pixel A (p, q) is read from the input image will be described.

First, the coefficient M (j, k) is set to j = 0 to 2 from the mask area.
K, k = 0 to L are sequentially read, and this is multiplied by A (p, q), and this value is used as the second work area B.
L = Modulo ((p + 2K) | (2K +) of (l, m)
1)) to Modulo ((p | (2K + 1)), m = 0 to L, and write back to the same address.
Is a surplus, and the second work area of size (2K + 1) × (L + 1) is used cyclically. This can be expressed by the following equation.

B (l, m) = B '(l, m) + M (j, k) A (p, q) l = Modulo ((p + 2K + j) | (2K + 1)) m = k = 0 to L, j = 0 to 2K (1) B '= B before update This state is shown in FIG. That is, each time one pixel of the input image is read by this processing, the content of the second work area corresponding to the output image pixel affected by the pixel is multiplied by the mask coefficient to accumulate the value.

Further, when the processing of the equation (1) is completed, the l = Modulo (p | (2K + 1)) column of the second work area is transferred to the first work area. That is, W (g, h, i) = B (Modulo (p | (2K + 1)), m) m = h = 0 to L (2) g = pK, i = Modulo (q | (2L + 1)) A value obtained by accumulating the necessary number of times among the accumulated values in the second work area is moved to the first work area. The first work area prepares an area half the size in the column direction by utilizing the fact that the mask is symmetric in the column direction as shown in FIG. 4, and the purpose is to hold the value multiplied by the mask coefficient in advance. And

Further, when reading up to the 2L + 1th line, the values are filled in all of the first work area, and (g, L, 0) of (g, h, i) of the first work area, (g, L-1,
1), (g, L-2, 2), ... (g, 0, L), (g,
1, L + 1), ..., (g, L, 2L) are read out in order and summed to obtain the (L + 1) th line of the output image. Generally, the q-th line of the output image is expressed by the following equation.

By the above processing, by having M × (2K + 1) × (L + 1) first work area and (2K + 1) × (L + 1) second work area, (2K + 1) × (2
L + 1) mask processing can be performed.

8 × 8 applied to 3 × 3 mask in FIGS. 6 and 7.
The numerical values of the embodiment for the input image of are shown. As an example, for q = 5, FIG. 7 is a diagram for obtaining B (l, m) from the above equation (1) and for obtaining W (g, h, i) from the equation (2), and FIG. 6 is obtained. Output image of the q-th line from W (g, h, i)
It is a figure calculated by the equation (3).

FIG. 1 shows an embodiment of an apparatus that specifically realizes this method. In FIG. 1, reference numeral 1 is an image memory which stores an input image, an output image, and a first work area. Reference numeral 2 is a read address generation unit that generates a read address for reading the input image and reads the input image, and reference numeral 3
Stores the intermediate result in the second work area inside by multiplying the value of the input image read out by the read address generator 2 by the mask coefficient stored inside beforehand, and stores this part in the image memory 1 And the reference numeral 4 is a summation section for summing the values obtained by reading the first work area stored in the image memory 1, and the reference numeral 5 is a summation section 4. Is a write address generation unit that generates an address for storing the total sum value of the output image. That is, the image memory 1 and the read address generation unit 2 realize the above expressions (1) and (2), and the sum of products unit 3 and the summation unit 4 realize the above expression (3). In addition, control signals for controlling the execution order of each unit are transmitted from the read address generation unit 2 to the product sum unit 3, and from the product sum unit 3 to the general affairs unit 4.
To the write address generator 5 in order. Furthermore, for reading new input pixels,
A control signal is sent from the write address generation unit 5 to the read address generation unit 2.

FIG. 2 shows another embodiment of the apparatus that specifically realizes this method. In this example, the input image reading unit and the first work area writing unit are realized by one processor, and the first work area reading unit and the output image writing unit are realized by another processor. This is an apparatus that includes a processing unit in which the processors 22, 23, and 24 are connected in a ring shape, and an image memory that stores images. The input memory, the output image, and the first work area are stored in the image memory, the second work area and the mask area are stored in the memory inside the processors 23 and 24, and the processing is speeded up. It In other words, in the conventional method, a total of 64 with 3 × 3 × 8 × 8 inputs and 8 × 8 outputs.
Although the image memory is accessed 0 times, according to the present embodiment, 8 × 8 input, 8 × 8 output, and 8 × 8 × 2.
Work memory write and read 8 × 8 × 3, total 4
It will be accessed 48 times. Considering that an image is generally larger than 8 × 8, the difference in the number of times the image memory is accessed is further increased.

〔The invention's effect〕

When (2K + 1) × (2L + 1) mask processing is performed on an M × N image, the number of accesses to the image memory is M × N × (2K + 1) × (2L + 1) for reading and M × N for writing.
The total was M × N × (2L + 2K + 4KL + 2), but according to the present invention, 2M × N for image read / write and M × N × (3L + for read / write of the first work area.
In 2), the total is M × N × (3L + 4). Therefore, there is an effect that access to the image memory is reduced and the processing can be speeded up.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an embodiment using three processors, FIG. 3 is an explanatory view showing the principle of the present invention, and FIG. 4 is a target mask. FIG. 5 is an explanatory diagram for explaining writing to the second work area, and FIGS. 6 and 7 are examples of image value conversion when 3 × 3 mask processing is performed. FIG. 8 is a diagram showing a conventional mask processing method. 1, 21 ... Image memory, 2 ... Read address generation unit, 3 ... Sum of products unit, 4 ... Summation unit, 5 ... Write address generation unit, 22, 23, 24 ... Processor.

Claims (1)

[Claims] 1. An M × N input image, an M × N output image and M
X (L + 1) × (2L + 1) first work area, and y = 0 to N−1 as a read address (x, y) of the input image, and x = 0 to n for each y.
The input image reading means for generating M-1 and reading the input image, the mask area of (2K + 1) × (L + 1) and the second work area of (2K + 1) × (L + 1) are stored to read the input image. The means is a read address (p,
Each time one pixel of (q) is read, the read address (j, k) of the mask area is j = 0 to 2K, k = 0 to L.
The read / write address (l,
m) as l = Modulo (p | (2K + 1)) to Modulo
((P + 2K) | (2K + 1)), m = 0 to L The first
As the write address (g, h, i) of the work area of i = Modulo (q | (2L + 1)), h = 0 to L, g = p
-K is generated and read from the value of the input image read by the input image reading means and the mask area (K +
1) × (L + 1) Max coefficients and the sum read to the value read from the second work area to update and l = Modulo (p | (2K + 1)), m = of the second work area
First write 0 to L in the first work area
And the read address (g, g of the first work area each time the first work area writing means writes one pixel in the first work area.
h = i), g = p−K, i = Modulo ((q + s) |
(2L + 1)), h = | s |, s = -L to L is generated, and the sum is obtained by the summing means for summing the (2L + 1) values read from the first work area. A mask in the Y direction on a two-dimensional arrangement having an output image writing means for generating x = p−K, y = q−L as a write address (x, y) to the output image every time it is written and writing as an output image. By holding an intermediate result in the first and second work areas, the mask processing of a size of (2K + 1) × (2L + 1) in which the coefficients are symmetrically arranged with respect to the center is output every time one pixel is read from the input image. Image 1
A mask processing method characterized by obtaining pixels.