JPH0652866B2 - High-speed semiconductor device mounting method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A mounting method for use in an ultra-high-speed and large-capacity system, in which a stripline connection is made between a first IC and a second IC operating in the Gbits / sec region. 1st IC and 2nd I
A mounting method in which an input clock signal for operating C is prevented from being lowered on the output side of the first IC.

[Industrial application field]

The present invention configures a logic circuit of an ultra-high-speed large-capacity system,
The present invention relates to a mounting method using a stripline between high-speed ICs operating in its / sec region, and relates to a mounting method in which an input clock signal for operating this IC is reduced on the output side.

The Gbits /
High-speed ICs that operate in the ultra-high frequency band of sec are used, and the clock signals used to operate these ICs are output as they shift from the logic circuit to the output side. It is desired to prevent the decrease of

A clock signal for operating this high-speed IC is a PC
It is a signal used in communication of an ultra-high-speed and large-capacity system such as M communication, and is a signal having a certain repetitive cycle or a single frequency component.

[Conventional technology]

Conventionally, a strip line has been generally used to connect between such logic ICs operating at high speed.
At present, no special attention has been paid to the connection line length of the strip line between the terminals of the IC to be connected.

[Problems to be solved by the invention]

However, when these ICs are used in a logic circuit of an ultra-high-speed and large-capacity system, it is necessary to use them in an ultra-high frequency band of Gbits / sec. As a value closer to the guide wavelength of the clock frequency of the clock signal for driving the IC is used, it becomes more susceptible to the mismatch of the input impedance of the IC used.

That is, when the ICs are used in the ultra-high frequency band, the present inventors have found that the line length of the strip connecting the ICs has a great influence on the amplitude on the output side of the clock signal input to the ICs. I confirmed it experimentally.

For example, the IC used in the high frequency band of 2 Gbits / sec is 1
When the frequency is higher than GHz, the input impedance deteriorates, and when two such ICs are connected by a strip line, multiple reflection occurs between these two ICs.

There is no problem if the length of the strip line connecting the ICs is much shorter than the guide wavelength of the clock frequency of the clock signal used. For example, if the clock frequency of the clock signal used is 2GHz. If there,
The in-tube wavelength becomes about 5.7 cm, and multiple reflection occurs between the above two ICs and cannot be ignored.

The present invention has been made in view of the above-mentioned matters, and a terminating resistor is provided at the position of the input pin of the second IC on the input side by selecting an appropriate value for the length of the strip line connecting the ICs. It is an object of the present invention to provide a novel method for mounting a semiconductor device in which the output signal of the first IC is terminated to prevent the output amplitude of the clock signal for operating this IC from decreasing.

[Means for solving problems]

A method of mounting a semiconductor device according to the present invention is a method of forming a circuit by connecting first and second semiconductor devices used in a high frequency band by a strip line, wherein the first and second semiconductor devices are The length of the connected strip line is determined by the guide wavelength of the clock frequency of the clock signal that drives the first and second semiconductor devices.
The first and second semiconductor devices are set to an integral multiple of 1/2, and a termination resistor is provided at a position on the input side of the second semiconductor device to terminate an output signal from the first semiconductor device. The peak position of the standing wave generated due to the mismatch of the input impedance in the high frequency band is matched with the position of the input pin of the second semiconductor device.

[Action]

As shown in FIG. 1, the method for mounting a semiconductor device according to the present invention is such that the connection line length l of the strip line 3 for connecting the ICs 1 and 2 is set to the guide wavelength of the clock frequency of the clock signal for operating the ICs 1 and 2. Connection is made by selecting an integral number (n) times ½ of λg, and by terminating the output signal from IC1 at the position of input pin 5 by providing terminating resistor 4 at the position of input pin 5 of IC2. By setting the peak position of the standing wave generated by the mismatch of the input impedances of the first semiconductor device IC1 and the second semiconductor device IC2 to be the position of the input pin 5 of IC2,
Also, the level of the output amplitude of the clock signal output from IC2 is prevented from decreasing.

In this way, at the other end of the strip line 3 excited by the signal source of IC1, that is, at the position of the input pin 5 of IC2,
A reflected wave is generated on the strip line 3 by terminating the characteristic impedance of the strip line 3 with the terminating resistor 4 having a load substantially equal to the characteristic impedance of the strip line 3.

At this time, the clock signal of the input signal and the reflected wave interfere with each other on the strip line 3 to generate a standing wave in which the maximum amplitude position and the minimum amplitude position do not change.

The connection line length l of the strip line 3 connecting the ICs 1 and 2 is set to 1/2 of the guide wavelength λg of the clock frequency of the clock signal for operating the ICs 1 and 2.
, The standing wave generated as described above and the incident wave of the clock signal interfere with each other so that the peak positions of both waveforms coincide with each other. Stop seeing a drop in the signal clock signal.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing a mounting method of a semiconductor device of the present invention, and FIGS. 2 and 3 are diagrams showing output characteristics of a semiconductor device when mounted by the mounting method of the present invention.

A high-speed IC with a frequency band of 1.6 GHz as shown in Fig. 1.
1 and IC2 are connected using a strip line 3 with a terminating resistor 4 connected to the input side of IC2.

By doing so, the input impedance of the IC used is capacitive, and the input impedance rapidly decreases in the ultrahigh frequency band of Gbits / sec, and therefore, at the position of the input pin 5 at the end of the strip line 3. Termination resistor 4
Appears to have deteriorated rapidly in the ultrahigh frequency band of Gbits / sec.

Further, the output circuit type of the IC1 is an open-emitter type when used in such an ultra-high frequency band, and its output impedance is low.

Therefore, since the impedances of the input end and the output end of the strip line 3 are not matched, multiple reflection occurs on the strip line 3, and the multiple reflected wave interferes with the clock signal of the input signal to cause the strip line. Standing waves are generated above.

When the line length of the strip line is 1, the length of l is an integer of 1/2 of the guide wavelength λg (n = 1, 2,
3 ...) times, the standing wave and the clock signal interfere with each other so that the peak positions of the respective waveforms coincide with each other.

The small signal gain frequency characteristic of the circuit shown in FIG. 1 when n = 1 is shown in FIG. 2, and the small signal gain characteristic of the circuit shown in FIG. 1 when n = 2 is shown in FIG. It is shown in FIG.

Here, the horizontal axis in FIGS. 2 and 3 indicates the IC1
And the clock frequency (GHz) of the clock signal for driving the IC2, and the vertical axis represents the small signal gain (dB) of the circuit in the circuit connection of FIG.

By doing so, the clock frequency f ₀ of the clock signal for operating these IC1 and IC2 can be matched with the peak position of the output gain of the circuit shown in FIG.

That is, when the clock frequency is f ₀ , both ICs used
Since the peak position of the standing wave generated between them can be brought to the position 5 of the input pin of the IC 2, it is possible to prevent the clock output amplitude of the clock signal used from decreasing.

〔The invention's effect〕

As described above, according to the semiconductor device mounting method of the present invention, the peak position of the standing wave generated between the semiconductor devices used can be determined by selecting the line length of the strip line connecting the plurality of semiconductor devices. Since it can be brought to the position of the input pin of the semiconductor device, it has an effect of preventing a decrease in the amplitude of the clock signal output for driving the semiconductor device.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a method for mounting a semiconductor device of the present invention, and FIGS. 2 and 3 are diagrams showing output characteristics of a semiconductor device when mounted by the mounting method of the present invention. In the figure, 1,2 are ICs, 3 are strip lines, 4 are terminating resistors, 5
Indicates the position of the input pin.

Claims (1)

[Claims] 1. In the case where a circuit is constructed by connecting first and second semiconductor devices (1, 2) used in a high frequency band with a strip line (3), the first and second semiconductor devices are provided. The length of the strip line (3) that connects the semiconductor devices (1, 2) is set to 1/2 of the guide wavelength of the clock frequency of the clock signal that drives the first and second semiconductor devices (1, 2). It is an integral multiple, and a termination resistor (4) is provided on the input side of the second semiconductor device (2) to terminate the output signal from the first semiconductor device (1). The position of the peak of the standing wave generated by the mismatch of the input impedance in the high frequency band of the semiconductor device (1, 2) is matched with the position of the input pin (5) of the second semiconductor device (2). A method for mounting a high-speed semiconductor device, comprising: