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JPH0656866B2 - Method for forming semiconductor element isolation region - Google Patents
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JPH0656866B2 - Method for forming semiconductor element isolation region - Google Patents

Method for forming semiconductor element isolation region

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Publication number
JPH0656866B2
JPH0656866B2 JP60253940A JP25394085A JPH0656866B2 JP H0656866 B2 JPH0656866 B2 JP H0656866B2 JP 60253940 A JP60253940 A JP 60253940A JP 25394085 A JP25394085 A JP 25394085A JP H0656866 B2 JPH0656866 B2 JP H0656866B2
Authority
JP
Japan
Prior art keywords
element isolation
film
semiconductor element
silicon oxide
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP60253940A
Other languages
Japanese (ja)
Other versions
JPS62113443A (en
Inventor
哲哉 本間
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60253940A priority Critical patent/JPH0656866B2/en
Publication of JPS62113443A publication Critical patent/JPS62113443A/en
Publication of JPH0656866B2 publication Critical patent/JPH0656866B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に関し、特に半導体装
置の素子間分離領域を形成する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an element isolation region of a semiconductor device.

〔従来の技術〕[Conventional technology]

集積回路装置の素子間分離の方法として、シリコン基板
表面に選択的に形成した溝に絶縁物を埋め込む方法、い
わゆるトレンチアイソレーション法がある。
As a method of separating elements of an integrated circuit device, there is a method of burying an insulator in a groove selectively formed on the surface of a silicon substrate, that is, a so-called trench isolation method.

従来のトレンチアイソレーション形成方法としては、第
2図(a)に示すように、シリコン基板201の表面に
素子分離のための溝202,202′を形成し次に同図
(b)に示すように、化学気相成長によるシリコン窒化
膜203を形成し、続いて同図(c)に示すように化学
気相成長によるシリコン酸化膜204を形成後、同図
(d)に示すようにリソグラフィー工程により溝上部の
みにフォトレジスト205,205′を残し、次にエッ
チング工程により同図(e)に示すように基板凸部上の
シリコン酸化膜を除去することによって、凹部内に素子
分離シリコン酸化膜206,206′を埋込み最後に、
同図(f)に示すように凸部上のシリコン窒化膜203
を除去することによって素子分離領域を形成する方法が
ある。
As a conventional trench isolation forming method, as shown in FIG. 2 (a), trenches 202 and 202 'for element isolation are formed on the surface of a silicon substrate 201, and then as shown in FIG. 2 (b). Then, a silicon nitride film 203 is formed by chemical vapor deposition, a silicon oxide film 204 is formed by chemical vapor deposition as shown in FIG. 3C, and a lithography process is performed as shown in FIG. To leave the photoresists 205 and 205 'only in the upper part of the groove by etching, and then remove the silicon oxide film on the convex portion of the substrate by an etching process as shown in FIG. Embedding 206, 206 'Finally,
As shown in FIG. 6F, the silicon nitride film 203 on the convex portion
There is a method of forming an element isolation region by removing the.

また、同図(a),(b)の工程の後に同図(g)に示
すように化学気相成長により膜厚が溝の深さの約半分で
あるポリシリコン膜207を形成後、同図(h)に示す
ように、溝上部のみにフォトレジスト208,208′
を残し、次にエッチング工程により同図(i)に示すよ
うに基板凸部上のポリシリコン膜を除去し、続いて同図
(j)に示すように溝内に埋込まれたポリシリコン膜2
09,209′を酸化することによって、凹部内に素子
分離シリコン酸化膜210,210′を形成し、最後に
同図(k)に示すように、シリコン窒化膜203を除去
することによって素子分離領域を形成する方法がある。
After the steps shown in FIGS. 3A and 3B, a polysilicon film 207 having a film thickness of about half the depth of the groove is formed by chemical vapor deposition as shown in FIG. As shown in FIG. 3H, photoresists 208, 208 'are formed only on the upper portions of the grooves.
Then, the polysilicon film on the convex portion of the substrate is removed by an etching process as shown in FIG. 7I, and subsequently, the polysilicon film embedded in the trench as shown in FIG. Two
The element isolation silicon oxide films 210 and 210 'are formed in the recess by oxidizing the element isolation regions 09 and 209', and finally the silicon nitride film 203 is removed as shown in FIG. There is a method of forming.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら、従来法では化学気相成長によるシリコン
酸化膜又はポリシリコン膜の段差被覆性は悪く、さらに
リソグラフィー工程における目合せずれによって、第3
図に示すように溝の端部で突起状のシリコン酸化膜30
2,302′が残ったり、シリコン酸化膜のへこみ30
3,303′が形成される等の問題がある。
However, in the conventional method, the step coverage of the silicon oxide film or the polysilicon film by the chemical vapor deposition is poor, and the third step is caused by the misalignment in the lithography process.
As shown in the figure, the protruding silicon oxide film 30 is formed at the end of the groove.
2, 302 'remains, or the silicon oxide film has a dent 30
There is a problem that 3,303 'is formed.

本発明の目的は、上記問題点を解消した、すなわち、リ
ソグラフィー工程を用いずに平坦性の良い半導体素子分
離領域を形成する方法を提供することにある。
An object of the present invention is to solve the above problems, that is, to provide a method for forming a semiconductor element isolation region having good flatness without using a lithography process.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体素子分離領域の形成方法は、一般式がR
−S(OR′)4−n(R:1価の炭化水素基、
R′:炭素数0〜4の炭化水素基、n:0,1,2,
3)である有機シリコン化合物を主成分とする溶液を素
子間分離溝を有する半導体基板表面に塗布する工程と、
最初に150℃以下の温度で、続いて450℃以下の温
度でそれぞれ所定時間だけ少なくとも酸素を含む雰囲気
中で熱処理せしめることによって該溶液を樹脂ガラス膜
に変える工程と、続いて500℃以上の温度で酸素雰囲
気中で熱処理し該樹脂ガラス膜を酸化分解しシリコン酸
化膜に変える工程と、エッチバックにより、半導体基板
表面の半導体素子間分離溝以外に存在するシリコン酸化
膜を除去する工程とを含むことを特徴とする。
In the method of forming the semiconductor element isolation region of the present invention, the general formula is R
n -S i (OR ') 4 -n (R: 1 monovalent hydrocarbon group,
R ': a hydrocarbon group having 0 to 4 carbon atoms, n: 0, 1, 2,
3) A step of applying a solution containing an organic silicon compound as a main component to the surface of a semiconductor substrate having an element isolation groove,
First, a step of converting the solution into a resin glass film by heat-treating at a temperature of 150 ° C. or lower, then at a temperature of 450 ° C. or lower for a predetermined time in an atmosphere containing at least oxygen, and then at a temperature of 500 ° C. or higher. And a step of oxidizing and decomposing the resin glass film into a silicon oxide film in an oxygen atmosphere, and a step of removing the silicon oxide film existing on the surface of the semiconductor substrate other than the semiconductor element isolation trench by etching back. It is characterized by

上記の一般式がR−S(OR′)4−n(R:1価
の炭化水素基、R′:炭素数0〜4の炭化水素基、n:
0,1,2,3)である有機シリコン化合物を主成分と
する溶液は、例えばCH・S(OH),C
−S(OH),C−S(OH),C
−S(OH), C−S(OH),CH−S(OCH
,CH−S(OC,CH−S(O
,CH−S(OC,C
−S(OCH,C−S(OC
,C−S(OC,C
−S(OC,C−S(OC
,C−S(OC,C
−S(OC,C−S(OC
,C−S(OCH,C
−S(OC,C−S(OC
,C−S(OC,C
−S(OCH,C−S(OC
,C−S(OC,C
−S(OC等のうち少なくとも1種類以
上をエチルセロソルブアセテート,ブチルセロソルブア
セテートアルコール等の溶媒と混合することによって得
られる。これらの溶液を塗布し酸素雰囲気中で酸化分解
することによってシリコン酸化膜を形成する方法は、例
えば、応用物理学会講演予稿集、P375,31P−G
−6(昭和60年3月)にあるように(C−S
O)膜を酸素雰囲気中で550℃で120分間酸化分
解することによって均一なS膜が形成できること
により知られている。
The above general formula R n -S i (OR ') 4-n (R: 1 monovalent hydrocarbon group, R': hydrocarbon group having 0-4 carbon atoms, n:
A solution containing an organosilicon compound of 0, 1, 2, 3) as a main component is, for example, CH 3 · S i (OH) 3 , C 2 H 5
-S i (OH) 3, C 3 H 7 -S i (OH) 3, C 4 H
9 -S i (OH) 3, C 6 H 5 -S i (OH) 3, CH 3 -S i (OCH 3)
3, CH 3 -S i (OC 2 H 5) 3, CH 3 -S i (O
C 3 H 7) 3, CH 3 -S i (OC 4 H 9) 3, C 2 H
5 -S i (OCH 3) 3 , C 2 H 5 -S i (OC
2 H 5) 3, C 2 H 5 -S i (OC 3 H 7) 3, C 2 H
5 -S i (OC 4 H 9 ) 3, C 3 H 7 -S i (OC
H 3) 3, C 3 H 7 -S i (OC 2 H 5) 3, C 3 H 7
-S i (OC 3 H 7) 3, C 3 H 7 -S i (OC
4 H 9) 3, C 4 H 9 -S i (OCH 3) 3, C 4 H 9
-S i (OC 2 H 5) 3, C 4 H 9 -S i (OC
3 H 7) 3, C 4 H 9 -S i (OC 4 H 9) 3, C 6 H
5 -S i (OCH 3) 3 , C 6 H 5 -S i (OC
2 H 5) 3, C 6 H 5 -S i (OC 3 H 7) 3, C 6 H
Ethyl cellosolve acetate at least one or more of such 5 -S i (OC 4 H 9 ) 3, obtained by mixing with a solvent such as butyl cellosolve acetate alcohol. A method for forming a silicon oxide film by applying these solutions and oxidatively decomposing them in an oxygen atmosphere is described in, for example, Proceedings of the Japan Society of Applied Physics, P375, 31P-G.
-6 as in (Showa March years 60) (C 6 H 5 -S i
O) uniform S i O 2 film by n film 120 min oxidative decomposition at 550 ° C. in an oxygen atmosphere has been known by can be formed.

さらに、上記の溶液中にリン、ホウ素原子を含む化合物
を混合せしめることによって、500℃以上の熱処理に
おけるシリコン酸化膜のリフローの効果を高めることが
可能となる。
Furthermore, by mixing a compound containing phosphorus and boron atoms into the above solution, it becomes possible to enhance the effect of reflowing the silicon oxide film in the heat treatment at 500 ° C. or higher.

〔実施例〕〔Example〕

次に、本発明を実施例に基づき図面を用いて説明する。 Next, the present invention will be described based on embodiments with reference to the drawings.

本実施例では、一般式がR−S(OR′)4−n
ある有機シリコン化合物を主成分とする溶液として、C
−S(OH)とC−S(OH)エチ
ルセロソルブアセテートに混合したものを用いた。さら
に該溶液中にリン原子,ホウ素原子を含む化合物をそれ
ぞれ4mol%の濃度で混合し塗布溶液とした。
In this embodiment, as a solution general formula as a main component R n -S i (OR ') an organic silicon compound is a 4-n, C
It was a mixture in H 3 -S i (OH) 3 and C 6 H 5 -S i (OH ) 3 ethyl cellosolve acetate. Further, a compound containing phosphorus atoms and boron atoms was mixed in the solution at a concentration of 4 mol% to prepare a coating solution.

第1図は、本発明の一実施例の半導体装置の素子分離領
域の形成工程を示す断面図である。
FIG. 1 is a sectional view showing a process of forming an element isolation region of a semiconductor device according to an embodiment of the present invention.

第1図(a)において、P型シリコン基板101表面の
素子分離領域を形成すべき部分にリソグラフィー工程お
よびエッチングにより、深さ約1μmの溝102,10
2′を形成する。
In FIG. 1A, the grooves 102, 10 each having a depth of about 1 μm are formed in a portion of the surface of the P-type silicon substrate 101 where an element isolation region is to be formed by a lithography process and etching.
2'is formed.

次に、同図(b)に示すように化学気相成長によるシリ
コン窒化膜103を形成する。続いて同図(c)に示す
ように上記塗布溶液を塗布し、150℃で30分間さら
に450℃で30分間、酸素を含む雰囲気中で熱処理す
ることによって厚さ約3μmの樹脂ガラス膜104を形
成し、さらに、900℃で1時間、酸素ガス雰囲気中で
熱処理せしめることによって、樹脂膜ガラス膜を酸化分
解し、同図(d)に示すように厚さ約1.5μmのシリ
コン酸化膜105に変える。
Next, a silicon nitride film 103 is formed by chemical vapor deposition as shown in FIG. Subsequently, as shown in FIG. 3C, the above coating solution is applied and heat-treated at 150 ° C. for 30 minutes and further at 450 ° C. for 30 minutes in an atmosphere containing oxygen to form a resin glass film 104 having a thickness of about 3 μm. The resin film glass film is oxidatively decomposed by being formed and further heat-treated at 900 ° C. for 1 hour in an oxygen gas atmosphere, and a silicon oxide film 105 having a thickness of about 1.5 μm is formed as shown in FIG. Change to.

次にドライエッチングによるエッチバッグで半導体基板
表面の溝部以外のシリコン酸化膜を除去し、同図(e)
に示すように溝内に素子分離シリコン酸化膜106,1
06′を埋込む。
Next, the silicon oxide film other than the groove on the surface of the semiconductor substrate is removed by an etch bag by dry etching.
Element isolation silicon oxide films 106, 1
06 'is embedded.

以上の工程の後、半導体基板凸部表面のシリコン窒化膜
103をエッチングし、同図(f)に示すように素子分
離領域の形成が完了する。
After the above steps, the silicon nitride film 103 on the surface of the convex portion of the semiconductor substrate is etched, and the formation of the element isolation region is completed as shown in FIG.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明は、一般式が である有機シリコン化合物を主成分とする溶液を素子間
を分離するために形成された溝を有する半導体基板表面
に塗布、熱処理せしめることによって、半導体基板表面
の凹凸を平坦化することが可能となり、ゆえに半導体基
板凸部上表面に存在するシリコン酸化膜の除去が、エッ
チバックにより簡単化され、リソグラフィー工程無しに
凹部内にシリコン酸化膜を埋込むことが可能となる。し
たがって、素子分離領域形成後の半導体基板表面を平坦
にすることが出来るという効果がある。
As described above, the present invention has the general formula By applying a solution containing an organic silicon compound as a main component to a semiconductor substrate surface having a groove formed to separate elements from each other and subjecting it to heat treatment, it becomes possible to flatten the unevenness of the semiconductor substrate surface, Therefore, the removal of the silicon oxide film existing on the upper surface of the convex portion of the semiconductor substrate is simplified by etching back, and the silicon oxide film can be embedded in the concave portion without a lithography process. Therefore, there is an effect that the surface of the semiconductor substrate after forming the element isolation region can be made flat.

さらに塗布法によってシリコン酸化膜を形成することか
ら生産性が高いという利点を有する。
Further, since the silicon oxide film is formed by the coating method, there is an advantage that the productivity is high.

また、本発明では有機シリコン化合物を主成分とする溶
液を、最初に150℃以下の温度で、続いて450℃以
下の温度でそれぞれ所定時間だけ少なくとも酸素を含む
雰囲気中で熱処理せしめることによって該溶液を樹脂ガ
ラス膜に変えるので、膜厚方向に均一な膜組成の樹脂ガ
ラス膜を得ることができ、更にこれに基づいて均一組成
のシリコン酸化膜を得ることができるので、均一なリー
ク電流の低減が可能となる。
Further, in the present invention, a solution containing an organic silicon compound as a main component is first heat-treated at a temperature of 150 ° C. or lower, and then at a temperature of 450 ° C. or lower for a predetermined time in an atmosphere containing at least oxygen to obtain the solution. Is changed to a resin glass film, a resin glass film having a uniform film composition in the film thickness direction can be obtained, and based on this, a silicon oxide film having a uniform composition can be obtained, so that a uniform leak current can be reduced. Is possible.

更に、シリコン窒化膜を予め形成した上で、これをスト
ッパとしてシリコン酸化膜をエッチバックし、その後に
シリコン窒化膜を除去することにより、半導体素子間分
離溝の内部にのみシリコン酸化膜を残し、半導体基板の
表面の平坦化を図ることが可能となる。
Furthermore, after forming a silicon nitride film in advance, the silicon oxide film is etched back using this as a stopper, and then the silicon nitride film is removed, leaving the silicon oxide film only inside the semiconductor element isolation trench, The surface of the semiconductor substrate can be flattened.

以上のように、本発明による半導体装置の素子間分離領
域の形成方法は、半導体装置の高密度・高集積化に多大
の効果をもたらす。
As described above, the method for forming the element isolation region of the semiconductor device according to the present invention brings a great effect on the high density and high integration of the semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の半導体装置の素子分離領域
の形成方法を示す工程断面図である。 第2図は従来の半導体装置の素子分離領域の形成方法を
示す工程断面図である。 第3図は従来の半導体装置の素子分離領域の形成方法に
おける問題点を示す断面図である。 第1図において、 101……P型シリコン基板、102,102′……
溝、103……シリコン窒化膜、104……樹脂ガラス
膜、105……シリコン酸化膜、106,106′……
素子分離シリコン酸化膜、である。 第2図において、 201……シリコン基板、202,202′……溝、2
03……シリコン窒化膜、204……シリコン酸化膜、
205,205′……フォトレジスト、206,20
6′……素子分離シリコン酸化膜、207……ポリシリ
コン膜、208,208′……フォトレジスト、20
9,209′……ポリシリコン膜、210,210′…
…素子分離シリコン酸化膜、である。 第3図において、 301……シリコン基板、302,302′……突起状
のシリコン酸化膜、303,303′……シリコン酸化
膜のへこみ、である。
FIG. 1 is a process sectional view showing a method for forming an element isolation region of a semiconductor device according to an embodiment of the present invention. FIG. 2 is a process sectional view showing a method of forming an element isolation region of a conventional semiconductor device. FIG. 3 is a cross-sectional view showing a problem in a conventional method of forming an element isolation region of a semiconductor device. In FIG. 1, 101 ... P-type silicon substrate, 102, 102 '...
Groove, 103 ... Silicon nitride film, 104 ... Resin glass film, 105 ... Silicon oxide film, 106, 106 '...
Element isolation silicon oxide film. In FIG. 2, 201 ... Silicon substrate, 202, 202 '... Groove, 2
03 ... Silicon nitride film, 204 ... Silicon oxide film,
205, 205 '... Photoresist, 206, 20
6 '... Element isolation silicon oxide film, 207 ... Polysilicon film, 208, 208' ... Photoresist, 20
9,209 '... Polysilicon film, 210,210' ...
... element isolation silicon oxide film. In FIG. 3, 301 ... Silicon substrate, 302, 302 '... Protruding silicon oxide film, 303, 303' ... Silicon oxide film dent.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体素子間分離溝を有する半導体基板表
面にシリコン窒化膜を形成する工程と、この上に一般式
がRn−Si(OR′)4−n (R:1価の炭化水素
基、R′:炭素数0〜4の炭化水素基、n:0,1,
2,3)である有機シリコン化合物を主成分とする溶液
を前記半導体素子間分離溝の深さよりも厚く塗布する工
程と、150℃以下の温度で、続いて450℃以下の温
度でそれぞれ所定時間だけ少なくとも酸素を含む雰囲気
中で熱処理せしめることによって該溶液を樹脂ガラス膜
に変える工程と、続いて500℃以上の温度で酸素雰囲
気中で熱処理し該樹脂ガラス膜を酸化分解しシリコン酸
化膜に変える工程と、前記シリコン窒化膜をストッパと
したエッチバックにより半導体基板表面の半導体素子間
分離溝以外に存在する該シリコン酸化膜を除去する工程
と、前記半導体素子間分離溝以外に存在する該シリコン
窒化膜を除去する工程とを含むことを特徴とする半導体
素子分離領域の形成方法。
1. A step of forming a silicon nitride film on the surface of a semiconductor substrate having a separation groove between semiconductor elements, and a general formula of Rn-Si (OR ') 4-n (R: a hydrocarbon group having a valence of 1). , R ': a hydrocarbon group having 0 to 4 carbon atoms, n: 0, 1,
2, 3) a step of applying a solution containing an organic silicon compound as a main component so as to be thicker than the depth of the semiconductor element separating groove, and at a temperature of 150 ° C. or lower, and subsequently at a temperature of 450 ° C. or lower for a predetermined time respectively. A step of converting the solution into a resin glass film by heat-treating it only in an atmosphere containing at least oxygen, and subsequently performing a heat treatment in an oxygen atmosphere at a temperature of 500 ° C. or higher to decompose the resin glass film into a silicon oxide film. A step of removing the silicon oxide film existing on the surface of the semiconductor substrate other than the semiconductor element isolation trench by etching back using the silicon nitride film as a stopper; and a silicon nitride present on the semiconductor element isolation trench other than the semiconductor element isolation trench. And a step of removing the film, the method for forming a semiconductor element isolation region.
JP60253940A 1985-11-12 1985-11-12 Method for forming semiconductor element isolation region Expired - Fee Related JPH0656866B2 (en)

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JPS62113443A JPS62113443A (en) 1987-05-25
JPH0656866B2 true JPH0656866B2 (en) 1994-07-27

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JP3178412B2 (en) 1998-04-27 2001-06-18 日本電気株式会社 Method of forming trench isolation structure
US6458713B1 (en) 1999-06-28 2002-10-01 Kabushiki Kaisha Toshiba Method for manufacturing semiconductor device

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JPS57160132A (en) * 1981-03-27 1982-10-02 Fujitsu Ltd Manufacture of semiconductor device

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