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JPH0657022B2 - Multilevel demodulation method - Google Patents
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JPH0657022B2 - Multilevel demodulation method - Google Patents

Multilevel demodulation method

Info

Publication number
JPH0657022B2
JPH0657022B2 JP58056643A JP5664383A JPH0657022B2 JP H0657022 B2 JPH0657022 B2 JP H0657022B2 JP 58056643 A JP58056643 A JP 58056643A JP 5664383 A JP5664383 A JP 5664383A JP H0657022 B2 JPH0657022 B2 JP H0657022B2
Authority
JP
Japan
Prior art keywords
amplifier
signal
circuit
qam
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58056643A
Other languages
Japanese (ja)
Other versions
JPS59182657A (en
Inventor
健造 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58056643A priority Critical patent/JPH0657022B2/en
Publication of JPS59182657A publication Critical patent/JPS59182657A/en
Publication of JPH0657022B2 publication Critical patent/JPH0657022B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38Demodulator circuits; Receiver circuits
    • H04L27/3809Amplitude regulation arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明はディジタル無線機に使用されるような多値復調
方式において、復調器入力から識別器までのレベル変動
を減少させた復調方式に関する。
1. Field of the Invention The present invention relates to a demodulation method in which a level variation from a demodulator input to a discriminator is reduced in a multilevel demodulation method such as used in a digital radio.

(2)従来技術と問題点 ディジタル無線回線は近年4相PSK(位相シフトキー
イング)信号を使用することから、情報量を大量に処理
するため16値QAM型信号が使用されるようになった。
4相PSK信号の場合受信装置における復調盤では、中
間周波信号をベースバンド信号に変換し、次に搬送波再
生回路から得られた搬送波を使用して復調の後、識別器
によりビッドパターンのデータを取り出している。4相
PSKの場合アイパターンは2値となるので、識別器に
おいてのレベル変動には比較的強いが、16値QAMなど
の多値QAM変調方式の場合は信号点がAM成分を含む
アイパターンになるので、中心のアイの識別を除いて
は、レベル変動に非常に厳しくなる。第1図は従来の16
値QAM型復調盤のブロック構成図を示す。主中間周波
増幅器MIFAの次段にフェーディング等化器を挿入
し、更に1点鎖線で囲む復調盤DMの当初段に自動利得
制御回路付き増幅器IFAを使用している。直交復調器
MIXには搬送波再生回路CRからの再生搬送波が印加
され、ベースバンド増幅器BBAの出力は識別器DS
C、クロック再生回路BTRに印加される。しかしこの
構成によっても、前段増幅系の利得変動・直流ドリフト
と復調盤DMにおけるベースバンド系のレベル変動を完
全に補償できず、識別器DSCの出力の正確さが劣って
いた。なお、復調盤における自動利得制御回路付き増幅
器では自分の出力を帰還していて、ベースバンド系の利
得変動を補償できないという欠点があった。
(2) Prior art and problems Since a digital radio line uses a 4-phase PSK (phase shift keying) signal in recent years, a 16-value QAM type signal has come to be used for processing a large amount of information.
In the case of a four-phase PSK signal, the demodulation board in the receiver converts the intermediate frequency signal into a baseband signal and then demodulates it using the carrier wave obtained from the carrier wave reproduction circuit, and then outputs the bit pattern data by the discriminator. I am taking it out. In the case of 4-phase PSK, the eye pattern is binary, so it is relatively resistant to level fluctuations in the discriminator, but in the case of multi-level QAM modulation such as 16-level QAM, the signal point becomes an eye pattern containing AM components. Therefore, except for the identification of the central eye, it becomes very strict about level fluctuation. Fig. 1 shows the conventional 16
The block block diagram of the value QAM type demodulation board is shown. A fading equalizer is inserted in the next stage of the main intermediate frequency amplifier MIFA, and an amplifier IFA with an automatic gain control circuit is used in the initial stage of the demodulation board DM surrounded by a chain line. The recovered carrier from the carrier recovery circuit CR is applied to the quadrature demodulator MIX, and the output of the baseband amplifier BBA is the discriminator DS.
C, applied to the clock recovery circuit BTR. However, even with this configuration, the gain variation / DC drift of the pre-stage amplification system and the level variation of the baseband system in the demodulation board DM cannot be completely compensated, and the output of the discriminator DSC is inaccurate. It should be noted that the amplifier with automatic gain control circuit in the demodulation board has a drawback in that its output is fed back and the gain fluctuation of the baseband system cannot be compensated.

(3)発明の目的 本発明の目的は前述の欠点を改善し、復調器入力から識
別器までのレベル変動を減少させて、正確な識別動作を
行うことのできる復調方式を提供することにある。
(3) Object of the Invention It is an object of the present invention to improve the above-mentioned drawbacks and to provide a demodulation method capable of performing accurate identification operation by reducing the level fluctuation from the input of the demodulator to the identification device. .

(4)発明の構成 前述の目的を達成するための本発明の構成は、位相シフ
トキーイング変調に振幅変調を加えたQAM型てディジ
タル信号を受信し、増幅器で増幅して後、搬送波再生回
路により得られた搬送波を利用して復調・識別する多値
復調方式において、前記増幅器として識別回路出力を使
用し利得を制御するディシジョンフィードバッグ型自動
利得制御回路で構成し、該識別回路ではQAMアイパタ
ーンの両外側の収束点にて変動値を検出し、該検出信号
により前記増幅器の利得を制御することにより構成す
る。
(4) Structure of the Invention The structure of the present invention for achieving the above-mentioned object is such that a QAM type digital signal in which amplitude modulation is added to phase shift keying modulation is received, amplified by an amplifier, and then a carrier recovery circuit is used. In the multilevel demodulation method using the obtained carrier wave for demodulation / discrimination, a decision feedbag type automatic gain control circuit is used which controls the gain by using the output of the discrimination circuit as the amplifier, and the discrimination circuit uses a QAM eye pattern. The fluctuation value is detected at the convergence points on both outer sides, and the gain of the amplifier is controlled by the detection signal.

(5)発明の実施例 第2図は本発明の一実施例の構成を示すブロック図で、
復調盤GMのみについて示し、第1図と同一符号は同様
のものである。識別器DSCには第1図より2個多い識
別回路DSを設け、動作制御回路CTLにより理論演算
し、その出力CをレープフィルタLFを介し増幅器IF
Aの制御信号として印加する。この形式の自動利得制御
方式をディシジョンフィードバッグ型AGCという。こ
の利得制御方式により従来より正確な識別ができる。
(5) Embodiment of the Invention FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention.
Only the demodulation board GM is shown, and the same reference numerals as those in FIG. 1 are the same. The discriminator DSC is provided with two more discriminating circuits DS than those in FIG.
It is applied as the A control signal. This type of automatic gain control system is called a decision feed bag type AGC. This gain control method enables more accurate identification than before.

次にディシジョンフィードバッグ型AGCについて説明
する。多値QAMアイパターンと識別信号のしきい値と
を示す第3図において、横軸を時間、縦軸を振幅とし、
振幅変動を生じた場合の復調信号を〜と示し、或る
2つの識別回路DSのしきい値レベルをa,bと示し、
1点鎖線は変動のない時の復調信号である。第2図にお
ける他の2つの識別回路DSのしきい値レベルをa,b
の中間のレベルX,Yとして置く。識別回路DSとして
は例えばa,b,X,Y各信号を取り出すため入力にオ
フセットを与えたフリップフロップで構成する。
Next, the decision feed bag type AGC will be described. In FIG. 3 showing the multilevel QAM eye pattern and the threshold value of the identification signal, the horizontal axis represents time and the vertical axis represents amplitude,
The demodulated signal in the case where the amplitude variation occurs is indicated by, and the threshold levels of certain two discriminating circuits DS are indicated by a and b,
The one-dot chain line is the demodulated signal when there is no fluctuation. The threshold levels of the other two identification circuits DS in FIG.
Put as intermediate level X, Y. The identification circuit DS is composed of, for example, a flip-flop whose input has an offset in order to take out each signal of a, b, X, and Y.

各フリップフロップにベースバンド・アイパターン信号
を並列に与え、且つクロック信号を印加して動作させ
る。識別回路出力の存在し得るデータはしきい値レベル
に対して入力信号が大きければ“1”、小さければ
“0”が得られるようにすることにより次表のようにな
る。
A baseband eye pattern signal is applied in parallel to each flip-flop and a clock signal is applied to operate. The data that can be output from the discrimination circuit is as shown in the following table by obtaining "1" when the input signal is large with respect to the threshold level and "0" when it is small.

次の制御回路CTLの構成について説明する。まず復調
信号が16値QAM型信号のアイパターンの両端の収束点
を通過するような大きな振幅のとき(X,Yは同符
号)、利得制御信号C′を得るようにする。
Next, the configuration of the control circuit CTL will be described. First, when the demodulated signal has such a large amplitude that it passes through the convergence points at both ends of the eye pattern of the 16-value QAM type signal (X and Y have the same sign), the gain control signal C'is obtained.

真理値表は下記のようになる。The truth table is as follows.

また端部の収束点と、端部の収束点に隣り合う収束点の
中間部である。端部識別用の識別レベルX,Yの間で復
調信号が変化している時(X,Yが異符号の時)、即
ち、小さな振幅のときには、利得制御信号C′を禁止
し、前の状態を保持する。
Further, it is an intermediate portion between the convergence point at the end and the convergence point adjacent to the convergence point at the end. When the demodulation signal changes between the discrimination levels X and Y for edge discrimination (when X and Y have different signs), that is, when the amplitude is small, the gain control signal C'is prohibited and the Hold the state.

このような禁止・保持の動作のためには、信号C′の出
力をフリップフロップのD端子へ入力すること、及び
X,Y信号についてEX−NOR演算した結果とクロッ
クとの論理積演算値をフリップフロップのC端子へ入力
することにより、フリップフロップ出力Qを正規の利得
制御信号Cとする。この信号Cが制御回路CTLの出力
である。
For such prohibiting / holding operation, the output of the signal C'is input to the D terminal of the flip-flop, and the result of the EX-NOR operation of the X and Y signals and the AND operation value of the clock are calculated. By inputting to the C terminal of the flip-flop, the flip-flop output Q becomes the normal gain control signal C. This signal C is the output of the control circuit CTL.

よって制御回路CTLは第4図のように構成される。Therefore, the control circuit CTL is configured as shown in FIG.

(6)発明の効果 このようにして本発明によると、識別器入力においてレ
ベル変動があったとき、それを精度良く検出して増幅器
に対し利得制御を行わせるから、識別動作が正確となる
効果を有する。
(6) Effect of the Invention Thus, according to the present invention, when there is a level change at the input of the discriminator, it is detected accurately and the gain control is performed for the amplifier, so that the discriminating operation is accurate. Have.

【図面の簡単な説明】[Brief description of drawings]

第1図は従来の16値QAM型復調盤の構成を示す図、 第2図は本発明の一実施例の構成を示すブロック図、 第3図は多値QAMアイパターンと識別信号Cとを示す
図である。 第4図は第2図中制御回路CTLの具体的回路図であ
る。 MIFA…主中間周波増幅器 DM…復調器 IFA…自動利得制御回路付き増幅器 MIX…直交復調器 BBA…ベースバンド増幅器 DSC…識別器 CR…搬送波再生回路 BTR…クロック再生回路 DS…識別回路
FIG. 1 is a diagram showing a configuration of a conventional 16-value QAM demodulation board, FIG. 2 is a block diagram showing a configuration of an embodiment of the present invention, and FIG. 3 shows a multi-value QAM eye pattern and an identification signal C. FIG. FIG. 4 is a specific circuit diagram of the control circuit CTL in FIG. MIFA ... Main intermediate frequency amplifier DM ... Demodulator IFA ... Amplifier with automatic gain control circuit MIX ... Quadrature demodulator BBA ... Baseband amplifier DSC ... Discriminator CR ... Carrier regeneration circuit BTR ... Clock regeneration circuit DS ... Discrimination circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】位相シフトキーイング変調に振幅変調を加
えたQAM型ディジタル信号を受信し、増幅器で増幅し
て後、搬送波再生回路により得られた搬送波を利用して
復調・識別する多値復調方式において、 前記増幅器として識別回路出力を使用し利得を制御する
ディシジョンフィードバック型自動利得制御回路で構成
し、 該識別回路ではQAMアイパターンの両外側の収束点に
て変動値を検出し、 該検出信号により前記増幅器の利得を制御すること を特徴とする多値復調方式。
1. A multi-level demodulation system which receives a QAM type digital signal obtained by adding amplitude modulation to phase shift keying modulation, amplifies it by an amplifier, and then demodulates and identifies it by using a carrier obtained by a carrier regeneration circuit. The decision feedback type automatic gain control circuit for controlling the gain by using the output of the discrimination circuit as the amplifier, wherein the discrimination circuit detects a variation value at the convergence points on both outer sides of the QAM eye pattern, The multi-level demodulation method is characterized in that the gain of the amplifier is controlled by the following.
JP58056643A 1983-03-31 1983-03-31 Multilevel demodulation method Expired - Lifetime JPH0657022B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58056643A JPH0657022B2 (en) 1983-03-31 1983-03-31 Multilevel demodulation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58056643A JPH0657022B2 (en) 1983-03-31 1983-03-31 Multilevel demodulation method

Publications (2)

Publication Number Publication Date
JPS59182657A JPS59182657A (en) 1984-10-17
JPH0657022B2 true JPH0657022B2 (en) 1994-07-27

Family

ID=13033018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58056643A Expired - Lifetime JPH0657022B2 (en) 1983-03-31 1983-03-31 Multilevel demodulation method

Country Status (1)

Country Link
JP (1) JPH0657022B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57131152A (en) * 1981-02-06 1982-08-13 Nec Corp Automatic gain controlling circuit

Also Published As

Publication number Publication date
JPS59182657A (en) 1984-10-17

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