JPH065716B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device using a mask alignment pattern capable of preventing misuse of another type of mask in a mask alignment process in a semiconductor device manufacturing process. The present invention relates to a manufacturing method.

(Prior Art) FIG. 4 shows the flow of a general diffusion process of a conventional gate array having a complementary MOS structure. In the figure, an n-channel well forming step 2 is performed for the n-type semiconductor substrate preparing step 1, a field oxide film forming step 3 is then performed, and then a polysilicon gate is formed according to the procedure shown in FIG. Step 4, p-channel source / drain diffusion layer forming step 5, n-channel source / drain diffusion layer forming step 6, contact window forming step between diffusion layer / gate and metal electrode, and metal electrode forming step 8 And finally, the process of forming a window on the input / output pad of the protective film 9
To complete the diffusion process.

The mask used in each of the above steps 2 to 9 is denoted by reference numeral 2.
It is a product corresponding to each process represented by 0 to 90. In the gate array, in this step, in the contact window forming step 7 for the diffusion layer gate and the metal electrode and the metal electrode forming step 8, masks having different patterns are used to manufacture a semiconductor product corresponding to the mask. . That is, each process from the mask (mask 20) to the ND mask (mask 60) which is called PW and the SG mask (mask 9)
0) uses a common mask, but when manufacturing product A, for example, the CW (A) mask (mask 70) is used in step 7, and the AL (A) mask (mask 80) is used in step 8. To do.

On the other hand, when manufacturing the product B, CW is performed in step 7.
The (B) mask (mask 70 ') is used, and in step 8, the AL (B) mask (mask 80') is used. Conventionally, as a mask alignment pattern of this kind, a common pattern has been used for all masks regardless of the type of product as long as the manufacturing process is the same. That is, CW in FIG.
(A) mask and CW (B) mask, or AL (A)
The shapes of the mask alignment patterns arranged on the mask and the AL (B) mask were completely the same.

(Problems to be Solved by the Invention) In the conventional method, in the mask aligning process, an operator should make a mistake in checking the mask type number or the mask number indicating the mask change history written on the peripheral portion of the mask, or Even if you accidentally use another mask due to contamination, the error may be overlooked until the inspection process after the diffusion process is completed, and there is a drawback that you cannot find the error in the mask alignment process. . This will be specifically described in the manufacturing example of FIG. Now, in the manufacturing process of the product A, according to the flow of the diffusion process, from the process 2 to the process 7,
Sequential mask PW → OD → PS → PD → ND → CW
For the semiconductor wafer which has been processed up to (A), the mask of AL (B) 80 'was mistakenly used where the mask of main body AL (A) 80 should be used in the next metal electrode forming step 8. If you do, AL (A) 80 and AL (B)
Since the mask alignment pattern provided on each mask of 80 'is the same, AL (B) 80' is C for mask alignment work.
The mask of W (A) 70 was also fitted without any trouble, and the worker did not notice that he used the AL (B) 80 'as the mask of AL (A) 80.

The loss due to the above errors becomes larger as the mass production technology of semiconductors is improved and a large number of wafers can be processed at one time. Not only that, but since an error is discovered only after entering the inspection process, the time loss for starting the diffusion process again becomes enormous.

An object of the present invention is to eliminate the conventional drawbacks and prevent errors during the mask alignment process.

(Means for Solving the Problems) A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device in which each semiconductor product is distinguished by changing a mask pattern only for a part of a plurality of masks. In the method, a mask alignment pattern having a different pattern shape for each semiconductor product is arranged on the partial mask, and the partial mask is aligned by the mask alignment pattern.

(Operation) According to the present invention, in the process of using a mask having different contents corresponding to the type of product, the shape of the mask alignment pattern varies from product to product, so mask alignment is not possible with masks of different types, and therefore masks Misuse will not occur.

(Embodiment) FIG. 1 and FIG. 2 are schematic views of a mask alignment pattern according to an embodiment of the present invention. In the flow of each step of FIG. 4, a common mask P regardless of the type of product is used.
When S40 and SG90 are used and CW (A) 70 and AL (A) 80 masks are used as masks having different pattern contents corresponding to the product type, and CW
It is drawn by extracting the case where the masks of (B) 70 'and AL (B) 80' are matched. FIG. 1 shows a mask matching pattern dedicated to product A, and FIG. 2 shows a mask matching pattern dedicated to product B. In both figures, the same pattern is used for PS and SG, but both CW and AL are used. Regarding the corresponding masks, the product A and the product B are partially different in pattern shape. That is, in FIGS. 1 and 2, the positions of the protrusions are different between CW and AL (A) and (B). Assuming that the mask of AL (B) 80 'is mistakenly used during the manufacturing of the product A in the mask matching step, the overlapping of the mask matching patterns at this point is as shown in FIG. Become, CW
Since the patterns of both the masks (A) 70 and AL (B) 80 'partially intersect and become inconsistent, misuse of the masks can be noticed. In the above example, the product A
An example in which the product B and the product B are distinguished by two masks called CW and AL has been described, but this is also applicable when the products are distinguished by three or more masks.

(Effects of the Invention) According to the present invention, when a plurality of masks are used in series differently for each group in order to manufacture a semiconductor device, the same in each group but different in each group. By using the mask alignment pattern, it is possible to prevent problems caused by misuse of the mask in the manufacturing process of the semiconductor integrated circuit device.

[Brief description of drawings]

1 and 2 are plan views of a mask alignment pattern according to an embodiment of the present invention, FIG. 3 is a plan view showing an example of misuse of the mask alignment pattern, and FIG. 4 is a conventional complementary MO.
3 is a flow chart of a manufacturing process of the S integrated circuit device and a corresponding diagram of a mask used in each process. 1 ... n-type semiconductor substrate preparation step, 2 ... n channel well forming step, 3 ... field oxide film forming step, 4 ... polysilicon gate forming step, 5 ... p channel source / drain diffusion layer forming step, 6 ... n channel Source / drain diffusion layer forming step, 7 ... Diffusion layer / gate window contact step between metal electrode, 8 ... Metal electrode forming step, 9 ...
Process of forming window on input / output pad of surface protection film, 20 to 90…
Mask for each process.

Claims (1)

[Claims] 1. A plurality of masks are used in a series of manufacturing processes. Among these masks, different individual masks are used for each product type in the contact window forming process and the metal electrode forming process, and different masks are used in other processes. Regardless of which a common mask is used, the individual mask is provided with a mask alignment pattern having a different shape from the common mask, and different types of individual masks have different mask alignment patterns, A method for manufacturing a semiconductor device, wherein masks of the same type have mask matching patterns that match each other.