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JPH0668710B2 - Voltage fluctuation suppression device - Google Patents
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JPH0668710B2 - Voltage fluctuation suppression device - Google Patents

Voltage fluctuation suppression device

Info

Publication number
JPH0668710B2
JPH0668710B2 JP58107555A JP10755583A JPH0668710B2 JP H0668710 B2 JPH0668710 B2 JP H0668710B2 JP 58107555 A JP58107555 A JP 58107555A JP 10755583 A JP10755583 A JP 10755583A JP H0668710 B2 JPH0668710 B2 JP H0668710B2
Authority
JP
Japan
Prior art keywords
voltage
fluctuation
voltage fluctuation
phase
reactor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58107555A
Other languages
Japanese (ja)
Other versions
JPS602028A (en
Inventor
惇 西台
金義 室谷
信 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP58107555A priority Critical patent/JPH0668710B2/en
Publication of JPS602028A publication Critical patent/JPS602028A/en
Publication of JPH0668710B2 publication Critical patent/JPH0668710B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30Reactive power compensation

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  • Supply And Distribution Of Alternating Current (AREA)
  • Control Of Electrical Variables (AREA)

Description

【発明の詳細な説明】 〔技術分野〕 本発明は電力系統の母線電圧が不平衡、かつ急峻に変動
している場合の母線電圧変動抑制のために設けられた不
平衡電圧の検出装置による電圧変動抑制装置に係わる。
Description: TECHNICAL FIELD The present invention relates to a voltage by an unbalanced voltage detection device provided for suppressing a fluctuation of a bus voltage when the bus voltage of a power system is unbalanced and fluctuates sharply. It is related to a fluctuation suppressing device.

〔背景技術および問題点〕[Background technology and problems]

第1図の上述の目的に用いられる電圧変動抑制装置の一
例を示す。
An example of the voltage fluctuation suppression apparatus used for the above-mentioned purpose of FIG. 1 is shown.

図において、1は無限大母線であり、2は電源インピー
ダンスであり、3は母線である。4は直列リアクトルで
あり、5のサイリスタスイッチと直接に接続され、これ
と並列コンデンサ6とにより、点線で示す無効電力補償
回路を構成する。
In the figure, 1 is an infinite bus, 2 is a power source impedance, and 3 is a bus. Reference numeral 4 is a series reactor, which is directly connected to the thyristor switch of 5, and this and the parallel capacitor 6 constitute a reactive power compensation circuit indicated by a dotted line.

もっともこの無効電力補償回路は図のようなリアクトル
電流可変タイプ(通称TCR方式)でなくてもよい。
However, this reactive power compensation circuit does not have to be the reactor current variable type (commonly called TCR method) as shown in the figure.

前記サイリスタスイッチ5で制御される直列リアクトル
4は第2図に示すように、3相間にΔ接続される。
The series reactor 4 controlled by the thyristor switch 5 is Δ-connected between the three phases as shown in FIG.

第1図にもどり、7はRTであり、点線で囲む8は制御装
置を示し、81は電圧検出器、82は減算器であり、83は調
節器であり、84はパルス発生器であり、P.T7よりの
母線電圧は減算器82で基準電圧Vrefと対比され、その差
電圧が、調節器83に入力され、特定な演算をなしたあ
と、その出力をパルス発生器84に入力し、このパルス発
生器出力によりサイリスタスイッチ5の点弧位相を制御
し、直列リアクトル4の通電を制御し、母線電圧の変動
を抑制する。
Returning to FIG. 1, 7 is RT, 8 is a controller surrounded by a dotted line, 81 is a voltage detector, 82 is a subtractor, 83 is a controller, 84 is a pulse generator, P. The bus voltage from T7 is compared with the reference voltage Vref by the subtractor 82, and the difference voltage is input to the controller 83, and after performing a specific calculation, its output is input to the pulse generator 84 and this pulse The ignition phase of the thyristor switch 5 is controlled by the output of the generator, the energization of the series reactor 4 is controlled, and the fluctuation of the bus voltage is suppressed.

このような電圧検出系を含む制御装置8は各線間ごとに
設けられ、サイリスタスイッチ5の制御を行うが、不平
衡負荷による電圧変化は、関係のない他の相にも影響が
及び、各線間電圧を検出しただけでは次のような問題点
がある。
The control device 8 including such a voltage detection system is provided for each line and controls the thyristor switch 5. However, the voltage change due to the unbalanced load also affects other unrelated phases, and thus the lines There are the following problems only by detecting the voltage.

第3図Bは系統に単相のリアクトルXが負荷された場
合の回路図を示す。ただし系統の電源インピーダンスの
抵抗は無視するものとする。
Figure 3 B illustrates a circuit diagram of a case where a single-phase reactor X L is loaded to the system. However, the resistance of the power supply impedance of the system is ignored.

このとき、各相電圧の関係を第3図Aに示す。第1図に
示す81が線間電圧Vuvを検出しているものとすれば、
第3図Aに示すように、u−v間では、平衡線間電圧V
suvはVuvまで変動することになり、またv−w
間、w−u間についても同様に変化する。
At this time, the relationship between the phase voltages is shown in FIG. 3A. Assuming that 81 shown in FIG. 1 detects the line voltage Vuv,
As shown in FIG. 3A, a balanced line voltage V is generated between u and v.
suv will change to Vuv, and vw
Similarly, between w and u also changes.

ところが、このような単相リアクトル負荷が突発的に生
じ、それによる変動を可及的すみやかに抑制する場合を
考えると、u−v間,v−w間,w−u間共に、電圧が
降下しているため、各相制御回路は、直列リアクトル4
の電流をしぼり込み、母線電圧を上昇させようとする。
However, considering the case where such a single-phase reactor load suddenly occurs and the fluctuation due to the load is suppressed as soon as possible, the voltage drops across u-v, v-w, and w-u. Therefore, each phase control circuit is connected to the series reactor 4
Current is squeezed to increase the bus voltage.

現実には、u−v間リアクトルのみ動作するだけでよい
ところが、各相全て動作し、互いに干渉しながら、変動
抑制をすることになるので、目標値に到達するのに、時
間がかかってしまう。
In reality, only the u-v reactor needs to operate, but since all phases operate and they interfere with each other, fluctuations are suppressed, so it takes time to reach the target value. .

すなわち、従来の方式でも最終的に変動を抑制した状態
で落着くのであるが、突発的変動に速応することはむつ
かしい。
In other words, even in the conventional method, the fluctuation is finally suppressed in a settled state, but it is difficult to quickly respond to the sudden fluctuation.

〔発明の開示〕 以上説明したように、従来のこの種電圧変動抑制装置に
よれば、その制御装置に問題があり、本発明は不平衡負
荷による電圧を検出し、無効電力補償装置によって、こ
の電圧変動を抑制しようとする回路において、各線間電
圧を検出し、それぞれの相の無効電力補償装置に対応す
る線間電圧変動分5倍し、他の2相に変動分の和と減算
し、その結果を2/9倍することによって、各相間で互に
干渉を受けずに、独立に電圧変動補償をすべき情報に変
換し、無効電力補償装置に利用しようとするものであ
り、不平衡、かつ急峻に変動している場合の母線電圧変
動抑制を迅速に行なうものである。
DISCLOSURE OF THE INVENTION As described above, according to the conventional voltage fluctuation suppressing device of this kind, there is a problem in the control device, and the present invention detects the voltage due to the unbalanced load, and In a circuit that tries to suppress voltage fluctuations, each line voltage is detected, the line voltage fluctuation corresponding to the reactive power compensator of each phase is multiplied by 5, and the other two phases are subtracted from the sum of the fluctuations. By multiplying the result by 2/9, each phase will be independently converted into information that should be compensated for voltage fluctuations without being interfered with each other, and it will be used in the reactive power compensator. In addition, the bus voltage fluctuation can be quickly suppressed when the fluctuation fluctuates sharply.

以下第4図に示す本発明の制御回路の実施例について説
明する。
An embodiment of the control circuit of the present invention shown in FIG. 4 will be described below.

第4図の回路は第1図のPT7、電圧検出器81、減算器
82よりなる部分を3相回路で示し、これと、これにつな
がる制御情報形成部を示している。
The circuit of FIG. 4 is composed of the PT7, voltage detector 81, and subtractor of FIG.
The part consisting of 82 is indicated by a three-phase circuit, and the control information forming part connected to this is shown.

まず各相電圧は母線3よりΔ− 結線のPTに入力する。PTの2次中性点を以後の制御
装置のコモン端子とすれば、上記PTにより、母線の線
間電圧が測定できることになる。次に電圧検出器811,8
12,813で各線間電圧Vuv,Vvw,Vwuを直流に
変換し、減算器82で基準電圧Vrefと対比し、その差(各
線間電圧変動)ΔVuv,ΔVvw,ΔVwuを求め
る。
First, each phase voltage is Input in PT of connection. If the secondary neutral point of PT is used as the common terminal of the subsequent control device, the line voltage of the bus bar can be measured by the PT. Next, voltage detectors 81 1 , 8
1 2, 81 3 with line voltages Vuv, converts Vvw, the Vwu to DC, versus the reference voltage Vref by the subtracter 82 calculates the difference (line-to-line voltage variations) ΔVuv, ΔVvw, the DerutaVwu.

上記のようにして求まった三つの制御量ΔVuv,ΔV
vw,ΔVwuを図の点線85で囲む演算回路に入力し、
以下の定義による三つの制御量ΔV′uv,ΔV′v
w,ΔV′wuを求める。
The three control amounts ΔVuv, ΔV obtained as described above
Input vw and ΔVwu to the arithmetic circuit surrounded by the dotted line 85 in the figure,
Three control variables ΔV′uv and ΔV′v defined below
Determine w, ΔV′wu.

851はそれぞれ加算器を示し、852は5倍乗算器、853は2
/9倍の減算器をそれぞれ示す。
851 is an adder, 852 is a 5 times multiplier, and 853 is 2
/ 9 times the subtractors.

このΔV′uv,Δ′Vvw,Δ′Vwuを第1図の調
節器83にそれぞれ入力する。
These ΔV′uv, Δ′Vvw, and Δ′Vwu are input to the controller 83 of FIG. 1, respectively.

すなわち、各線間の無効電力をそれぞれ独立に、ΔV′
uv,Δ′Vvw,Δ′Vwuを補償するだけの値の制
御をすればよいということである。
That is, the reactive power between the lines is independently calculated by ΔV ′.
This means that it is only necessary to control the values so as to compensate uv, Δ′Vvw, and Δ′Vwu.

このような信号によれば、従来使用されていた信号、Δ
Vuv,ΔVvw,ΔVwuとは違い、第3図に示すよ
うな例においても、相互干渉せずに、各相独立に制御す
べき目標値を知ることができる。
According to such a signal, the previously used signal, Δ
Unlike Vuv, ΔVvw, and ΔVwu, even in the example shown in FIG. 3, the target value to be controlled independently for each phase can be known without mutual interference.

以上は本発明の構成を述べたものであるが、次に前記
(1)式の導出の根拠を示す。
The above is the description of the configuration of the present invention.
The basis for deriving Eq. (1) is shown below.

第2図に示すように、u,v,wなる電流を定め
る。
As shown in FIG. 2, the currents u, v, w are determined.

第1図パルス発生器84により、uv,vw,wu
の3つの電流が制御され、母線3をu,v,wの
電流となって流れる。このことにより母線3のu−v
間、v−w間、w−u間電圧が制御されるわけである
が、以下にuv,vw,wuによる母線電圧変動
の影響を分析する。
Fig. 1 uv, vw, wu by the pulse generator 84
Are controlled to flow as currents u, v, and w on the bus 3. As a result, uv of the bus bar 3
The voltage between V, V, and W is controlled, and the influence of the bus voltage fluctuation due to uv, vw, and wu is analyzed below.

まず、次のようにベルトルの基準をu−v間電圧に定め
ると、 ただし、 一方、u−v間、v−w間、w−u間電圧のu,
v,wによる変動をΔuv,Δvw,Δwuと
し、電源インピーダンスをjXsとすれば となる。
First, when the standard of Bertrel is set to the voltage between u and v as follows, However, On the other hand, u, v, v, w
If the fluctuations due to v and w are Δuv, Δvw, and Δwu, and the power source impedance is jXs, Becomes

ここで、u,v,wとuv,vw,wuと
の間には次の関係がある。
Here, there is the following relationship between u, v, w and uv, vw, wu.

(2)〜(4)式より次式が求まる。 The following equation is obtained from equations (2) to (4).

従ってu−v間電圧変動幅ΔVuvとしては、次式とな
る。
Therefore, the uv voltage fluctuation width ΔVuv is expressed by the following equation.

同様に、v−w間電圧を基準ベクトルとして、(2)〜(5)
式の過程をふめば、 w−u間についても同様に、 (5)〜(7)式を次の(8)式にまとめる。
Similarly, using the voltage between v and w as a reference vector, (2) to (5)
Considering the process of the formula, Similarly between w and u, The formulas (5) to (7) are summarized in the following formula (8).

ここで、uv,vw,wuがそれぞれ単独に流れ
た場合の母線電圧変動をΔV′uv,ΔV′vw,Δ
V′wuとすれば、 (9),(8)式より次式が求まる。
Here, the bus voltage fluctuations when uv, vw, and wu individually flow are ΔV′uv, ΔV′vw, Δ.
If V'wu, From equations (9) and (8), the following equation is obtained.

〔動作及び効果〕 第3図の例で考えると、 従来は上記の値を、直接に対応する相の線間無効電力制
御に用いていたため、変動を発生させた負荷のある相u
−v間以外の相(v−w,w−u)の抑制装置が動作し
てしまい、効率的でなかった。
[Operation and Effect] Considering the example of FIG. 3, Conventionally, since the above value is directly used for the line reactive power control of the corresponding phase, the phase u having a load that causes a fluctuation
The phase (vw, wu) suppressor other than between -v worked and was not efficient.

しかし、本発明の検出装置によれば、(1)式より、 すなわち、u−v間のみに電圧変動が検出され、v−w
間、w−u間には電圧変動が検出されない。この信号に
より、u−v間のみ電圧を上昇させるべく、リアクトル
に制御が加えられ、v−w,w−u間リアクトルには制
御動作を必要としないことになり、単相変動負荷に対し
て、他相からの干渉を受けず、適確かつ高速の制御が行
なえる。
However, according to the detection device of the present invention, from the equation (1), That is, the voltage fluctuation is detected only between uv and v-w.
During this period, no voltage fluctuation is detected between w and u. Due to this signal, the reactor is controlled so as to increase the voltage only between u and v, and the reactor between vw and wu does not require control operation. , It is possible to perform proper and high-speed control without receiving interference from other phases.

以上は、変動負荷が単相リアクトルの例で述べたが、い
かなる不平衡負荷においても、同様の対応ができること
はいうまでもない。
Although the variable load has been described as an example of the single-phase reactor, it is needless to say that the same measure can be applied to any unbalanced load.

以上は、変動負荷が単相リアクトルの例で述べたが、い
かなる不平衡負荷においても、同様の対応ができること
はいうまでもない。
Although the variable load has been described as an example of the single-phase reactor, it is needless to say that the same measure can be applied to any unbalanced load.

もし、電圧変動を発生させている負荷の電流が、計測で
きるならば、負荷の無効電力を検出し、その出力信号を
第1図の調節器83の出力に加算して、リアクトルを制御
すれば、上記無効電力検出制御の残留電圧変動分が本発
明の制御系で修正されるような方向で働くことになる。
If the current of the load causing the voltage fluctuation can be measured, the reactive power of the load is detected, and its output signal is added to the output of the regulator 83 in FIG. 1 to control the reactor. The residual voltage fluctuation amount of the reactive power detection control described above works in such a direction as to be corrected by the control system of the present invention.

以上説明したように、本発明は不平衡電圧変動を速応で
抑制することができる。
As described above, the present invention can quickly suppress unbalanced voltage fluctuations.

【図面の簡単な説明】[Brief description of drawings]

第1図は電圧変動抑制装置の一例を示す。第2図はサイ
リスタスイッチで制御される直列リアクトルの接続を示
す。 第3図Bは系統に単相のリアクトルが負荷された場合の
回路図であり、同Aは前記単相リアクトルが負荷された
場合の相間電圧の変動を示す説明図である。 第4図は本発明の制御装置の一例を示す。 1……無限大母線、2……電源インピーダンス、3……
母線、4……直列リアクトル、5……サイリスタスイッ
チ、6……並列コンデンサ、7……PT、8……制御装
置、81……電圧検出器、82……減算器、83……調節器、
84……パルス発生器。
FIG. 1 shows an example of the voltage fluctuation suppressing device. FIG. 2 shows the connection of a series reactor controlled by a thyristor switch. FIG. 3B is a circuit diagram when a single-phase reactor is loaded in the system, and FIG. 3A is an explanatory diagram showing a change in interphase voltage when the single-phase reactor is loaded. FIG. 4 shows an example of the control device of the present invention. 1 ... Infinity bus, 2 ... Power source impedance, 3 ...
Bus line, 4 ... Series reactor, 5 ... Thyristor switch, 6 ... Parallel capacitor, 7 ... PT, 8 ... Control device, 81 ... Voltage detector, 82 ... Subtractor, 83 ... Regulator,
84-Pulse generator.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】不平衡負荷による電圧を検出し、無効電力
補償装置によってこの電圧変動を抑制しようとする回路
において、3相各線間電圧を検出し、基準電圧との差で
ある線間電圧変動分を求め、一つの前記電圧変動分を5
倍し、他の二つの前記電圧変動分の和と減算し、その結
果を2/9倍することによって、相間で互に干渉を受けず
に、独立に電圧変動補償をすべき情報に変換し、無効電
力制御装置の制御に利用したことを特徴とする電圧変動
抑制装置。
1. A circuit for detecting a voltage due to an unbalanced load and for suppressing this voltage fluctuation by a reactive power compensator, detects each three-phase line voltage and detects a line voltage fluctuation which is a difference from a reference voltage. And calculate one of the voltage fluctuations by 5
By multiplying it, subtracting it from the sum of the other two voltage fluctuations, and multiplying the result by 2/9, the information is independently converted into information that should be compensated for voltage fluctuations without interfering with each other. A voltage fluctuation suppressing device characterized by being used for control of a reactive power control device.
JP58107555A 1983-06-15 1983-06-15 Voltage fluctuation suppression device Expired - Lifetime JPH0668710B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58107555A JPH0668710B2 (en) 1983-06-15 1983-06-15 Voltage fluctuation suppression device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58107555A JPH0668710B2 (en) 1983-06-15 1983-06-15 Voltage fluctuation suppression device

Publications (2)

Publication Number Publication Date
JPS602028A JPS602028A (en) 1985-01-08
JPH0668710B2 true JPH0668710B2 (en) 1994-08-31

Family

ID=14462149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58107555A Expired - Lifetime JPH0668710B2 (en) 1983-06-15 1983-06-15 Voltage fluctuation suppression device

Country Status (1)

Country Link
JP (1) JPH0668710B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62234755A (en) * 1986-04-03 1987-10-15 Honda Motor Co Ltd Rear view mirror fitting device for vehicle

Also Published As

Publication number Publication date
JPS602028A (en) 1985-01-08

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