JPH067338B2 - Waveform data forming circuit for tone synthesis - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention forms waveform data representing a smoothly changing waveform based on a plurality of sets of waveform data selectively output from a waveform data generation circuit. The present invention relates to a waveform data forming circuit for synthesizing musical sounds.

(Prior Art) Conventionally, a waveform data forming circuit of this type is disclosed in, for example, Japanese Patent Laid-Open No.
As disclosed in Japanese Patent Laid-Open No. 1-107298, it is composed of storage means capable of storing one set of waveform data, subtraction means, addition means and gain control means, and is stored from waveform data repeatedly output by a waveform data generation circuit. Subtracts the waveform data read and output by the means, controls the gain of the difference data that is the subtraction result and is supplied to the adding means, and reads the difference data whose gain is controlled by the storage means. The waveform data which is gradually approached to the waveform data input from the waveform data generation circuit is formed and output by repeating the operation of adding the waveform data to the waveform data and storing the addition result again in the storage means.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional waveform data forming circuit,
Since the waveform data formed and output always approaches the waveform data input from the waveform data generating means, there is a problem that this waveform data forming circuit can be applied only to a very limited tone synthesis method. That is, the circuit can be applied only to a tone synthesis method in which a plurality of reference waveform data are sequentially input and a waveform that changes while smoothly interpolating these reference waveforms is obtained. A method of inputting waveform data representing a waveform across a pitch and convoluting (accumulating) the input waveform data to synthesize a musical tone, and inputting difference data representing a difference from a certain reference waveform to another reference waveform Then, it cannot be applied to a method of synthesizing a musical sound whose waveform is changed based on the difference data.

The present invention has been devised in view of the above problems, and an object thereof is to provide a waveform data forming circuit for tone synthesis which can be applied to various tone synthesis methods.

(Means for Solving Problems) In order to solve the above problems and achieve the object of the present invention,
The structural feature of the present invention is a waveform data forming circuit for synthesizing a musical tone by forming waveform data representing a smoothly changing waveform based on a plurality of sets of waveform data selectively output from the waveform data generating circuit. The storage means for storing one set of waveform data, the subtraction means for subtracting the waveform data read out and output from the storage means from the waveform data output by the waveform data generation circuit, and the subtraction means. Of the waveform data read from the storage means and added to the storage means and supplied to the storage means, and a gain control for controlling the gain of the waveform data supplied from the subtraction means to the addition means. Means and a waveform from the storage means to the subtraction means according to a control signal provided in the supply path of the waveform data from the storage means to the subtraction means. In that a gate means for allowing or prohibiting the supply of the over data.

(Operation of the Invention) In the present invention configured as described above, if the gate means is controlled so as to allow the supply of the waveform data from the storage means to the subtraction means, the waveform data forming circuit according to the present invention has the above-mentioned structure. It becomes equivalent to the waveform data forming circuit, and can be applied to a musical sound synthesizing means for obtaining a changing waveform while smoothly interpolating a reference waveform, as in the conventional case. Contrary to the above case, if the gate means is controlled so as to prohibit the supply of the waveform data from the storage means to the subtraction means, the addition means causes the waveform data stored in the storage means and the waveform data generation circuit. The waveform data forming circuit according to the present invention operates in such a manner that the waveform data forming circuit according to the present invention is added to the waveform data which is output from the gain control means and whose gain is controlled by the gain control means (including the gain "1") and supplied to the storage means. It can be applied to the musical tone synthesis method using the convolution and difference data.

(Effect of the Invention) As can be understood from the above description of the operation, the waveform data forming circuit according to the present invention can be applied to various musical tone synthesizing methods, so that the utility value of the forming circuit is increased and
It becomes possible to synthesize various musical tones using a single same forming circuit.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an electronic musical instrument to which a waveform data forming circuit according to the present invention is applied.

This electronic musical instrument has a key switch circuit 11 and a tone color selection switch circuit 12. The key switch circuit 11 is composed of a plurality of key switches corresponding to the respective keys of the keyboard, and the switches are opened and closed according to the pressing and releasing of the keys. A key press detection circuit 13 is connected to the key switch circuit 11, and the detection circuit 13 detects the opening and closing of each key switch in the key switch circuit 11 to detect the pressing and releasing of each key on the keyboard. The key code KC representing the key pressed on the keyboard and the high level “1” (hereinafter simply “1”) when the key is pressed, and the low level “0” (hereinafter simply “1”) when the key is released. It outputs a key-on signal KON which is "0").

The tone color selection switch circuit 12 is composed of a plurality of tone color selection switches corresponding to the respective operators of the tone color selection operator group provided on the front panel of the electronic musical instrument, and each switch operates the tone color selection operators. Open and close each according to. It opens and closes according to the operation of the tone color selection operator. A tone color selection signal generation circuit 14 is connected to the tone color selection switch circuit 12, and the generation circuit 14 detects the opening and closing of each switch in the tone color selection switch circuit 12 to detect the first tone color designation signal TS1. The two tone color designation signal TS2 and the tone group designation signal SEL are output. in this case,
When the tone color selection switch belonging to the first tone group (corresponding to the musical tone synthesized based on the output data from the first waveform memory 41 described later) in the tone color selection switch circuit 12 is closed. Is a signal representing the closed tone color selection switch, and the second tone color designation signal TS2 is synthesized based on the second tone group in the tone color selection switch circuit 12 (based on output data from the second waveform memory 42 described later). This is a signal representing the closed tone color selection switch when the tone color selection switch belonging to the musical tone) is closed. Also,
The tone group designation signal SEL indicates which tone group belongs to which tone color selection switch is closed, and "1" indicates that the tone color selection switch belonging to the first tone group is closed. Moreover, "0" indicates that the tone color selection switch belonging to the second tone group is closed.

These key depression detection circuit 13 and tone color selection signal generation circuit 1
An address generator 20 is connected to 4. As shown in detail in FIG. 2, the address generator 20 includes a common address designation unit 2 common to the first and second waveform memories 41 and 42.
0a, the first addressing unit 20 for the first waveform memory 41
b, and the second addressing section 2 for the second waveform memory 42
0c.

The common address designator 20a is a note clock generator 21.
Have. The note clock generator 21 uses the key code K
Based on C, a note clock signal φ _n having a frequency m times the pitch frequency of the pressed key (m is the number of sample points in one cycle of the musical tone) is output. The note clock signal φ _n is input to the counter 22, and the counter 22 counts the note clock signal φ _n to obtain “0” to “m”.
The count value that repeatedly changes over "-1" is output as the address signal AD1, and the count value is "m-
The carry signal CA is output every time the value changes from "1" to "0". A key-on pulse signal KONP obtained by differentiating the key-on signal KON by a differentiating circuit 23 is supplied to a reset terminal R of the counter 22, and the counter 22 is reset when a key is pressed in response to the arrival of the key-on pulse signal KONP. It is supposed to be done.

The first addressing unit 20b has a counter 24, and the counter 24 counts the carry signal CA from the counter 22 to output a count value that is incremented by "1" for each cycle of the address signal AD1. The reset terminal R of the counter 24 is supplied with a key-on pulse signal KONP and a match signal EQ1 from a comparator 25 described later via an OR circuit OR1, and the counter 24 receives the key-on pulse signal KONP or the match signal EQ1. In response to the key depression or the generation of the coincidence signal EQ1 from the comparator 25, it is reset. Counter 2
The count value output from 4 is supplied to one input of the comparator 25, and the repeat count value is supplied from the repeat count memory 26 to the other input of the comparator 25. The repeat count memory 26 stores the count value (the number of cycles) for repeatedly outputting the same waveform data stored in the waveform memory 41 for each waveform. The count value from the first tone color designation signal TS1 and the counter 27 ( The repeat count value is output according to the address signal AD21). As a result, the comparator 25 outputs the coincidence signal EQ1 to reset the counter 24 via the OR circuit OR1 at the time when the count value from the counter 24 matches the repeat count value from the repeat count memory 26, and at the same time, The coincidence signal EQ is supplied to the counter 27 via one input of the AND circuit AND1. The counter 27 counts the supplied coincidence signal EQ from "0" and outputs a count value that is incremented by "1" as the address signal AD21. An end detection circuit 28 is connected to the other input of the AND circuit AND1, and the detection circuit 28 outputs a signal representing "1" when the address signal AD21 is "0" to "P-2". And the address signal AD21 becomes "P-1", a signal representing "0" is supplied to the other input. As a result, the counter 27 increments its count value from "0" by "1" in response to the arrival of the coincidence signal EQ1, and then "0" to "P-1".
The address signal AD21 that changes to is output. The key-on pulse signal KO is applied to the reset terminal R of the counter 27.
NP is supplied, and the counter 27 is reset when a key is pressed.

The second addressing unit 20c has a counter 31, and the counter 31 counts the carry signal CA from the counter 22 to output a count value that is incremented by “1” for each cycle of the address signal AD1. The reset terminal R of the counter 31 is supplied with a key-on pulse signal KONP and a match signal EQ2 from a comparator 32 described later via an OR circuit OR2, and the counter 31 receives the key-on pulse signal KONP or the match signal EQ2. According to the above, it is reset when the key is pressed or when the coincidence signal EQ2 is generated from the comparator 32. Counter 3
The count value output from 1 is supplied to one input of the comparator 32, and the output count value from the output count memory 33 or the stop count value from the stop count memory 34 is input to the other input of the comparator 32. It is selectively supplied via 35. The output number memory 33 stores the number of times (the number of cycles) for repeatedly reading and outputting the same waveform data stored in the waveform memory 42 for each waveform. The count value from the second tone color designation signal TS2 and the counter 36 is stored in the output number memory 33. The output count value is output according to (address signal AD22).
The stop count memory 34 generates the carry signal CA during the time from the time when the same waveform data is repeatedly read and output until the time when new waveform data is repeatedly read and output, that is, the time when the reading of the waveform data from the waveform memory 42 is interrupted. A stop count value expressed corresponding to the number is stored for each waveform, and the stop count value is output according to the second tone color designation signal TS2 and the count value (address signal AD22) from the counter 36. The selector 35 selectively outputs the output count value from the output count memory 33 or the stop count value from the stop count memory 34 according to the signal OUT supplied from the output terminal Q of the flip-flop circuit 37. When the signal OUT is "0", the output count value is output, and when the signal OUT is "0", the stop count value is output. Accordingly, when the signal OUT is “1”, the comparator 32 determines that the match signal EQ is reached when the count value from the counter 31 matches the output count from the output count memory 33.
At the same time as outputting 2 to reset the counter 31, the coincidence signal EQ2 is supplied to one input of the AND circuit AND3 via the AND circuit AND2. Also, the same comparator 3
When the signal OUT is “0”, the counter 2 outputs the coincidence signal EQ2 and outputs the coincidence signal EQ2 when the count value from the counter 31 coincides with the stop count value from the stop count memory 34.
Simultaneously with resetting 1, the coincidence signal EQ2 is supplied to one input of the AND circuit AND3 via the AND circuit AND2.

The other input of the AND circuit AND3 is supplied with a signal ▲ ▼ obtained by inverting the signal OUT by the inverter INV1, and the AND circuit AND3 outputs the signal OUT of “0”.
The coincidence signal EQ2 is supplied to the counter 36 only when.
The key-on pulse signal KONP is supplied to the reset terminal R of the counter 36, the counter 36 is reset when the key is pressed, and the coincidence signal EQ from the AND circuit AND3 is supplied.
A count value that is incremented by "1" at every arrival of 2 is output as the address signal AD22. The coincidence signal EQ2 output from the AND circuit AND3 is also supplied to the set terminal S of the flip-flop circuit 37 via one input of the OR circuit OR3, and the key-on is supplied to the other input of the OR circuit OR3. The flip-flop circuit 37 is set together with the pulse signal KONP. The output terminal of the AND circuit AND4 is connected to the reset terminal R of the flip-flop circuit 37, and the AND circuit AND4 outputs the signal OUT and the coincidence signal EQ2 from the AND circuit AND2.
When both signals OUT and EQ2 are "1", the flip-flop circuit 37 is reset.

An end detection circuit 38 is connected to the counter 36. The detection circuit 38 inputs the address signal AD22 from the counter 36, and the address signal AD22 is from "0" to
If "Q-2", the signal representing "1" is given to the OR circuit OR4.
One of the inputs is supplied, and when the address signal AD22 is detected to be "Q-1", a signal representing "1" is supplied to the same input. The signal OUT is supplied to the other input of the OR circuit OR4, and the OR circuit OR4 has the address signal AD22 of "Q-1" and the signal OU.
AND circuit AND from comparator 32 only when T is "0"
3 is prohibited from being supplied with the coincidence signal EQ2, and otherwise the supply of the coincidence signal EQ2 is permitted. Further, the address generator 20 inputs the tone group designation signal SEL from the tone color selection signal generation circuit 14 and outputs the same signal SEL as it is as the first memory enable signal ME1, and also outputs the same signal SEL to the inverter circuit INV2 and the AND circuit. AND
Second memory enable signal ME through one input of
Output as 2. The signal OUT is supplied to the other input of the AND circuit AND5, and the second memory enable signal ME2 becomes "1" only when the sound group designating signal SEL is "0" and the signal OUT is "1". , Otherwise, it becomes “0”.

The first waveform memory 41 has waveform data memories 41-1, 41-2 ... 41-n corresponding to the n tone colors of the first tone group and designated by the first tone color designation signal TS1. Each of the waveform data memories 41-1, 41-2, ... 41-n is divided into _P areas E ₀ , E _1, ... E _P-1 designated by the address signal AD21. Each area E ₀ , E ₁ ... E _P-1 represents an instantaneous value of a musical tone waveform and stores m sampling data corresponding to one cycle of the musical tone, and each sampling data is an address signal AD1. Is addressed by. Further, the first memory enable signal ME1 is supplied to the first waveform memory 41, and when the signal ME1 is “1”, the memory 41 is supplied.
The reading of the sampling data from the memory 41 is permitted, and the reading of the sampling data from the memory 41 is prohibited when the signal ME2 is "0".

The second waveform memory 42 has waveform data memories 42-1, 42-2 ... 42-k corresponding to k tone colors of the second tone group and designated by the second tone color designation signal TS2. Each of the waveform data memories 42-1, 42-2, ... 42-k is divided into _Q areas E ₀ , E _1, ... E _Q-1 designated by the address signal AD22. Each of the areas E ₀ , E ₁ , E ₂ ... E _Q-1 represents the difference value of the instantaneous value of the musical tone waveform and stores m pieces of difference data corresponding to one cycle of the musical tone. The difference data is addressed by the address signal AD1. The second memory enable signal ME2 is supplied to the second waveform memory 42. When the signal ME2 is "1", the differential data can be read from the memory 42 and the signal ME2 is also allowed.
Is 0, reading of the difference data from the memory 42 is prohibited.

An adder 43 is connected to the outputs of the first waveform memory 41 and the second waveform memory 42, and the adder 43 adds the data from the memories 41 and 42 and outputs it. However,
In this case, the first and second waveform memories 41 and 42 selectively output the sampling data or the difference data by the sound group designating signal SEL, so that the adder 43 functions as an OR circuit group.

A waveform data forming circuit 50 is connected to the output of the adder 43, and the circuit 50 is composed of a subtractor 51, a multiplier 52, an adder 53, a shift register 54, and a gate circuit 55. The subtractor 51 subtracts the sampling data supplied from the final stage of the shift register 54 via the gate circuit 55 from the data supplied from the adder 43, and outputs difference data resulting from the subtraction to the multiplier 52. The multiplier 52 multiplies the difference data by the gain coefficient g and supplies the result to one input of the adder 53. This gain coefficient g
Is from the first or second gain coefficient memory 61, 62 to the adder 6
It is supplied via 3. The first gain coefficient memory 61 is the first
A first tone color designation signal TS1 corresponding to n tones of a tone group
Gain coefficient data memories 61-1 and 61 specified by
-2 ... 61-n. Each gain coefficient data memory 61-1,61-2 ··· 61-n is stored to the P gain coefficient data _{g 10, g 11 ··· g 1P} -1 , each of which is addressed by the address signal AD21 Therefore, the first memory enable signal ME1 is "1" when reading each data.
Is allowed only when The second gain coefficient memory 62 is the second
A second tone color designation signal TS2 corresponding to the k tone colors of the tone group
Gain coefficient data memories 62-1 and 62-2 specified by
-2 ... 62-k. Each gain coefficient data memory 62-1, 62-2 ... 62-k stores Q gain coefficient data g ₂₀ , g ₂₁ ... G _2Q-1 each addressed by the address signal AD22. Therefore, the second memory enable signal ME2 is “1” when reading each data.
Is allowed only when

The other input of the adder 53 is supplied with the sampling data from the final stage of the shift register 54,
The adder 43 adds the sampling data and the input data from the multiplier 52 and supplies the result to the first stage of the shift register 54. The shift register 54 has m stages that store m pieces of sampling data corresponding to one period of the tone waveform, and the sampling data stored in each stage is sequentially shifted by the note clock signal φ _{n and} is turned on. It is adapted to be reset by the pulse signal KONP. The gate circuit 55 controls the supply of the sampling data from the shift register 54 to the subtractor 51 according to the first memory enable signal ME1, and when the signal ME1 is “1”, the supply of the data is allowed, and When the signal ME1 is "0", the supply of the data is prohibited.

A multiplier 64 is connected to the output of the adder 53, and the multiplier 64 multiplies the data from the adder 53 by the envelope waveform data and outputs the result. This envelope waveform data is supplied from the envelope generator 65, and the generator 65 forms and outputs envelope waveform data representing the envelope waveform of a musical tone in response to the key-on signal KON from the key depression detection circuit 13. Further, this envelope waveform has the first and second tone color designation signals TS1, T
It is controlled by S2 and the tone group designation signal SEL, and is formed into a shape suitable for the tone color of each musical tone.

A digital-analog converter 66 is connected to the multiplier 64, and the converter 66 converts the digital signal from the multiplier 64 into an analog signal and outputs it to the sound system 67. The sound system 67 is composed of an amplifier, a speaker, etc., and has a digital analog converter 66.
Generates a musical sound in accordance with the analog signal supplied from.

The operation of the embodiment configured as described above will be described. First, the case where the player selects the tone color of the first tone group will be described. In this case, the tone color selection switch corresponding to the selected tone color in the tone color selection switch circuit 12 is closed, and the tone color selection signal generation circuit 14 causes the first tone color designation signal TS1 representing the selected tone color in the first tone group. And a sound group designation signal SEL representing "1" is output. This sound group designation signal S
The EL is supplied with the address generator 20, and the generator 20 outputs the same signal SEL as it is to the first memory enable signal ME.
Since it is output as 1, the enable signal ME1 becomes "1". Further, the sound group designation signal SEL is output to the second via the inverter circuit INV2 and the AND circuit AND5.
Since it is output as the memory enable signal ME2, the enable signal ME2 becomes "0". The first and second memory enable signals ME1 and ME2 enable the first waveform memory 41 and the first gain coefficient memory 61 to read data, and the second waveform memory 42 and the second waveform memory 42
The gain coefficient memory 62 is set in the data unreadable state, and the gate circuit 55 is set in the conductive state.

In this state, when any key is pressed on the keyboard and the key switch corresponding to the pressed key in the key switch circuit 11 is closed, the key press detection circuit 13 detects this key press and presses it. The key code KC representing the generated key and the key-on signal KON are supplied to the address generator 20. In the address generator 20, the differentiating circuit 23 outputs the key-on signal K.
Key-on pulse signal KONP by differentiating ON
And the counters 22, 24 and 27 are reset by the key-on pulse signal KONP. The key-on pulse signal KONP is also supplied to the shift register 54 of the waveform data forming circuit 50, and the shift register 54 is reset. The operation is also started in the second address specifying unit 20c, but in this case, the second memory enable signal ME2 is "0", the waveform memory 42 and the gain coefficient memory 46 are in the data read stop state, and Since the operation of the designating section 20c is not related to the generation of a musical sound, its explanation is omitted.

After these resets, the counter 22 in the address generator 20 counts the note clock signal φ _n and outputs “0”.
Address signal AD that repeatedly changes from 1 to "m-1"
1 is supplied to the waveform memory 41. The waveform memory 41 is supplied with the first tone color designation signal TS1 representing the tone color selected by the player from the tone color selection signal generation circuit 14, and the address signal AD21 set to "0" by the reset is counted. 27, and the memory 41 stores m sampling data stored in the area E ₀ in the waveform data memory 41-i (i is an integer of 1 to n) corresponding to the selected tone color. The data is sequentially read according to the address signal AD1, and the waveform data is sequentially and repeatedly output to one input of the subtracter 51 of the forming circuit 50 via the adder 43.

In such a case, since the gate circuit 55 is in the conductive state as described above, the sampling data from the final stage of the shift register 54 is supplied to the other input of the subtractor 51, and the subtractor 51 is connected to the waveform memory 41. The sampling data from the shift register 54 is subtracted from the sampling data from and the subtracted difference data is output to the multiplier 52. The multiplier 52 is set to “0” from the gain coefficient data memory 61-i (i is an integer of 1 to n) in the first gain coefficient memory 61 designated by the first tone color designation signal TS1. The gain coefficient data g ₁₀ read by the address signal AD21 being supplied is supplied through the adder 63, and the multiplier 52 is connected to the subtracter 5
The output data of 1 is multiplied by the gain coefficient data g ₁₀ and supplied to one input of the adder 53. The adder 53 adds the supplied data and the sampling data from the final stage of the shift register 54 to add the first data of the register 54.
Since it is supplied to the stage, the shift register 54 cyclically stores the sampling data in the register while correcting it according to the difference data from the subtracter 51 via the multiplier 52. As a result, the sampling data stored in the shift register 54 is stored in the waveform data memory 41-i.
Gradually approaches the sampling data stored in the area E ₀ .

On the other hand, the sampling data supplied to the first stage of the shift register 54 is also supplied to the multiplier 64, and is multiplied by the envelope waveform data supplied from the envelope generator 65 supplied from the envelope generator 65 in the multiplier 64. It is then supplied to the digital-analog converter 66. The sampling data multiplied by the envelope waveform data is converted into an analog signal by the digital analog converter 66, and this analog signal is supplied to the sound system 67, and the system 67 generates a musical sound corresponding to this analog signal. . In this case, the reading of the sampling data from the waveform data memory 41-i and the cyclic storage of the sampling data in the shift register 54 are synchronized with the note clock signal φ _n , so that the generated musical sound is the key pressed by the keyboard. Corresponding to the musical tone frequency of
The waveform represented by the sampling data cyclically stored in the waveform data memory 41-i, that is, the waveform represented by the sampling data stored in the area E ₀ of the waveform data memory 41-i gradually changes and approaches.

In addition, after the lapse of time from the key depression, the count value of the counter 24 becomes the first tone color designation signal TS1 and the address signal A.
Repeat count memory 26 addressed by D21
When it becomes equal to the number of repetitions read from the comparator 2,
5 outputs the coincidence signal EQ1. The coincidence signal EQ1 resets the counter 24 to start counting from "0" again, and the counter 27 sets the count value to "1".
Then, the address signal AD21 is changed to "1". By changing the address signal AD21, the waveform data memory 41-i repeatedly outputs the sampling data stored in the area E ₁ . At the same time, the gain coefficient data memory 61-i outputs the gain coefficient data g ₁₁ . Also in this case, the waveform data forming circuit 50 reads the sampling data stored in the shift register 54, as in the case where the address signal AD21 is "0", in the area E ₁ of the waveform data memory 41-i. Gradually approach the sampling data. As a result, the musical sound generated by the sound system 67 gradually approaches the waveform output from the area E ₀ of the waveform data memory 41-i to the waveform output from the area E ₁ of the memory 41-i. In this way
As the address signal AD21 increases, the waveform of the musical sound generated from the sound system 67 becomes a waveform represented by the sampling data in the areas E ₀ , E ₁ , ... E _p-1 of the waveform data memory 41-i. It changes gradually. Then, when the second address signal AD2 reaches "p-1", the end detection circuit 28 outputs "0", so that the updating of the address signal AD21 by the counter 27 is stopped.

In this way, when the player selects the tone color of the first tone group, it is stored in each area E ₀ , E ₁ , ... E _p-1 of the waveform data memory 41-i. With the waveform represented by the sampling data as a reference, a tone having a waveform that changes while smoothly interpolating the reference waveform can be obtained.

Next, a case where the performer selects the tone color of the second tone group will be described. In this case, the tone color selection signal generation circuit 14 outputs the second tone color designation signal TS2 representing the selected tone color in the second tone group and the tone group designation signal SEL representing "0". This sound group designation signal SEL is supplied to the address generator 20, and the same generator SEL outputs the signal SEL as it is as the first memory enable signal ME1, so that the enable signal ME1 is always "0", and the first waveform The memory 41 and the first gain coefficient memory 61 are set in the data unreadable state, and the gate circuit 55 is set in the non-conductive state. The sound group designation signal SEL is supplied to one input of the AND circuit AND5 via the inverter circuit INV2, and the circuit AND5 supplies the supplied signal ▲.
The second memory enable signal ME is obtained by calculating the theoretical product of ▼ (= “1”) and the signal OUT from the flip-flop circuit 37.
2 is output, the circuit ME2 outputs the signal OUT
Is equal to.

In this state, when any key is pressed (time t _{0 in} FIG. 3), the key pressing detection circuit 13 sends the key code KC and the key-on signal KON to the address generator 20 as in the above case. Supply. In the address generator 20, the counter 22 is set to "0"-
The output of the address signal AD1 that repeatedly changes over "m-1" is started, the counters 31 and 36 are reset by the key-on pulse signal KONP from the differentiating circuit 23, and the flip-flop circuit 37 is the same signal KONP.
Set by

The shift register 54 is also reset by the key-on pulse signal KONP, as in the above case. Although the first address designating section 20b also starts the operation, the first memory enable signal ME1 is "0", the sampling data in the waveform memory 41 is not output, and the operation of the same designating section 20b generates a musical tone. Since it is not related to, the description is omitted.

In such a case, the signal OU from the flip-flop circuit 37
T is "1" by the above setting, the second memory enable signal ME2 is "1", and the address signal AD
Since 22 is set to "0" by the reset of the counter 36, the second waveform memory 42 is the waveform data memory 42-j (j is 1 to 1) corresponding to the selected tone color of the second tone group.
The difference data stored in the area E ₀ in any one of k) is added to the waveform data forming circuit 5 via the adder 43.
The value is repeatedly output to one input of the subtractor 51 of 0. At this time, since the gate circuit 55 is set to the non-conducting state as described above, the difference data is directly supplied to the multiplier 52. The multiplier 52 is set to “0” from the gain coefficient data memory 62-j (j is an integer of 1 to k) in the second gain coefficient memory 62 designated by the second tone color designation signal TS2. Address signal AD
The gain coefficient data g ₂₀ read by 22 is added by the adder 63.
The multiplier 52 multiplies the difference data by the gain coefficient data g ₂₀ and supplies it to one input of the adder 53. Since the adder 53 adds the supplied data and the sampling data from the final stage of the shift register 54 and supplies it to the first stage of the register 54, the shift register 54 uses the sampling data of the register 54 as a gain coefficient. The data is circularly stored while being cumulatively corrected according to the difference data obtained by multiplying the data g ₂₀ .

On the other hand, the sampling data supplied to the first stage of the shift register 54 is the same as the above case in the multiplier 64.
And a sound signal generated from a sound system 67 via a digital-analog converter 66. As a result, the waveform of the generated musical sound is the area E in the waveform data memory 42-j.
_The waveform is represented by the difference data stored in ₀ , and the amplitude increases every cycle of the musical tone.

In addition, when the time from the key depression elapses, the count value of the counter 31 becomes the second tone color designation signal TS2 and the address signal A.
When the output count value read from the output count memory 33 addressed by D22 and equal to the output count value selected by the selector 35 based on the signal OUT (= “1”) (time t _{1 in} FIG. 3), the comparator 32 outputs the coincidence signal EQ2. The coincidence signal EQ2 is supplied to the reset terminal R of the counter 31 via the OR circuit OR2 and also to one input of the AND circuit AND2. As a result, the counter 31 starts counting from "0" again. The signal OUT is applied to the other input of the AND circuit AND2.
Is "1" and the output signal of the OR circuit OR4 (= "1") based on the output signal of the end detection circuit 38 being "1" is supplied, and the AND circuit AND2 outputs the coincidence signal EQ2 ( = “1”) is AND circuit AND3, A
Supply to each one input of ND4. At this time, a signal ▲ is input to each one input of the AND circuits AND3 and AND4.
Since ▼ (= “0”) and OUT (= “1”) are supplied, the coincidence signal EQ2 (= “1”) is not supplied to the count 36, but to the reset terminal R of the flip-flop circuit 37. Only supplied. As a result, the address signal AD22 is maintained in the previous state, the flip-flop circuit 37 is reset, and the signal OUT becomes "0". By this signal OUT (= “0”), the selector 35 selectively outputs the stop count value from the stop count memory 34 to the comparator 32, and at the same time, the AND circuit AND5 outputs the second memory enable signal ME2 representing “0”. Come to do.
The second memory enable signal ME2 (= “0”) causes the second waveform memory 42 to stop outputting difference data, so that no data is supplied to one input of the adder 53 and the shift register 54 is The previously stored sampling data is circularly stored as it is via the adder 53. As a result, the musical tone waveform generated from the sound system 67 via the multiplier 64 and the digital-analog converter 66 is maintained in the previous state.

Further, after a lapse of time, the count value of the counter 31 becomes equal to the second tone color designation signal TS2 and the address signal AD22.
When the number of stop times is read from the stop number memory 34 addressed by and becomes equal to the stop number value selected by the selector 35 (time t _{2 in} FIG. 3), the comparator 32 outputs the coincidence signal EQ2. In this case, the OR circuit OR4 is "1" based on the output signal (= "1") of the end detection circuit 38.
Since the flip-flop circuit 37 outputs the signal OUT representing "0", the coincidence signal EQ2 is supplied to the counter 36 via the AND circuits AND2 and AND3 and the OR circuit. It is also supplied to the set terminal S of the flip-flop circuit 37 via OR3. As a result, the counter 36 increments and sets the address signal AD22 to "1", and the flip-flop circuit 37 is set to set the signal OUT to "1". By this signal OUT (= “1”), the second enable signal ME2 becomes “1” again, and the output of the differential data from the second waveform memory 42 is permitted. At this time, the address signal AD22 is because it is "1", the second waveform memory 42 is the waveform data memory area E ₁ in 42-j the difference data stored via the adder 43 waveform data forming circuit 50 Output to. Waveform data forming circuit 50, the time t ₀ ~t ₁ in the same manner as, the difference data to read based on the gain coefficient data memory 62-j from the "1" setting the address signal AD22 gain coefficient data g _The data multiplied by ₂₁ is repeatedly accumulated in the sampling data stored in the shift register 54, and the accumulated data is output. This enables the sound system 6
The tone waveform generated from No. 7 is a waveform in which the waveform based on the difference data output from the second waveform memory 42 is gradually accumulated to the previous tone waveform.

In this state, when a further time elapses and the count value of the counter 31 becomes equal to the output count value read from the output count memory 33 again (time t _{3 in} FIG. ₃ ), the comparator 32 outputs the coincidence signal EQ2. Output. This coincidence signal EQ2
As a result, the flip-flop circuit 37 is reset again, the output of the difference data from the waveform memory 42 is stopped, and the waveform of the musical sound output from the sound system 67 is maintained in the previous state.

In this way, the generated musical tone gradually changes according to the output of the difference data from the waveform memory 42 and the stop of the output. Then, the address signal AD22 from the counter 36
Reaches "Q-1" (time t2Q _{-2 in} FIG. 3), and the waveform memory 42 stores the difference stored in the area EQ _-1 in the waveform data memory 42-j corresponding to the same address signal AD22. When the data is repeatedly output, the end detection circuit 38 starts to supply a signal representing "0" to one input of the OR circuit OR4 based on the address signal AD22 (= "Q-1"). In this state, when the counter value of the counter 31 becomes equal to the output count value from the output count memory 33 again (time t _{2Q-1 in} FIG. 3), the comparator 32 causes the coincidence signal EQ.
2 is output. At this time, since the signal OUT from the flip-flop circuit 37 is "1" and the output signal of the OR circuit OR4 is also "1", the coincidence signal EQ2 is sent to the flip-flop circuit 37 via the AND circuits AND2 and AND4. It is supplied to the reset terminal R and resets the circuit 37. As a result, the signal OUT becomes “0”,
The output of the OR circuit OR4 also becomes "0", and thereafter, the comparator 3
Since the coincidence signal EQ2 from 2 is blocked by the AND circuit AND2, the counter 36 stops stepping and the flip-flop circuit 37 is maintained in the reset state. As a result, the output of the difference data from the waveform memory 42 is stopped, and the waveform of the generated tone is kept constant.

In this way, when the player selects the tone color of the second tone group, it is stored in each area E ₀ , E ₁ , ... E _Q-1 of the waveform data memory 42-j. It is possible to obtain a musical sound having a waveform that changes while smoothly accumulating the waveform represented by the difference data.

As can be understood from the above description of the operation, according to the above-described embodiment, only the conduction or non-conduction of the gate circuit 55 in the waveform data forming circuit 50 is controlled, and the instantaneous value of the tone waveform stored in the first waveform memory 41 is stored. On the basis of the sampling data representing the, the waveform represented by the data can be interpolated to synthesize a musical sound of a waveform that changes smoothly, and based on the difference data stored in the second waveform memory 42 and representing the incremental value of the musical tone waveform, Since it is possible to synthesize musical tones having a waveform that smoothly changes while accumulating or convolving the same data, various musical tone synthesizing methods can be performed using a single musical tone waveform data forming circuit 50.

In addition, the embodiment configured as described above may be modified as follows.

(1) In the above embodiment, the sampling data stored in the first waveform memory 41 or the second waveform memory 42
Although only one of the difference data stored in the above is used to form a time-varying one tone, the sampling data and the difference data are mixed to form the one tone. You may use it. In this case, at a certain time, the gate circuit 55
Is controlled to be in a conductive state so that the sampling data from the first waveform memory 41 is supplied to the waveform data forming circuit 50, and at other times, the gate circuit 55 is controlled to be in a non-conductive state and the second waveform memory 42 is controlled. The difference data of 1 may be supplied to the waveform data forming circuit 50. As a result, a plurality of basic waveform data are stored in the waveform memory 41 and difference data for modifying the basic waveform data are stored in the waveform memory 42. Basically, a musical sound that changes with time is converted into the basic waveform data. While synthesizing based on
A musical tone synthesizing method in which the synthesized musical tone is slightly modified with difference data becomes possible. Further, the data input to the waveform data forming circuit 50 may be any data as long as it is in the digital format without being distinguished from the sampling data and the difference data as described above. For example, only one type of data (the output of the waveform memory 41 or the waveform memory 42) is always input to the waveform data forming circuit 50, and the player arbitrarily controls conduction or non-conduction of the gate circuit 55. Good to do. As a result, it is expected that musical tones with unprecedented tone colors will be generated.

(2) In the above embodiment, the waveform data memory 41-
1, 41-2 ... 41-n, 42-1, 42-2 ...
42-k is designated by the first and second tone color designation signals TS1 and TS2 which change according to the tone color selection, and each area E ₀ , E ₁ , ... E _P-1 , E ₀ in the same memory. , E ₁ , ...
Address signal AD that changes E _Q-1 with time
21 and AD22, the memory and the area may be designated in accordance with an operation signal from a foot operator such as a knee lever or a foot pedal and a sound quality control signal from a sound quality adjusting knob. This allows the player to operate the knee lever, foot pedal,
The tone waveform is changed by the sound quality adjustment knob.

(3) In the above embodiment, the waveform memories 41 and 42 are used as the means for generating the sampling data and the difference data. However, as the same means, a circuit for generating the sampling data and the difference data by a method such as calculation and oscillation. May be used.

(4) In the above embodiment, the shift register 54 is used as a means for storing the sampling data representing the waveform of the musical tone signal to be generated. A writable memory (RAM) in which a storage location is designated and writing and reading of the data are controlled may be used.

[Brief description of drawings]

FIG. 1 is a block diagram of an electronic musical instrument to which a tone signal generator according to an embodiment of the present invention is applied, FIG. 2 is a diagram showing a detailed example of the address generator of FIG. 1, and FIG. 6 is a time chart for explaining the operation of the embodiment. Description of reference numerals 11 ... key switch circuit, 12 ... tone color selection switch circuit, 13 ... key press detection circuit, 14 ... tone color selection signal generation circuit, 20 ... address generator, 41, 42 ... waveform memory, 50 ... Waveform data forming circuit, 51 ... Subtractor,
52 ... Multiplier, 53 ... Adder, 54 ... Shift register, 61, 62 ... Gain coefficient memory.

Claims (1)

[Claims] 1. A waveform data forming circuit for synthesizing a musical tone by forming waveform data representing a smoothly changing waveform based on a plurality of sets of waveform data selectively output from a waveform data generating circuit, wherein: Storage means for storing a set of waveform data; subtraction means for subtracting the waveform data read out and output by the storage means from the waveform data output by the waveform data generation circuit; and waveform data from the subtraction means Summing means for adding the waveform data read and output by the storage means and supplying it to the storage means; gain control means for controlling the gain of the waveform data supplied from the subtraction means to the addition means; The waveform data is provided from the storage means to the subtraction means and the waveform data is supplied from the storage means to the subtraction means in response to a control signal supplied. Waveform data forming circuit for tone synthesis, characterized in that a acceptable or prohibited to gate means.