JPH07101352B2 - Music signal generator - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a musical tone signal generator used in electronic musical instruments, game machines, etc., and particularly generates a musical tone signal whose waveform gradually changes over time. The present invention relates to a tone signal generator.

(Prior Art) Conventionally, a device of this type has, as shown in, for example, Japanese Patent Laid-Open No. 61-107298, a musical tone waveform data generation means for sequentially switching and outputting musical tone waveform data representing different musical tone waveforms, Storage means for cyclically storing the musical tone waveform data with a delay time corresponding to the pitch period of the musical tone to be generated, and a difference between the musical tone waveform data from the musical tone waveform data generating means and the musical tone waveform data cyclically stored in the storing means. According to the above, it has a data correction means for gradually changing and correcting the tone waveform data stored in the storage means, and an output means for outputting the waveform data stored in the storage means as a tone signal. A musical tone signal whose waveform gradually changes over time is generated.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional apparatus, the tone waveform data circulated and stored in the storage means is always output in correspondence with the pitch period of the tone to be generated. However, there is a problem in that a musical sound to which a music effect such as a vibrato effect is added cannot be generated.

The present invention has been devised in view of the above problems, and an object thereof is to provide a musical effect signal such as a vibrato effect in a musical sound signal generation device that generates a musical sound signal whose waveform gradually changes over time. Another object of the present invention is to provide a musical tone signal generator capable of generating a musical tone.

(Means for Solving the Problems) In order to solve the above problems and achieve the object of the present invention, a characteristic feature of the present invention is that the musical tone waveform data representing different musical tone waveforms are sequentially output as time passes. Means for generating musical tone waveform data, storage means for cyclically storing the musical tone waveform data with a delay time corresponding to the pitch period of the musical tone to be generated, and musical tone waveform data from the musical tone waveform data generating means Data correction means for gradually changing and correcting the tone waveform data stored in the storage means in accordance with the difference between the waveform data stored in the storage means and the waveform data stored in the storage means according to the circulating storage operation of the storage means. In the tone signal generator having the output means for outputting as a tone signal, the modulation means for modulating the delay time of the waveform data by the storage means is provided. .

(Operation of the Invention) In the present invention configured as described above, when musical tone waveform data representing different musical tone waveforms are sequentially switched and output from the waveform data generating means over time, the storage means should generate the waveform data. The stored waveform data is circulated and stored with a delay time corresponding to the pitch period of the musical sound, and the stored waveform data is gradually changed in cooperation with the data correction means, and the changed waveform data is converted into a musical sound signal via the output means. Is output. During the generation of such a tone signal, the modulating means modulates the delay time of the waveform data stored in the storage means. Therefore, the circulating storage time of the waveform data cyclically stored in the storage means changes according to the modulation signal, and the circulating storage of the storage means. A frequency modulation effect such as a vibrato effect is added to the musical tone signal output via the output means in accordance with the operation.

(Effect of the invention) As can be understood from the above description of the operation, according to the present invention,
In a musical tone signal generator that generates a musical tone signal whose waveform gradually changes over time, a musical tone with a music effect such as a vibrato effect can be generated, so the quality of the musical tone signal generator is improved.

(Embodiment) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an electronic musical instrument to which a musical tone signal generating apparatus according to the present invention is applied.

This electronic musical instrument has a key switch circuit 11 and a tone color selection switch circuit 12. The key switch circuit 11 is composed of a plurality of key switches corresponding to various kinds of keyboards, and the switches are opened / closed in response to the pressing and releasing of each key. A key press detection circuit 13 is connected to the key switch circuit 11, and the detection circuit 13 detects the pressing and releasing of each key on the keyboard by detecting the open / close state of each key switch in the key switch circuit 11. hand,
The key code KC representing the key pressed on the keyboard and the high level “1” (hereinafter simply “1”) when the key is pressed, and the low level “0” (hereinafter simply “0” when the key is released). "
The key-on signal KON is output. The tone color selection switch circuit 12 is composed of a plurality of tone color selection switches corresponding to the respective operators of the tone color selection operator group provided on the front panel of the electronic musical instrument.
Outputs a tone color selection signal TSW representing the tone color selected by the tone color selection operator group.

An address generator 20 is connected to the tone color selection switch circuit 12 and the key press detection circuit 13. Also, the master clock generator 14 is connected to the address generator 20,
The generator 14 has a constant high frequency master clock signal φ.
Output _C.

The address generator 20 has first and second address signals AD for controlling the reading of the waveform data stored in the waveform memory 30.
It outputs 1 and AD2, and has a variable frequency divider 21, as shown in detail in FIG. Variable frequency divider 21 is a key code
The master clock signal φ _C is frequency-divided by the frequency division ratio data read from the frequency division ratio memory 22 according to KC, and m of the pitch frequency of the pressed key (m is a musical tone waveform sampling for one cycle). The first note clock signal φ _n1 having a frequency doubled (equal to the number of data) is output. The first note clock signal φ _n1 is input to the counter 23, and the counter 23 receives the first
By counting the note clock signal φ _n1 , a count value that repeatedly changes from “0” to “m−1” is output as the first address signal AD1. This counter 23
Differentiating circuit 24 supplies a key-on signal to the reset terminal R of
The key-on pulse signal KONP, which is a derivative of KON rising, is supplied.
It is designed to be reset when the key is pressed in response to the arrival of KONP.

A carry signal generated from the counter 23 every time the counter value "m-1" of the counter 23 changes from "0".
CA is input to the counter 25, and the counter 25 counts the carry signal CA and outputs a counter value that is incremented by 1 for each cycle of the first address signal AD1. An OR circuit OR is provided to the reset terminal R of the counter 25.
Key-on pulse signal KONP and a comparator 26 described later.
The coincidence signal EQ from the counter 25 is supplied, and the counter 25 is reset when the key is pressed or when the coincidence signal EQ is generated by the comparator 26 in response to the arrival of the key-on pulse signal KONP or the coincidence signal EQ. . The count value output from the counter 25 is supplied to one input of the comparator 26,
A repeat count value is supplied from the repeat count memory 27 to the other input of 26. Repeat count memory 27 is waveform memory
The number of times that the same waveform stored in 30 is repeatedly output is stored for each waveform, and the tone color selection signal TSW representing the tone color selected by the performer output from the tone color selection switch circuit 12 and the counter 28 The number of repetitions is output according to the count value (second address signal AD2). Accordingly, the comparator 26 outputs the coincidence signal EQ and resets the counter 25 via the OR circuit OR at the time when the count value from the counter 25 coincides with the repeat count value from the repeat count memory 27. The coincidence signal EQ is supplied to the counter 28 via one input of the AND circuit AND. The counter 28 receives the supplied match signal EQ.
Is output as a second address signal AD2. The other input of the AND circuit AND is supplied with the output of the NAND circuit NAND which detects that all the bits of the second address signal AD2 have become "1", and all the bits of the second address signal AD2 are " When 1 "(the count value of the counter 28 in this embodiment is" 7 "), the coincidence signal EQ is not supplied to the counter 28 via the AND circuit AND. This allows the counter
28 increments its count value by 1 in response to the arrival of the coincidence signal EQ and outputs the second address signal AD2 which changes from "0" to "7", for example. Also, the key-on pulse signal KONP is supplied to the reset terminal R of the counter 28,
The counter 28 is reset when a key is pressed.

Further, the address generator 20 has a gate control circuit 29, and the synchronization control circuit 29 has a predetermined count value of the counter 25, for example, “0,3,6 ...”, “0,5,10”. "..." in "1"
Output the gate signal GON. This gate control circuit 2
The tone color selection signal TSW from the tone color selection switch circuit 12 is supplied to 9 and the frequency at which the gate signal GON becomes "1" is changed by this tone color selection signal TSW.

The waveform memory 30 has waveform data memories 30-1, 30-2 ... 30-n corresponding to n tone colors and designated by the tone color selection signal TSW from the tone color selection switch circuit 12. Each of the waveform data memories 30-1, 30-2 ... 30-n has a plurality of areas (8 areas E ₀ , E ₁ ... E _{7 in} this embodiment) designated by the second address signal AD2. It is divided. Each area E ₀ , E ₁ ... E ₇ stores m pieces of sampling data having different waveforms corresponding to one cycle of the musical tone, and the data is read by the first address signal AD1.

An interpolation circuit 40 is connected to the waveform memory 30.
Reference numeral 40 denotes a shift register 41 as a means for circulatingly storing the waveform data from the waveform memory 30, a subtractor 42, and a gate circuit 4
3, and a data correction means including a multiplier 44 and an adder 45 for gradually correcting and changing the waveform data stored in the register 41.

The shift register 41 has m stages that store m pieces of sambling data corresponding to one cycle of the tone waveform, and the sampling data stored in each stage is reset by the key-on pulse signal KONP and is changed by a variable amount. The second note clock signal φ _n2 supplied from the frequency divider 51 is sequentially shifted. Variable frequency divider 21
Divides the master clock signal φ _c from the master clock generator 14 according to the frequency division ratio data from the adder 52, and slightly changes up and down with a frequency m times the pitch frequency of the pressed key as the center frequency. Output the second note clock signal φ _n2 . The adder 52 includes a frequency division ratio memory 53 and a modulation signal generator.
60 is connected, and the adder 52 adds the respective data from the frequency division ratio memory 53 and the modulation signal generator 60 and outputs the result.

The frequency division ratio memory 53 is configured similarly to the frequency division ratio memory 22 in the address generator 20, and outputs frequency division ratio data according to the supplied key code KC. This division ratio memory 53
And the frequency division ratio memory 22 may be used in common. As shown in FIG. 3, the modulation signal generator 60 includes a plurality of modulation waveform data generators 61, 62, 63, and each of the generators 61, 62, 63 has a low frequency, for example, several Hz to several tens of Hz. Of different waveforms, for example, sine wave, triangular wave, sawtooth wave, etc., are respectively output. A selector 64 is connected to each of the generators 61, 62 and 63, and any one of the generators 61, 62 and 63 is selected according to a selection signal from a selection switch 65 selected by the performer. Selectively output the waveform data.

The subtractor 42 constituting the data correction means is a waveform memory 30.
The sampling data supplied from the final stage of the shift register 41 is subtracted from the sampling data supplied from the above, and difference data resulting from the subtraction is output to the gate circuit 43. The gate circuit 43 is controlled to be conductive or non-conductive by the gate signal GON from the address generator 20, and when the signal GON is “1”, the input data from the subtractor 42 is multiplied by the multiplier 4
When the signal GON is "0", the supply is prohibited. The multiplier 44 multiplies the input data from the gate circuit 43 by the gain coefficient g and supplies it to one input of the adder 45. The gain coefficient g is supplied from the gain coefficient memory 54. The memory 54 corresponds to n timbres and is designated by the timbre selection signal TSW from the timbre selection switch 12. 54-2 ... 54-n. Each gain coefficient data memory 54-1, 54-2, ... 54-n has a plurality of gain coefficient data (8 data g ₀ , g _1, ... In this embodiment) addressed by the second address signal AD2. g
₇ ) Remember.

The other input of the adder 45 is supplied with the sampling data from the final stage of the shift register 41, and the adder 45 adds the sampling data and the input data from the multiplier 44 to add the sampling data to the shift register 41. Supply to the first stage.

Further, a multiplier 71 is connected to the output of the adder 45,
The multiplier 71 multiplies the sampling data from the adder 45 and the envelope waveform data and outputs the result. This envelope waveform data is supplied from the envelope generator 72, and the generator 72 forms and outputs the envelope waveform data representing the envelope waveform of the musical sound in response to the key-on signal KON from the key pressing detection circuit 13. The envelope waveform is controlled by the tone color selection signal TSW from the tone color selection switch circuit 12, and is formed into a shape suitable for the tone color of each tone.

A digital-analog return device 73 is connected to the multiplier 71, and the converter 73 converts the digital signal from the multiplier 71 into an analog signal and outputs it to the sound system 74.
The sound system 74 is composed of an amplifier, a speaker, etc., and produces a musical sound according to the analog signal supplied from the digital-analog converter 73.

The operation of the embodiment configured as above will be described. When any key is pressed on the keyboard and the key switch corresponding to the pressed key in the key switch circuit 11 is closed, the key pressing detection circuit 13 detects this key pressing and detects the pressed key. The address generator 20 sends the key code KC and the key-on signal KON
Supply to. In the address generator 20, the variable frequency divider 21 for inputting the master clock signal φ _c from the master clock generator 14 cooperates with the frequency division ratio memory 22 based on the supplied key code KC to generate the first note clock. While starting to output the signal φ _n1 , the differentiating circuit 24 differentiates the key-on signal KON to generate the key-on pulse signal KONP, and the key-on pulse signal KONP resets the counters 23 and 25, respectively. The key-on pulse signal KONP is also supplied to the shift register 41 of the interpolation circuit 40, and all sampling data stored in the shift register 41 is cleared.

After the clear counter 23 in the address generator 20 counts the 1 note clock signal phi _n1, a first address signal which changes repetitively over "0" to "m-1" as well as synchronized with the signal phi _n1 AD1 is supplied to the waveform memory 30.
A tone color selection signal TSW representing a tone color selected by the player is supplied from the tone color selection switch 12 to the waveform memory 30, and a second address signal AD2 set to "0" by the reset is supplied from the counter 25. The sampling data stored in the first area E ₀ of the waveform data memory 30-i (i is an integer of 1 to n) corresponding to the selected tone color is sequentially output. . The sampling data is supplied to the subtractor 42, which subtracts the sampling data from the final stage of the shift register 41 from the sampling data and outputs the subtracted difference data to the gate circuit 43. In this case, since the sampling data in the shift register 41 has been cleared by the key-on pulse signal KONP, the sampling data supplied from the register 41 to the subtractor 42 is “0” and is supplied to the gate circuit 43. The difference data is equal to the sampling data from the waveform memory 30. Since the gate circuit 43 is controlled to be conductive by the gate signal GON which is initially “1”, the data from the subtractor 42 is supplied to the multiplier 44.

The multiplier 44 has a gain coefficient data memory 54-i (i is 1) in the gain coefficient memory 54 designated by the tone color selection signal TSW.
To n), the gain coefficient data g read by the second address signal AD2 set to "0"
₀ is supplied, and the multiplier 44 multiplies the supplied data by the gain coefficient data g ₀ and supplies it to one input of the adder 45. In this case, since the sampling data set to “0” as described above is supplied to the other input of the adder 45 from the final stage of the shift register 41, the data from the multiplier 44 is input to the shift register 41. Is input to the first stage, and the register 41 stores the same data while sequentially shifting the same in synchronization with the second note clock signal φ _n2 .
In this way, when the counter 23 finishes counting "m-1", the waveform memory 30 outputs the sampling data for one cycle of the waveform to the interpolation circuit 40, and each stage of the shift register 41 has The sampling data for one cycle is stored.

On the other hand, the sampling data input from the adder 45 to the first stage of the shift register 41 is also supplied to the multiplier 71, and is multiplied by the envelope waveform data supplied from the envelope generator 72 in the multiplier 71 to obtain a digital analog signal. It is supplied to the converter 73. The sampling data multiplied by the envelope streamform data is converted into an analog signal by the digital analog converter 73, and this analog signal is supplied to the sound system 74, which generates a musical sound corresponding to this analog signal. Begin to.

In this state, when the next first note clock signal φ _n1 is input to the counter 23, the counter value _changes from “m−1” to “0”, and thereafter, the counter 23 becomes “0” as in the above case. ~ First address signal changing over "m-1"
AD1 is repeatedly output. Further, the counter value "m-
When changing from "1" to "0", the counter 23 outputs the carry signal CA to the counter 25, so that the count value of the counter 25 becomes "1". In this case, the gate control circuit
29 is based on the count value set to “1” above,
Since the gate signal GON that becomes “0” is output, the gate circuit 4
3 is non-conductive controlled, and "0" is input to one input of the adder 45.
Is supplied.

As a result, the adder 45 directly supplies the sampling data supplied from the final stage of the shift register 41 to the first stage of the shift register 41.
Circulates the stored sampling data.

Even during the storage of the sampling data, the sampling data is supplied to the multiplier 71 as described above, and the sound system 74 generates the tone signal corresponding to the sampling data in the circular storage.

In this state, when the count value of the counter 25 increases and reaches a predetermined value (for example, "3" or "5"), the gate signal GO
N becomes “1”. In this way, when the gate signal GON becomes "1", the gate circuit 43 is controlled to be in the conductive state, and similarly to the above, the sampling data read from the first area E ₀ in the waveform data memory 30-i and the shift data are shifted. Difference data from the sampling data output from the final stage of the register 41 is supplied to one input of the adder 45 via the gate circuit 43 and the multiplier 44. Since the sampling data output from the final stage of the shift register 41 is supplied to the other input of the adder 45, the adder 45 compares the sampling data stored in the shift register 41 with the difference data. Then, the shift register 41 updates the previous sampling data by storing the corrected sampling data again. And again the counter
When the count value of 25 increases and the gate signal GON becomes “0”, the gate circuit 43 is controlled to be in the non-conductive state, and the shift register 41 again circulates and stores the sampling data. Thereafter, the sampling data stored in the shift register 41 is updated by updating the sampling data in the shift register 41 according to the conduction control of the gate circuit 43 and storing and holding the sampling data in the shift register 41 according to the non-conduction control of the gate circuit 43. The data gradually approaches the sampling data stored in the first area E ₀ of the waveform data memory 30-i. The sampling data that gradually changes in this manner is supplied to the sound system 74 via the multiplier 71 and the digital-analog converter 73, as in the case described above, and the system 74 generates a musical sound corresponding to this sampling data. Therefore, the generated tone is the waveform data memory 30-
The waveform gradually approaches the waveform represented by the sampling data stored in the first area E ₀ of i.

Further, if the count value of the counter 25 becomes equal to the repeat count value read from the repeat count memory 27 by being addressed by the tone color selection signal TSW and the second address signal AD2 after the lapse of time from the key depression, the comparison is made. Unit 26 is a match signal
Output EQ. The coincidence signal EQ resets the counter 25 to start counting from "0" again, and the counter 28 increases the count value by "1" to change the second address signal AD2 to "1". This second address signal A
Waveform data memory 30-i is in the second area due to the change of D2.
The sampling data stored in E ₁ will be output repeatedly. At the same time, the gain coefficient data memory 54-i outputs the gain coefficient data g ₁ . Also in this case, the interpolation circuit 40 updates the sampling data in the shift register 41 according to the conduction control of the gate circuit 43 and makes the gate circuit 43 non-conducting, as in the case where the second address signal AD2 is “0”. The sampling data stored in the shift register 41 is gradually brought closer to the sampling data stored in the second area E ₁ of the waveform data memory 30-i by the cyclic storage of the sampling data in the shift register 41 accompanying the control. . As a result, the musical sound generated by the sound system 74 is transmitted to the waveform data memory 30.
The waveform represented by the sampling data in the first area E _{0 of} −i gradually approaches the sampling data in the second area E ₁ of the same memory 30-i. In this way
As the second address signal AD2 increases, the waveform of the musical sound generated from the sound system 74 is stored in the waveform data memory.
It gradually changes according to the waveform represented by the sampling data in each area E ₀ , E ₁ , ... E _{7 of} 30-i. Then, when the second address signal AD2 reaches "7", the NAND circuit NAND outputs "0", so that the counter 28 outputs the second signal.
The update of the address signal AD2 stops.

During generation of the musical tone signals as described above, the sampling data in the shift register 41 are cyclically shifted by a second note clock signal phi _n2, the frequency of the second note clock signal phi _n2 is basically the key code KC Based on the frequency division ratio data read from the frequency division ratio memory 53, the sound system 74 is approximately equal to m times the pitch frequency of the key pressed on the keyboard (m is the number of stages of the shift register 41). The frequency of the tone signal output from the unit corresponds to the pitch frequency of the key pressed on the keyboard.

However, in this case, the modulation signal generator 60 supplies the modulation waveform data from any one of the modulation waveform data generators 61, 62, 63 to the adder 52 according to the selection state of the selection switch 65 by the action of the selector 64. Therefore, the adder 52 controls the frequency division ratio of the variable frequency divider 52 by adding the modulated waveform data to the frequency division ratio data. The modulated waveform data represents a low frequency waveform and the frequency division ratio data is slightly changed up and down, so that the second note clock divided by the variable frequency divider 51 and supplied to the shift register 41 as a shift clock. The signal φ _n2 is a signal that fluctuates slightly at low frequencies up and down around a frequency m times the sound frequency, that is, a frequency m times the frequency m times the pitch frequency is frequency-modulated with a low frequency signal. Thereby, the cyclic storage time (delay time) of the sampling data by the shift register 41 is modulated by the modulation signal represented by the modulation waveform data,
A vibrato effect is added to the tone signal output from the adder 45 during the cyclic storage and output from the sound system 74 via the multiplier 71 and the digital-analog converter 73.

The present invention can be implemented even if the above embodiment is modified as follows.

(1) In the above embodiment, the delay time in the cyclic storage of the musical tone waveform data output by modulating the frequency of the shift clock supplied to the shift register 41 is modulated. Alternatively, the number of stages of the shift register 41 that is substantially used may be changed and controlled. That is, in this modified example, as shown in FIG. 4, a selector 81 for inputting sampling data from a plurality of stages on the rear side of the shift register 41 is provided in the feedback path of the shift register 41, and the above-mentioned embodiment is used. Modulation signal generator 60 configured similarly to
A decoder 82 for decoding the modulated waveform data from and controlling the selection operation of the selector 81 is connected to the selector 81.
In this case, as the shift clock for the shift register 41, the first note clock signal φ _n1 (corresponding to a frequency m times the pitch frequency of the key pressed on the keyboard) output from the address generator 20 is used. To be done. The other circuits are the same as those in the above embodiment.

With this configuration, the selector 81 includes the subtractor 42 and the adder 45.
Since the sampling data fetching position fed back to the first stage of the shift register 41 via the data correcting means consisting of, etc., is controlled to be changed in accordance with the modulation signal from the modulation signal generator 60, it is possible to circulate and store the tone waveform data. The number of stages of the shift register 41 used will be changed according to the modulation signal. As a result, the cyclic storage time (delay time) of the sampling data by the shift register 41 is modulated by the modulation signal, and similarly to the case of the embodiment, the vibrato effect is applied to the tone signal output from the sound system 74 in this modification as well. Is given.

(2) In the modification of (1), the sampling data shift position in the shift register 41 is controlled to be changed. However, the sampling data input position in the shift register 41 may be controlled to be changed. . That is, in this modified example, as shown in FIG. 5, a distribution circuit 83 that inputs sampling data from the adder 45 and distributes the sampling data to any of the plurality of stages on the front side of the shift register 41 is added to the adder 45. The modulation signal generator 60 and the decoder 82, which are interposed between the shift register 41 and the configuration similar to the above-described modification, are connected to the distributor 83 in order to control the distribution operation of the distributor 83. Also in this case, the first node clock signal φ _n1 output from the address generator 20 is used as the shift lock for the shift register 41. The other circuits are the same as those in the above embodiment.

With such a configuration, the distributor 83 controls the input position of the sampling data from the adder 45 to the shift register 41 in accordance with the modulation signal from the modulation signal generator 60, so that it is used for circular storage of tone waveform data. The number of stages of the shift register 41 is changed according to the modulation signal, as in the modification. As a result, also in this modification, the cyclic storage time (delay time) of the sampling data by the shift register 41 is modulated by the modulation signal, and the vibrato effect is added to the tone signal output from the sound system 74.

(3) Further, in the above-mentioned embodiments and modified examples, the shift register is used as a means for cyclically storing the waveform data. However, instead of this shift register, the storage position of the data is designated by the address signal, and the reading and writing of the data are carried out. You may make it use the storage means by which is controlled. That is, in this modification, as shown in FIG. 6, the storage means has m storage positions equal to the number of sampling data for one waveform of a musical tone, and the address generator 20
The RAM 84 is provided with a read mode in the first half cycle "1" of the first note clock signal φ _{n1 and} a write mode in the second half cycle "0" of the signal φ _n1 . A gate circuit 85 for inputting the sampling data from the adder 45 is connected to the input / output data bus 84a of the RAM 84, and the gate circuit 85 receives the sampling data from the adder 45 in the latter half cycle of the first note clock signal φ _n1 . I / O data bus 84a for sampling data
Supply to. Latch circuits 86 and 87 are also connected to the input / output data bus 84a. The latch 86 latches the sampling data read from the RAM 84 every first half cycle of the first note clock signal φ _n1 and supplies it to the subtractor 42 and the adder 45. The latch circuit 87 latches the sampling data from the gate circuit 85 every second half cycle of the first note clock signal φ _n1 and supplies it to the multiplier 71. An adder 88 is connected to the address input terminal AD of the RAM 84. The adder 88 adds the address data from the address counter 89 and the modulation waveform data supplied from the modulation signal generator 60 configured as described above, and supplies it to the RAM 84. Address counter 8
9 is for counting the first note clock signal φ _n1 , after resetting at the time of key depression by the key-on pulse signal KONP
Count value (0 to m
-1) is output.

With such a configuration, the RAM 84 is basically repeatedly addressed in synchronization with the first note clock signal φ _n1 by the count value which varies from 0 to m−1 by the address count 89, and the clock signal _n1 The sampling data stored in the specified address in the first half cycle of is read out and output to the input / output data bus 84a. The read and output sampling data is supplied to the latch circuit 86, which latches the sampling data and supplies the sampling data to the subtractor 42 and the adder 45. In such a case, the data correction means including the subtractor 42, the gate circuit 43, the multiplier 44 and the adder 45 corrects the sampling data in the latter half cycle of the first note clock signal φ _{n1 in} the same manner as in the above embodiment. change. At this time, the gate circuit 85 in the conductive state supplies the modified sampling data to the input / output data bus 84a, and the RAM 84 in the write mode state has the same address as the address from which the data is read in the first half cycle. Store at address. This makes RA
The sampling data in M84 is modified and changed as in the case of the above embodiment. Further, since such an operation is repeatedly performed every one cycle of the musical tone in accordance with the address designated by the address counter 89, the sampling data representing the musical tone waveform in the RAM 84 is gradually changed and the delay corresponding to one cycle of the noise. It will be circulated and memorized with time.

On the other hand, in such a case, the address data output from the address counter 89 is generated by the adder 88 by the modulation signal generator.
The delay time in the cyclic storage of the sampling data is modulated because the reading and writing positions of the sampling data in the RAM 84 are controlled to change according to the modulation signal from the 60 in a slow cycle. become. Then, the sampling data cyclically stored in the RAM 84 while the delay time is modulated as described above is supplied from the input / output bus 84a to the latch circuit 87, and the latch circuit 87 outputs the sampling data in the latter half cycle of the first note clock signal φ _n1. Since the supplied sampling data is latched and also supplied to the multiplier 71, the vibrato effect is added to the musical tone signal output from the sound system 74, as in the case of the above-described embodiments and modifications.

(4) Further, in the above-mentioned embodiment and modification, a modulation signal which does not change in waveform with time was used. However, as the modulation signal generator, as shown in FIG. Address generator 20a, waveform memory 30a, and interpolation circuit 40a having the same configuration as that used to generate
Also, a waveform data generator including the gain coefficient memory 54a may be used to use a signal whose waveform changes with time as a modulation signal. In the figure, each circuit is given the same reference numeral as the corresponding circuit of the above-described embodiment and the reference numeral a is additionally shown. In this case, the tone color selection switch circuit 12, the master clock generator 14, and the variable frequency divider of the above embodiment are used.
21. The waveform selection switch circuit 91 and the low frequency clock generator 92 are used in the means for generating the first note clock signal .phi..sub.n1 _composed of the frequency division ratio memory 22. The waveform selection switch circuit 91 is composed of a plurality of waveform selection switches for selecting the type of modulation waveform, and includes a waveform memory 30a and a repeat count memory 27.
The waveform selection data WS is supplied to the gate control circuit 29a and the gain coefficient memory 54a. The low-frequency clock generator 92 generates a low-frequency clock signal φ _L , and the same signal φ _L
Is supplied to the counter 23a and the shift register 41a. Also,
The key-on pulse signal KONP is supplied to the counters 23a, 25a, 27a and the shift register 41a from the address generator 20 of the above embodiment.

According to this configuration, the adder is the same as in the above-mentioned embodiment.
A signal whose waveform changes with time is obtained from 45a, and since this signal is a low frequency signal corresponding to the clock signal φ _L supplied from the low frequency clock generator 92, it is not generated as a musical tone. A vibrato effect that changes with time is added.

In the case of this modification, the generated signal is for the vibrato effect, and its waveform may be relatively simple, so each waveform data memory 30a-1 in the waveform memory 30a,
30a-2 ... 30a-n and storage areas E ₀ , E ₁ ... E ₇ , g _{0 of the} gain coefficient data memories 54a- ₁ , 54a-2 ... 54a-n in the gain coefficient memory 54a. , g ₁ ... g _{7 The} number may be reduced. Further, the number of stages m of the shift register 41a may be reduced.

Further, in this variation, the low frequency clock generator 92
By controlling the clock signal φ _L generated by the generator 92 by supplying the car code KC to the key according to the pitch of the key pressed on the keyboard, a vibrato effect corresponding to the pitch is added to the generated tone. To be done.

(5) In the above embodiment, the waveform memory 30 is used as the means for generating the waveform data, but as the means for generating the waveform data, a circuit for generating the waveform data by a method such as calculation or oscillation is used. May be.

[Brief description of drawings]

1 is an overall block diagram of an electronic musical instrument to which a tone signal generator according to an embodiment of the present invention is applied, FIG. 2 is a block diagram showing a detailed example of the address generator of FIG. 1, and FIG. FIG. 1 is a block diagram showing an example of the modulation signal generator of FIG. 1, and FIGS. 4 to 7 are block diagrams showing modified examples of the above embodiment. Explanation of code 20 …… Address generator, 30 …… Waveform memory, 40 …… Interpolation circuit, 41 …… Shift register, 42 …… Subtractor, 43 …… Gate circuit, 44 …… Multiplier, 45,52, 88 …… Adder, 51 ……
Variable frequency divider, 53 ... division ratio memory, 54 ... gain coefficient memory, 60 ... modulation signal generator, 81 ... selector, 83 ... distribution circuit, 84 ... RAM, 89 ... address counter.

Claims (5)

[Claims] 1. A musical tone waveform data generating means for sequentially switching and outputting musical tone waveform data representing different musical tone waveforms according to the passage of time, and a memory for cyclically storing the musical tone waveform data with a delay time corresponding to a pitch period of a musical tone to be generated. Means, and gradually changing and correcting the musical tone waveform data stored in the storage means in accordance with the difference between the musical tone waveform data from the musical tone waveform data generating means and the musical tone waveform data cyclically stored in the storage means. In a musical tone signal generator having a data correction means and an output means for outputting the waveform data stored in the storage means as a musical tone signal in accordance with the circulating storage operation of the storage means, delay of the waveform data by the storage means A musical tone signal generating apparatus comprising a modulation means for modulating time. 2. The storage means comprises a shift register which is sequentially shifted by a clock signal having a frequency inversely proportional to the pitch period of a musical tone to be generated by the storage data, and the modulation means comprises a low frequency modulation signal. 2. The musical tone signal generating device according to claim 1, wherein the musical tone signal generating device comprises: a modulating signal generating means for generating the signal; and a frequency modulating means for modulating the frequency of the clock signal according to the modulating signal. 3. The storage means comprises a shift register which is sequentially shifted by a clock signal having a frequency inversely proportional to a pitch period of a musical tone to be generated by the storage data, and the modulation means has a low frequency modulation signal. And a take-out position in the shift register of the waveform data supplied to the data correction means, which is provided in a feedback path from the shift register to the data correction means, according to the modulation signal. The musical sound signal generating device according to claim 1, wherein the musical tone signal generating device comprises output position changing means. 4. The storage means is composed of a shift register which is sequentially shifted by a clock signal having a frequency inversely proportional to the pitch period of a musical tone to be generated by the storage data, and the modulation means is a low frequency modulation signal. And a modulation signal generating means for generating the signal, and changing the input position of the waveform data supplied from the data correcting means to the shift register to the shift register according to the modulation signal. The musical tone signal generating apparatus according to claim 1, comprising an input position changing means. 5. The memory means comprises a memory for storing data at an address designated by an address signal which changes in a cycle corresponding to a pitch cycle of a musical tone to be generated, and the modulating means comprises a low frequency 2. The musical tone signal generating apparatus according to claim 1, comprising: a modulation signal generating means for generating the modulation signal of 1. and an address signal change control means for changing and controlling the address signal according to the modulation signal.