JPH067565B2 - Probing method - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a probing method for measuring electrical characteristics of a chip formed on a wafer by a prober, and more particularly to specifying a wafer according to quality characteristics of the wafer. The present invention relates to a probing method for efficiently probing only a region.

[Technical Background of the Invention] In a probing process of measuring electrical characteristics of chips on a wafer by a prober, normally, all the chips on the wafer are probed and the chips are non-defective.
Although it is sorted into defective products, depending on the type of wafer, wafers with a yield of 90% or more are mostly good products,
There are wafers, etc., where it is clear that the peripheral part is almost defective, and if the distribution and probability of non-defective products and defective products are predicted to some extent, the central part is regarded as a non-defective product and only the periphery should be measured. In some cases, the peripheral part may be regarded as a defective product and only the central part may be measured. As a method of probing by limiting the measurement area (area) as described above, a method of conventionally designating rows and columns of chips to be arranged and probing an area designated by rows and columns has been performed. However, since the area limited by such row and column designation does not divide the wafer in the circumferential direction, if the area limitation in the circumferential direction as described above is desired, the area in the circumferential direction is included. Since it is specified by rows and columns, probing must be performed in a range that is considerably wider than the range actually required, and there is a drawback that efficient probing cannot be performed.

[Object of the Invention] The present invention has been made in view of the drawbacks of the above-described conventional probing method, and it is an object of the present invention to provide a probing method that enables efficient probing by designating an area of a wafer in a donut shape. is there.

Furthermore, the present invention provides a probing method that enables efficient probing by determining the yield by probing a sample. [Summary of the Invention] In order to achieve such an object, the present invention designates a value smaller than a radius of a wafer to be measured as a second probe size so that the wafer to be measured is provided inside and outside the second probe size. The area is divided into two areas, and one of the areas is designated or the yield is determined by probing a sample, based on the result of the designation of the area or the yield determination, only the inner area,
Only the outer area or the entire area is selectively probed.

[Examples of the Invention] Hereinafter, a probing method of the present invention will be described with reference to the drawings.

In order to carry out the probing method of the present invention, the second probe size, the probing area (IN, OUT), the outer marking (YES, NO), the path limit (the limit value of non-defective product), the sample selection (0 1, 2, 3) is input. The second probe size is designated by a radius smaller than the wafer size R of the wafer 1 shown in FIG. 1 as the second probe size γ. Probing area (I
When IN is designated by (N, OUT), the area 1 inside the second probing size γ of the wafer 1 is probed, and when OUT is designated, the outer area 12 is probed. The outer marking of specifies whether or not to mark the outer area unconditionally. When the yield determination is performed in the specific area (sample) selected by selecting the sample for the path limit of (2), the limit value of the good product in the specific area is input in advance. The sample selection of can be input only when OUT of the probing area is designated, i) only the outer area 12 when 0 is designated, ii) only the center chip row 13 in the direction perpendicular to the orientation flat when 1 is designated, iii) When 2 is specified, only the center chip row 14 in the horizontal direction with respect to the orientation flat is iv). When 3 is specified, the cross-shaped specific areas (samples) of columns 13 and 14 are probed to determine the number of non-defective products (Pa
The yield is determined by comparing the value entered in the pass limit with the number of ss.

Next, the probing method will be described with reference to the flowchart of FIG.

First, specify the second probe size. If this is 0, normal full face probing is done. Outside marking (YES, NO) when the second probe size is specified and the probing area is specified as IN
, The outer area 12 is unconditionally marked or only the inner area 11 of the second probe size is probed without marking. The above is applied to a wafer whose yield on the outside of the peripheral portion is clearly poor.

Next, the case where the probing area is designated as OUT will be described.

In this case, sample selection is performed, and probing and yield determination of the selected sample are performed. That is, when the sample selection is 0, only the outer 12 of the second probe size is probed as a sample, and the number at that time is compared with the limit value input in advance as the path limit. Then, when the number of non-defective products during this sample probing is less than the limit value, it is determined that the yield in the inner area 12 is not good,
The inner area 11 is continuously measured. When the number of non-defective products in the outer area 12 exceeds the limit value, the yield of the inner area 11 is regarded as 100%, and the measurement of the wafer is completed. If you want to determine the yield even for the inner area, specify 1, 2, or 3 as the sample.

When the sample designation is 1, only the center chip row 13 in the direction perpendicular to the orientation flat is probed. If the number of non-defective products at that time is less than the limit value input to the path limit, the entire surface is probed. If the number of non-defective products is greater than the limit value, only the outer area 12 is probed.

Similarly, when the sample is designated as 2 or 3 as well, the center chip row 14 or the cross is similarly probed to determine the yield, and based on the result, the entire surface probing or only the outer area 12 is probed.

[Effects of the Invention] As is clear from the above description, in the probing method of the present invention, the area to be probed is designated in the circumferential direction and the yield is determined by sample probing, and the designated area is determined based on the result. Since the probing is performed, it is possible to efficiently perform the probing according to the quality characteristics of the wafer.

[Brief description of drawings]

FIG. 1 is a diagram showing an area of a wafer, and FIG. 2 is a diagram showing a flow chart of an embodiment of the present invention. 10: Wafer 11: Inner area of second probing size 12: Outer area of second probing size 13: Center row 14: Center row

Claims (1)

[Claims] 1. By designating a value smaller than the radius of the wafer to be measured as a second probe size, the wafer to be measured is divided into an inner area and an outer area of the second probe size, and one of the areas is defined. Yield determination by designating or sampling probing, based on the result of the designation of the area or the yield determination, only the inner area, only the outer area,
Alternatively, a probing method characterized by selectively probing all areas.