JPH067603B2 - Light emitting diode - Google Patents
Light emitting diodeInfo
- Publication number
- JPH067603B2 JPH067603B2 JP28863887A JP28863887A JPH067603B2 JP H067603 B2 JPH067603 B2 JP H067603B2 JP 28863887 A JP28863887 A JP 28863887A JP 28863887 A JP28863887 A JP 28863887A JP H067603 B2 JPH067603 B2 JP H067603B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- emitting diode
- light emitting
- excitation region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12195—Tapering
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- Led Devices (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は光ファイバヂャイロ,光ディスク等の光源とし
て有用な、インコヒーレント光を大きな強度と小さな放
射角で放射できる発光ダイオードに関するものである。Description: TECHNICAL FIELD The present invention relates to a light emitting diode which is useful as a light source for an optical fiber gyro, an optical disk, and the like, and which can emit incoherent light with a large intensity and a small emission angle.
(従来技術及び発明が解決しようとする問題点) 活性層端面から大出力のインコヒーレント光を取り出そ
うとする発光ダイオードではファブリペロ(以下FPと
いう。)モードによるレーザ発振を抑圧することが大切
であり、従来レーザ発振を抑圧する方法としては、端面
を無反射(以下ARという。)コートするとか、非励起
領域を形成するとか、あるいは端面を斜めエッチングす
るとか、端面埋め込み等の活性層端面において光の反射
率を低下させる方法が行われてきた。(Problems to be Solved by Prior Art and Invention) In a light emitting diode that intends to extract high-power incoherent light from an end surface of an active layer, it is important to suppress laser oscillation in a Fabry-Perot (hereinafter referred to as FP) mode. Conventional methods for suppressing laser oscillation include non-reflective (hereinafter referred to as AR) coating on the end face, forming a non-excitation region, or obliquely etching the end face, or by applying light to the end face of the active layer such as embedding the end face. Methods have been used to reduce reflectance.
しかし、端面のARコートだけではFPモード発振を充
分に抑圧することは困難であった。また、従来実施され
ていた非励起領域を形成する方法では電流注入領域と活
性層幅とが同じ幅であるために、光ガイド効果で非励起
領域にキャリヤが励起され、そのため吸収係数が小さく
なり、非励起領域を長くしなければならないという欠点
があった。また、この構造では電流注入部と非励起領域
とを選択的に電極形成する必要がありプロセス工程が煩
雑になる問題点を有していた。さらに、端面の斜めエッ
チングとか、端面埋め込み、もしくはこれらの併用によ
るFPモード発振の抑圧においては、端面における屈折
率差が案外に大きく、反射率は僻界の場合に比べて1%
程度に達する。特に活性層を厚くするとこの影響が大き
くなり反射率も増加するため、これらの手段だけではF
Pモード発振を抑圧するのが困難であるという欠点があ
った。However, it was difficult to sufficiently suppress the FP mode oscillation only with the AR coating on the end face. Further, in the conventional method of forming the non-excited region, since the current injection region and the active layer have the same width, carriers are excited in the non-excited region by the optical guide effect, and the absorption coefficient becomes small. However, there is a drawback that the non-excitation region must be lengthened. In addition, this structure has a problem that it is necessary to selectively form electrodes for the current injection portion and the non-excitation region, which complicates the process steps. Further, in the case of oblique etching of the end surface, embedding of the end surface, or suppression of FP mode oscillation due to the combined use of these, the difference in the refractive index on the end surface is unexpectedly large, and the reflectance is 1% compared to the case of the remote field.
Reach a degree. In particular, if the active layer is thickened, this effect becomes large and the reflectance also increases.
There is a drawback that it is difficult to suppress P-mode oscillation.
例えば、FPモード発振を抑圧する例として第5図
(a),(b)及び(c)は従来構造の埋込形発光ダイオードの
模式図を示したもので、同図(a)は平面図、同図(b)及び
(c)はそれぞれ縦断面図及び横断面図である。図におい
て、1はn形InP基板、2はn形GaInAsP光ガイド層、3
はノンドープGaInAsP活性層、4はp形InPクラッド層、
5はP形GaInP電極層、6はp形InP電流狭窄層、7はn
形InP電流狭窄層、8はp形オーミック電極層であっ
て、電流注入部9,非励起領域10及び端面埋込部11の3
つの領域から形成されている。また12はn形オーミック
電極である。For example, as an example of suppressing FP mode oscillation, FIG.
(a), (b) and (c) are schematic views of an embedded type light emitting diode having a conventional structure, where (a) is a plan view, (b) and (b) are
(c) is a longitudinal sectional view and a transverse sectional view, respectively. In the figure, 1 is an n-type InP substrate, 2 is an n-type GaInAsP optical guide layer, 3
Is an undoped GaInAsP active layer, 4 is a p-type InP clad layer,
5 is a P-type GaInP electrode layer, 6 is a p-type InP current confinement layer, and 7 is n
-Type InP current confinement layer, 8 is a p-type ohmic electrode layer, and is composed of a current injection part 9, a non-excitation region 10 and an end face buried part 11.
It is formed from two areas. Further, 12 is an n-type ohmic electrode.
非励起領域10の活性層3の幅は電流注入部9の活性層3
の幅と同じであるため、光ガイド効果により非励起領域
10でも大量のキャリヤが発生し、吸収係数が小さくなり
FPモード発振を抑圧するために電流注入部9と同程度
以上の長さが必要である。また、端面埋込層11の窓層は
端面にもれてくる光が大きいので100μm程度以上に長
く形成する必要がある。さらに、非励起領域10の断面に
は電流狭窄層が挿入されていないのでオーミック電極8
は電流注入部9の表面にのみ選択的に形成する必要があ
る。このように従来構造はプロセス工程が煩雑である。The width of the active layer 3 in the non-excitation region 10 is equal to the width of the active layer 3 in the current injection part 9.
Is the same as the width of the
Even in the case of 10, a large amount of carriers are generated, the absorption coefficient becomes small, and the length equal to or more than that of the current injection portion 9 is required to suppress the FP mode oscillation. Further, since the window layer of the end surface burying layer 11 has a large amount of light reflected on the end surface, it is necessary to form the window layer to a length of about 100 μm or longer. Furthermore, since the current confinement layer is not inserted in the cross section of the non-excitation region 10, the ohmic electrode 8
Need to be selectively formed only on the surface of the current injection portion 9. Thus, the conventional structure has complicated process steps.
(発明の目的) 本発明はこれらの従来構造の欠点を解決するためになさ
れたもので、非励起領域設置の効果を大とし、FPモー
ド発振を効果的に抑圧するため非励起領域での活性層幅
を非励起領域でテーパ状に拡げ、電流注入部で発生した
光をこの部分でガイドすることなく発散させ、光の吸収
を効率良く行わせることを特徴とし、その目的は素子長
が短くても充分にFPモード発振を抑圧できるインコヒ
ーレント発光ダイオードを得ることにある。(Object of the invention) The present invention has been made in order to solve the drawbacks of these conventional structures, and the effect of setting the non-excitation region is increased, and the active state in the non-excitation region is effectively suppressed to effectively suppress the FP mode oscillation. The layer width is tapered in the non-excitation region, and the light generated in the current injection part is diverged without being guided in this part to efficiently absorb the light. The purpose is to shorten the device length. However, it is to obtain an incoherent light emitting diode that can sufficiently suppress FP mode oscillation.
(問題点を解決するための手段) 本発明は上記目的を達成するために、埋込形発光ダイオ
ードにおいて、電流注入部では活性層を屈折率ガイドを
なすように狭く埋め込んで形成し、かつ非注入部では前
記電流注入部において発生した光が特定方向にガイドさ
れることなく面内方向に拡がるように活性層テーパ状に
拡げて形成すると共に、前記電流注入部に形成した活性
層に比し広く埋め込んだことを特徴とする発光ダイオー
ドを要旨とするものである。(Means for Solving the Problems) In order to achieve the above object, the present invention provides a buried light emitting diode in which a current injection portion is formed by narrowly embedding an active layer so as to form a refractive index guide. In the injection portion, the light generated in the current injection portion is formed by expanding the active layer in a taper shape so as to spread in the in-plane direction without being guided in a specific direction, and compared with the active layer formed in the current injection portion. The gist of the invention is a light emitting diode characterized by being widely embedded.
以下、図面に沿って本発明の実施例について説明する。
なお、実施例は一つの例示であって、本発明の精神を逸
脱しない範囲で種々の変更あるいは改良を行いうること
は言うまでもない。Embodiments of the present invention will be described below with reference to the drawings.
Needless to say, the embodiment is merely an example, and various modifications and improvements can be made without departing from the spirit of the present invention.
第1図(a)及び(b),第2図(a)及び(b)本発明のInP/GaI
nAsP系材料による第1の実施例を説明する図で、第1図
(a)は縦断面図、同図(b)は横断面図、第2図は1回目成
長の斜視図、同図(b)は同じく平面図である。1 (a) and (b), 2 (a) and (b) InP / GaI of the present invention
FIG. 1 is a diagram for explaining the first embodiment using an nAsP-based material, and FIG.
(a) is a vertical sectional view, (b) is a horizontal sectional view, (b) is a perspective view of the first growth, and (b) is a plan view.
本発明の発光ダイオードを得るには、1回目の成長とし
て液相成長法(LPE)及び気相成長法(VPE,Mo−
CVD)又は分子線エピタキシ−(MBE)法等によ
り、n形InP基板1上にn形GaInAsP光ガイド層(λ:
1.1μm組成)2、ノンドープGaInAsP活性層(λ:
1.3μm組成)3、p形InPクラッド層4を成長させ
る。次に、フォトエッチング技術によりフォトレジスト
をマスクとして、電流注入部9は<110>方向に沿っ
て3μm程度幅で約400μmストライプ状に残し、続い
て非励起領域10では3μm幅(電流注入部ストライプ
幅)より始まって最終的に40〜50μm幅になるようにテ
ーパ状に約200μmの長さにわたり形成する。続いて端
面埋込部11は約50μm、マスクを形成しない。また、レ
ジストマスクを形成した電流注入部9及び非励起領域10
の周囲は10〜20μmの間隔でレジストマスクを形成しな
いで他の残りの全部分にレジストマスクを形成する。続
いてレジストマスクをマスクとして利用しブロムメタノ
ールエッチング液によりn形GaInAsP光ガイド層
2,ノンドープGaInAsP活性層3及びp形InPクラッド層
4の各層を基板1に達するまでエッチングしてノンドー
プGaInAsP活性層3をはさむ2つの溝17と端面埋込部11の
窓層部18を形成する。この時端面埋込部11と非励起領域
10の境界部は斜めエッチングされる。この第2回目の成
長前の状態を示したのが第2図(a)及び(b)である。In order to obtain the light emitting diode of the present invention, liquid phase epitaxy (LPE) and vapor phase epitaxy (VPE, Mo-) are used as the first growth.
CVD) or molecular beam epitaxy (MBE) method, etc., and n-type GaInAsP optical guide layer (λ:
1.1 μm composition) 2, non-doped GaInAsP active layer (λ:
1.3 μm composition) 3, and p-type InP clad layer 4 is grown. Next, by using the photoresist as a mask by the photo-etching technique, the current injection portion 9 is left in a stripe shape of about 400 μm with a width of about 3 μm along the <110> direction, and then in the non-excitation region 10 a width of 3 μm (the current injection portion stripe). Width) and finally to a width of 40 to 50 μm in a taper shape over a length of about 200 μm. Subsequently, the end face embedding portion 11 is about 50 μm, and no mask is formed. Further, the current injection part 9 and the non-excitation region 10 on which the resist mask is formed.
The resist mask is not formed at intervals of 10 to 20 .mu.m around the circumference of, but the resist mask is formed on all other remaining portions. Then, each layer of the n-type GaInAsP optical guide layer 2, the non-doped GaInAsP active layer 3 and the p-type InP clad layer 4 is etched by the bromine methanol etching solution using the resist mask as a mask until the substrate 1 is reached. Two grooves (17) sandwiching the groove (17) and the window layer portion (18) of the end face embedded portion (11) are formed. At this time, the end face embedded portion 11 and the non-excitation region
The boundary of 10 is obliquely etched. The state before the second growth is shown in FIGS. 2 (a) and 2 (b).
次に、2回目の成長としてLPEによりp形InP電流狭
窄層13及びn形InP電流狭窄層14の電流狭窄用成長を行
う。この時、電流注入部9では2つの溝17に挟まれたス
トライプ状の活性部上にはp形InP電流狭窄層13及びn
形InP電流狭窄層14の各層は成長しないで他の部分(溝1
7及びクラッド層4の上部)に選択的に結晶成長が行わ
れる。そして、非励起領域10ではテーパ状のストライプ
の左端から20μm程度までは電流注入部9と同様に選択
成長が行われ(ストライプ幅が5μm幅程度までは選択
成長が行われる。)、他の全ての部分に結晶成長が行わ
れる。また、端面埋込部11ではn形GaInAsP光ガ
イド層2,ノンドープGaInAsP活性層3及びp形InPクラ
ッド層4の端面斜めエッチング部を含み全ての層上に結
晶成長が行われ、選択成長はない。このp形InP電流狭
窄層13及びn形InP電流狭窄層14の各層が成長した領域
では電流が流れない非励起部となる。続いて、p形InP
埋込層15及びp形GaInAsP電極層16を電流注入部9,非
励起領域10端面埋込部11の各領域の全てに成長させた。
このようにして得たウェハの上面にはAu−Znを蒸着して
p形オーミック電極8を、また基板1側には全体の厚み
が80μm程度になるまで研磨したのちAu−Ge−Niを蒸着
し、n形オーミック電極12を全面に形成した。こうして
得た発光ダイオードの各層の構成は第3図の状態におい
て次のとおりであり、各結晶層はInPの格子定数に合致
している。Next, as a second growth, growth for current confinement of the p-type InP current confinement layer 13 and the n-type InP current confinement layer 14 is performed by LPE. At this time, in the current injection part 9, the p-type InP current confinement layers 13 and n are formed on the striped active part sandwiched between the two grooves 17.
Each layer of the InP-shaped current confinement layer 14 does not grow and other portions (groove 1
7 and the upper part of the cladding layer 4) are selectively grown. In the non-excitation region 10, selective growth is performed up to about 20 μm from the left end of the tapered stripe in the same manner as the current injection portion 9 (selective growth is performed up to a stripe width of about 5 μm), and all others. The crystal is grown in the part of. In the end face buried portion 11, crystal growth is performed on all layers including the n-type GaInAsP optical guide layer 2, the non-doped GaInAsP active layer 3, and the end face oblique etching part of the p-type InP clad layer 4, and there is no selective growth. . In the region where each of the p-type InP current constriction layer 13 and the n-type InP current confinement layer 14 has grown, it becomes a non-excitation portion in which no current flows. Next, p-type InP
The buried layer 15 and the p-type GaInAsP electrode layer 16 were grown in all the regions of the current injection part 9, the non-excitation region 10 and the end face buried part 11.
Au-Zn is vapor-deposited on the upper surface of the thus obtained wafer to form a p-type ohmic electrode 8, and Au-Ge-Ni is vapor-deposited on the substrate 1 side after polishing to a total thickness of about 80 μm. Then, the n-type ohmic electrode 12 was formed on the entire surface. The structure of each layer of the light emitting diode thus obtained is as follows in the state of FIG. 3, and each crystal layer matches the lattice constant of InP.
1;Sn dopedn形InP基板、厚み80μm,キャリヤ密度
3×1018cm-3,EPD5×104cm-2、 2;n形GaInAsP光ガイド層,厚み0.2μm,Sn dop
ed,キャリヤ密度5×1017cm-3、 3;n形GaInAsP活性層,厚み0.2〜0.3μm,ノ
ンドープ、 4;p形InP結晶層(クラド層),厚み0.5μm,Zn
doped,キャリヤ密度5×1017cm-3、 13;p形InP電流狭窄層,厚み0.7μm,Zn doped,
キャリヤ密度1×1017cm-3、 14;n形InP電流狭窄層,厚み0.7μm,Sn doped,
キャリヤ密度1×1017cm-3、 15;p形InP埋込層,厚み1.5μm,Zn doped,キ
ャリヤ密度5×1017cm-3、 16;p形GaInAsP電極層,厚み0.5μm,Zn dope
d,キャリヤ密度2×1018cm-3、 この発光ダイオードを長さ650μm,幅400μmのペレッ
トに分割して、Au−Snハンダによりヒートシンク上にマ
ウントし、電流,光出力特性を測定したところ、25℃連
続動作において電流注入に従って光出力は発振すること
なく増加し、200mAにおいて3mWのインコヒーレント光
出力を得ることができた。1; Sn doped n-type InP substrate, thickness 80 μm, carrier density 3 × 10 18 cm -3 , EPD 5 × 10 4 cm -2 , 2; n-type GaInAsP optical guide layer, thickness 0.2 μm, Sn dop
ed, carrier density 5 × 10 17 cm −3 , 3; n-type GaInAsP active layer, thickness 0.2 to 0.3 μm, undoped, 4; p-type InP crystal layer (clad layer), thickness 0.5 μm, Zn
doped, carrier density 5 × 10 17 cm -3 , 13; p-type InP current confinement layer, thickness 0.7 μm, Zn doped,
Carrier density 1 × 10 17 cm -3 , 14; n-type InP current confinement layer, thickness 0.7 μm, Sn doped,
Carrier density 1 × 10 17 cm −3 , 15; p-type InP buried layer, thickness 1.5 μm, Zn doped, carrier density 5 × 10 17 cm −3 , 16; p-type GaInAsP electrode layer, thickness 0.5 μm, Zn dope
d, carrier density 2 × 10 18 cm -3 , this light emitting diode was divided into pellets with a length of 650 μm and a width of 400 μm, mounted on a heat sink with Au-Sn solder, and the current and light output characteristics were measured. In continuous operation at 25 ° C, the optical output increased without oscillating according to the current injection, and an incoherent optical output of 3 mW could be obtained at 200 mA.
従来の発光ダイオードと比較すると非励起領域10で注入
光のガイドがなく、発散するため光の吸収が効率良く行
えたので光路長を2分の1程度に短くすることができ
た。また端面埋込部11にもれる光量が少なく、この距離
も従来の発光ダイオードの2分の1程度で充分にFPモ
ード発振を抑圧することができた。合わせて電流狭窄層
13,14が2回目の結晶成長時に自動的に形成されるので
p形オーミック電極8を、電流注入部9に選択的に形成
する必要がないため、全面電極で容易に形成でき、p形
InP埋込量15を通してのもれ電流もなくなったため、非
励起領域10のFPモード発振抑圧効果も充分に発揮でき
た。また、非励起領域10を300μmとした発光ダイオー
ドでは端面埋込部11を切り取った構造の発光ダイオード
でもFPモード発振を充分抑圧することができた。Compared with the conventional light emitting diode, there is no guide for the injected light in the non-excitation region 10 and the light is diverged, so that the light can be absorbed efficiently, so that the optical path length can be shortened to about half. Further, the amount of light leaked into the end face embedded portion 11 was small, and this distance was about half of that of the conventional light emitting diode, and the FP mode oscillation could be sufficiently suppressed. Combined current confinement layer
Since 13 and 14 are automatically formed during the second crystal growth, it is not necessary to selectively form the p-type ohmic electrode 8 in the current injecting portion 9, so that it is possible to easily form the p-type ohmic electrode 8 using the entire surface electrode.
Since the leakage current through the InP embedding amount 15 also disappeared, the FP mode oscillation suppressing effect of the non-excitation region 10 could be sufficiently exerted. Further, in the light emitting diode having the non-excitation region 10 of 300 μm, even the light emitting diode having the structure in which the end face embedded portion 11 is cut off could sufficiently suppress the FP mode oscillation.
なお、本発明はn形InP基板を用いた例について説明し
たが、p形InP基板を使用しても効果は同じであり、そ
の場合はnはp、pはn形の不純物を添加すればよいこ
とは言うまでもない。Although the present invention has been described with reference to the example using the n-type InP substrate, the same effect can be obtained by using the p-type InP substrate. In that case, n is p and p is an n-type impurity. It goes without saying that it is good.
次に、第3図(a)及び(b),第4図(a)及び(b)は本発明の
第2の実施例を説明する図で、第3図(a)は縦断面図、
同図(b)は横断面図、第4図(a)はメサ形成後の平面図、
同図(b)は同じく側面図である。Next, FIGS. 3 (a) and (b), FIGS. 4 (a) and (b) are diagrams for explaining the second embodiment of the present invention, and FIG. 3 (a) is a longitudinal sectional view,
FIG. 4B is a cross-sectional view, FIG. 4A is a plan view after forming mesas,
The same figure (b) is a side view.
本実施例はp形InP基板を使用して、一回の成長で電流
狭窄層14を含む一連の結晶成長を行うことができる。In the present embodiment, a p-type InP substrate can be used to perform a series of crystal growth including the current confinement layer 14 in one growth.
この発光ダイオードを得るにはp形InP基板1'上全面にS
iO2またはSiN等の薄膜をスパッタあるいはCVD法によ
り形成した後、フォトエッチ技術により電流注入部9は
<10>方向にストライプ状に〜3μm幅の窓をあ
け、続いて非励起領域10は電流注入部9に続いてテーパ
状に窓をあける。端面埋込部11'に相当する部分では窓
はあけない。この窓をあけた部分を塩酸によりエッチン
グすると電流注入部9はV溝状に、非励起領域10は底が
平らなテーパ状の溝が形成できる。第4図(a),(b)に示
す電流注入部9,非励起領域10及び端面埋込部11'の寸
法は第1の実施例と同じである。To obtain this light emitting diode, S is formed on the entire surface of the p-type InP substrate 1 '.
After forming a thin film of iO 2 or SiN by sputtering or CVD, the current injection part 9 opens a stripe-shaped window of ~ 3 μm in the <10> direction by the photoetching technique. Following the injection part 9, a window is opened in a tapered shape. No window is opened in the portion corresponding to the end face embedded portion 11 '. By etching the portion where the window is opened with hydrochloric acid, the current injection portion 9 can be formed into a V-shaped groove, and the non-excitation region 10 can be formed into a tapered groove with a flat bottom. The dimensions of the current injection portion 9, the non-excitation region 10 and the end face buried portion 11 'shown in FIGS. 4 (a) and 4 (b) are the same as those in the first embodiment.
このようにして得たp形InP基板1′上に結晶成長する
と、はじめのn−InP電流狭窄層14は電流注入部9の溝
内部には成長しないで、選択的に他の平坦部のみに成長
する。また、非励起領域10では溝幅が5μm以上になる
と溝内部にも成長するようになり、電流狭窄層14が自動
的に形成できる。また、端面埋込埋11'では電流狭窄層1
4が成長する。次に、p形GaInAsPガイド層(組成λ:
1.2μm)を成長させると電流狭窄層14が選択的に成
長されなかった溝内部(電流注入部9及び非励起領域10
の一部)にも成長が行われる。後の一連の成長及び作製
工程は第1の実施例と同様である。この発光ダイオード
においても第1の実施例と同様の特性を得ることができ
た。When crystals grow on the p-type InP substrate 1'obtained in this way, the first n-InP current confinement layer 14 does not grow inside the groove of the current injection portion 9, but only on other flat portions. grow up. Further, in the non-excitation region 10, when the groove width becomes 5 μm or more, the non-excitation region 10 also grows inside the groove, and the current confinement layer 14 can be automatically formed. In addition, in the end face buried 11 ', the current confinement layer 1
4 grows. Next, the p-type GaInAsP guide layer (composition λ:
1.2 μm), the current confinement layer 14 was not selectively grown inside the groove (current injection portion 9 and non-excitation region 10).
Part of) will also be grown. The subsequent series of growth and fabrication steps are the same as in the first embodiment. Also in this light emitting diode, the same characteristics as in the first embodiment could be obtained.
なお、実施例では波長1.3μmのInP−GaInAsP系の半
導体について説明したが、他の波長域及びこの例とは異
なる半導体を用いたインコヒーレント発光ダイオードに
ついても(GaAs−GaAlAs系等)本発明の方法が応用でき
ることは明らかである。In the example, the InP-GaInAsP-based semiconductor having a wavelength of 1.3 μm has been described, but an incoherent light-emitting diode using another wavelength band and a semiconductor different from this example (GaAs-GaAlAs-based etc.) is also used in the present invention. It is clear that this method can be applied.
また、実施例では非励起部分に自動的に電流阻止構造が
形成されるような場合を述べたが、電極を部分的に形成
する場合には通常のBH構造も応用できることは言うま
でもない。Further, although the embodiment has described the case where the current blocking structure is automatically formed in the non-excited portion, it is needless to say that a normal BH structure can be applied when the electrode is partially formed.
(発明の効果) 以上述べたごとく本発明によれば、非励起領域での活性
層幅をテーパ状に拡げ励起領域との間の屈折率差を可能
な限り小さくし、注入部で発生した光をこの部分でガイ
ドすることなく発散させ、光の吸収を効率良く行わせる
ことにより非励起領域、したがって全体の素子長を短く
してFPモード発振を充分に抑圧することができた。こ
のためウェハの利用効率が大きくなり、素子の生産性が
向上した。また、非励起領域に自動的に電流狭窄層を形
成できるため電極の選択形成をする必要がなく、プロセ
ス工程が単純化され、非励起領域へのもれ電流も低下さ
せることができた。(Effects of the Invention) As described above, according to the present invention, the width of the active layer in the non-excitation region is expanded in a taper shape so that the difference in the refractive index between the excitation region and the excitation region is made as small as possible, and It was possible to sufficiently suppress the FP mode oscillation by diverging the light without guiding in this portion and efficiently absorbing the light, thereby shortening the non-excitation region and thus the entire device length. As a result, the wafer utilization efficiency is increased and the device productivity is improved. Further, since the current confinement layer can be automatically formed in the non-excitation region, it is not necessary to selectively form electrodes, the process steps are simplified, and the leakage current to the non-excitation region can be reduced.
第1図(a)及び(b)、第2図(a)及び(b)は本発明のInP/G
aInAsP系材料による第1の実施例を説明する図で、第1
図(a)は縦断面図、同図(b)は横断面図、第2図(a)は1
回目成長の斜視図、同図(b)は同じく平面図、第3図(a)
及び(b),第4図(a)及び(b)は本発明の第2の実施例を
説明する図で、第3図(a)は縦断面図、同図(b)は横断面
図、第4図(a)はメサ形成後の平面図、同図(b)は同じく
側面図、第5図(a),(b)及び(c)は従来構造の埋込形発
光ダイオードの模式図で、同図(a)は平面図、同図(b)及
び(c)はそれぞれ縦断面図,横断面図である。 1・・・・n形InP基板 2・・・・n形GaInAsP光ガイド層 3・・・・ノンドープGaInAsP活性層 4・・・・p形InPクラッド層 5・・・・p形GaInAsP電極層 6・・・・p形InP電流狭窄層 7・・・・n形InP電流狭窄層 8・・・・p形オーミック電極 9・・・・電流注入部 10・・・・非励起領域 11・・・・端面埋込部 12・・・・n形オーミック電極 13・・・・p形InP電流狭窄層 14・・・・n形InP電流狭窄層 15・・・・p形InP埋込層 16・・・・p形GaInAsP電極層 17・・・・溝部 18・・・・端面埋込部 19・・・・端面斜エッチング部 1'・・・・p形InP基板 11'・・・・端面埋込相当部 2'・・・・p形GaInAsP光ガイド層 3'・・・・p形GaInAsP活性層 4'・・・・n形InPクラッド層 16'・・・n形GaInAsP電極層1 (a) and (b) and FIGS. 2 (a) and (b) show the InP / G of the present invention.
It is a figure explaining the 1st example by aInAsP system material.
Figure (a) is a vertical sectional view, Figure (b) is a horizontal sectional view, and Figure 2 (a) is 1
Perspective view of the second growth, the same figure (b) is a plan view, FIG. 3 (a)
And (b), Fig. 4 (a) and (b) are diagrams for explaining the second embodiment of the present invention, Fig. 3 (a) is a longitudinal sectional view, and Fig. 3 (b) is a lateral sectional view. FIG. 4 (a) is a plan view after forming the mesa, FIG. 4 (b) is a side view of the same, and FIGS. 5 (a), (b) and (c) are schematic views of a conventional embedded light emitting diode. In the figure, (a) is a plan view, and (b) and (c) are a vertical sectional view and a horizontal sectional view, respectively. 1 ... n-type InP substrate 2 ... n-type GaInAsP optical guide layer 3 ... non-doped GaInAsP active layer 4 ... p-type InP clad layer 5 ... p-type GaInAsP electrode layer 6 .... p-type InP current confinement layer 7 ... n-type InP current confinement layer 8 ... p-type ohmic electrode 9 ... current injection part 10 ... non-excitation region 11 ...・ End face buried part 12 ・ ・ ・ ・ ・ ・ n-type ohmic electrode 13 ・ ・ ・ ・ p-type InP current blocking layer 14 ・ ・ ・ ・ ・ ・ n-type InP current blocking layer 15 ・ ・ ・ ・ ・ ・ p-type InP buried layer 16 ・ ・・ ・ P-type GaInAsP electrode layer 17 ・ ・ ・ ・ ・ ・ Groove 18 ・ ・ ・ ・ End face embedded part 19 ・ ・ ・ ・ End face oblique etching part 1 '・ ・ ・ ・ P type InP substrate 11' ・ ・ ・ ・ End face embedded Corresponding part 2 '... P-type GaInAsP optical guide layer 3' ... P-type GaInAsP active layer 4 '... N-type InP clad layer 16' ... N-type GaInAsP electrode layer
Claims (1)
部では活性層を屈折率ガイドをなすように狭く埋め込ん
で形成し、かつ非注入部では前記電流注入部において発
生した光が特定方向にガイドされることなく面内方向に
広がるように活性層をテーパ状に拡げて形成すると共
に、前記電流注入部に形成した活性層に比し広く埋め込
んだことを特徴とする発光ダイオード。1. In an embedded light emitting diode, an active layer is narrowly embedded so as to form a refractive index guide in a current injection portion, and light generated in the current injection portion is guided in a specific direction in a non-injection portion. A light emitting diode, characterized in that the active layer is formed so as to be expanded in a taper shape so as to be spread in the in-plane direction without being formed, and is wider than the active layer formed in the current injection portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28863887A JPH067603B2 (en) | 1987-11-16 | 1987-11-16 | Light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28863887A JPH067603B2 (en) | 1987-11-16 | 1987-11-16 | Light emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01129478A JPH01129478A (en) | 1989-05-22 |
| JPH067603B2 true JPH067603B2 (en) | 1994-01-26 |
Family
ID=17732757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28863887A Expired - Lifetime JPH067603B2 (en) | 1987-11-16 | 1987-11-16 | Light emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH067603B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3506951A1 (en) * | 1984-02-29 | 1985-10-24 | Japan Nuclear Fuel Co., Ltd., Yokosuka, Kanagawa | METHOD AND DEVICE FOR ASSEMBLING A FUEL ELEMENT BUNDLE |
| JPH02308577A (en) * | 1989-05-24 | 1990-12-21 | Nippon Telegr & Teleph Corp <Ntt> | Superluminescent diode |
| JP2778985B2 (en) * | 1989-05-26 | 1998-07-23 | 日本電信電話株式会社 | Super luminescent diode |
| EP0641049B1 (en) | 1993-08-31 | 1998-10-28 | Fujitsu Limited | An optical semiconductor device and a method of manufacturing the same |
-
1987
- 1987-11-16 JP JP28863887A patent/JPH067603B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01129478A (en) | 1989-05-22 |
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|---|---|---|---|
| EXPY | Cancellation because of completion of term |