JPH0677203B2 - Read-only sequence controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention starts each actuator of a machine with a signal that a sensor is provided on the inlet side of a machine and indicates that a workpiece has passed, and stops it with a 1-cycle end signal. This is a read-only sequence controller that restarts each actuator when the work has passed, and stops when it does not pass.

Generally, a small read-only sequence controller has a standard output of 8 points, and the cycle time is over 3 seconds. Then, many sensors are arranged to prepare for the detection of abnormality, but the maintenance of the sensor network becomes extremely complicated and expensive. However, it is still difficult to achieve perfection.

The read-only sequence controller of the present invention has the first sensor provided at the entrance side of the machine passing the work "Yes".
Output a start signal to drive each actuator of the machine, stop the drive of each actuator at the end of 1 cycle signal, and the second sensor provided on the exit side of the machine passes the workpiece Waits for the signal of one sensor and outputs a start signal to restart each actuator. If an error occurs in one cycle, wait for the signal of the first sensor and output an abnormal stop signal to stop each actuator. Read-only sequence via a single control line.
An abnormal stop signal is introduced to the controller to stop them all at once, allowing multiple read-only sequence controllers to be added in multiple stages.

At this time, the abnormality display LED length of the read-only sequence controller that has generated an abnormality emits light. Check the abnormal point, remove the abnormal work, and when the abnormal point is repaired, press the reset switch of the read-only sequence controller and press the start switch. Each read-only sequence controller returns to normal and resumes work all at once.

In this way, the read-only sequence controller of the present invention is stopped at each end of one cycle to check for an abnormality, and if it is normal, it is automatically restarted. In this way, the malfunction of the machine can be found immediately and no major accident will occur.

An object of the present invention is to provide a compact and low-cost read-only sequence controller that does not require a separate sensor because it has a length that has one sensor for detecting the passage of a workpiece and one sensor for detecting the passage of the workpiece. is there.

An embodiment of the read-only sequence controller of the present invention will be described below. FIG. 1 is a plan view of a read-only sequence controller, FIG. 2 is a side view, and FIG.
The figure is a circuit diagram, and FIG. 4 is an explanatory diagram in the case of multistage expansion.

Read clock / pulse controller 1 with built-in power supply
In addition, the output relay unit 2 consisting of a one-board printed circuit board is detachably fixed.

The output relay unit 2 has eight relays 3 with 8 outputs as a reference, 8P terminal block 4 as 2P terminal for each relay, 10P terminal block 5 with AC introduction 2P, and a predetermined number. The connector 7 for detachably mounting the EPROM 6 in which the data is written is fixed. Reference numeral 8 is a transistor array, 9 is a connector for connecting a circuit between the clock pulse control device 1 and the output relay unit 2, and 10 is an operation display LED of 8 relays.

The read clock pulse controller 1 includes a power switch 11, a fuse 12, a power-on display LED 13, a preset code switch 14, an error display LED 15, and a reset switch 1.
6, a start switch 17, and an input terminal block 18 are provided. The cycle time is determined by the preset code switch 14. Since the unit of cycle time is 0.1 second, the preset value 32 shown in the figure is a cycle time of 3.2 seconds. The cycle time can be changed from 0.1 seconds to 9.9 seconds. Of course, by changing the internal partial circuit, the cycle time can be changed from 1 second to 99 seconds and 1 minute to 99 minutes if the unit is 1 second.

FIG. 3 is a circuit diagram of the read-only sequence controller of the present invention. Now, set the cycle time to 3.2 seconds and turn on the power. Vc with switching regulator 19
c is obtained, the output of the initial reset circuit 20 resets the second FF via the inverter 2, the third FF24 via the three-input NAND23, the fifth FF26 via the two-input NAND25, and the two-input NA.
4th FF28 via ND27 and 1st FF via 2-input NAND29
Reset 30 respectively.

When the second FF 22 is reset, the transistor 31 is turned off, the "1" is input to the 3-input NAND 23, and the signal of one external control line 33 is changed to "1" via the input / output terminal 32.

When the 3rd FF24 is reset, "1" is continuously input to the CI of the presettable down counter 35 via the 2-input NAND34, and the output of the read clock pulse is stopped during that period.
Abnormal signal output gate 2 input N when the 5th FF26 is reset
When "0" is continuously input to AND36 and the fourth FF 28 is reset, it is inverted in the transistor array 8 and "1" is continuously input to EPROM6, and the output of data is stopped during that period.

When the work passes through the first sensor 37 installed on the machine inlet side, the signal "0" sets the 1st FF30 via the 1st input terminal 38, chattering noise prevention circuit 39, and inverter 40 to generate one-shot pulse. The circuit 41 outputs a "1" one-shot pulse. And A. Binary counter 42 and clock pulse generator
Clear each 43 and input them to the PE of the presettable down counter via the inverter 44 and 2-input NAND 45 to input the preset value 2 of the preset code switch 14 to the counter 35 and the preset value 3 to the counter 46. Preset each.

B. 4th FF28 is set and "0" is input to CE of EPROM6 to hold it in the output state, and 3rd FF24 is set and "0" is input to CI of the presettable counter 35 to continuously output clock pulses .

As will be described later, a read clock pulse is output from the presettable counter, the address of EPROM6 is sequentially specified via the 2-input NOR 47, inverter 48, binary counter 42, transistor array 8, connector 9 and written there. The read data is read, and each actuator of the machine is driven via the eight relays 3 and the output terminal array.

When one cycle ends, as described later, one cycle end signal “0”
Is output from the 3-input NAND49 and is output to the 4th FF2 via the 2-input NAND27.
8 is reset to stop the output of EPROM6, and the third FF24 is reset via the 3-input NAND23 to reset the presettable down
Stop the counter's read clock pulse output to stop each machine actuator. Moreover, the 5th FF26 is set through the inverter 50 and the abnormal signal output gate 2 input NAND3
Change the first input of 6 to "1" and hold it.

As the clock pulse, the output 1000HZ of the clock pulse generation circuit 43 incorporated in the crystal oscillator is input to the clock lines C of the presettable down counters 35 and 46, respectively.

The preset lines P ₁ , P ₂ , P ₃ , P ₄ are the corresponding presets. -Connected to the BCD line of cord switch 14.

Each time one clock pulse is input, the presettable
The contents of the down counter 35 are decremented by one, and when 32 clock pulses are input to the presettable down counter, both 2 inputs of NOR 47 become "0" and one read clock pulse is output. .

On the other hand, when the output of the 2-input NOR47 becomes "1", the 2-input NAND51 waits for the inverter 52 to output "1" at the falling edge of the clock pulse, and then outputs "0". Apply a 1 "pulse to PE to reset the presettable
Reset the preset value 32 to the counter again.

After that, 32 clock pulses are input to the presettable counter.
One read clock pulse is continuously output for each input, which is the binary counter via the inverter 48.
Input to 42 clock line C.

Now, since the time required for one cycle is determined by the number of read clock pulses, the following description will be made assuming that the number of read clock pulses in one cycle is 100.

In order to output the one cycle end signal with 100 read clock pulses, the output lines Q ₂ , Q ₅ and Q ₆ of the binary counter 42 are used as the 3-input NAND 49.

Now, when the machined work passes through the second sensor 53 provided on the exit side of the machine, the signal "0" is output to the second input terminal 54.
To the chattering noise prevention circuit 55, 2 inputs NAND
The 5th FF26 is reset via 25 to change the first input of the abnormal signal output gate 2 input NAND36 to "0", and further 2 input NAND
Reset 1st FF30 via 29. Therefore, waiting for the signal from the first sensor, the first FF30 is set and each actuator of the machine is restarted. In this way, each actuator of the machine is continuously driven unless an abnormality occurs.

If there is no signal from the second sensor after the end of one cycle, the first input of the abnormal signal output gate 2 input NAND36 is kept at "1" and the first FF30 is not reset. No. 1 FF30 is not set even if there is a 37 signal. And the second of abnormal signal output gate 2 input NAND36
Since "1" is applied to the input, both inputs become "1" and the second FF
Is set. Transistor 31 turns on and an error is displayed
The LED 15 emits light, and the output “0” of the transistor 31 is input / output terminal 32, an external control line 33, and a series of read-only sequence controller 3-input NAND23 and 3rd FF2.
Input "1" to CI of each presettable counter via 4 and stop all machines at once.

Figure 5 shows the read-only sequence controllers a, b,
An embodiment in which an automated system is assembled with c, 3 units is shown (hereinafter, a read-only sequence controller is simply referred to as a sequencer). It is assumed that the sequencers a, b, and c control the corresponding machines A, B, and C, respectively. The machine A at the top is a well-known parts feeder, and when the switch is turned on, the work is always automatically aligned in a predetermined position and this is repeated. When a predetermined number of workpieces are aligned, the first sensor 37 detects this through the delay circuit 57 and sends a signal to the first input terminal 38 of the sequencer a,
The sequencer a is started, the actuator is operated to send out one work piece, and one cycle is completed and then stopped.
It restarts with the signal of the second sensor 53 provided at the exit of the feeder. Then, the work is sent to the machine B every predetermined cycle. When the work passes the first sensor 35 of the machine B, the signal causes the machine B to start. In the same manner, the machines A, B and C are continuously driven, and the product comes out of the machine C at the end of each cycle from the third cycle.

For example, assume that an abnormality has occurred in the machine C. There is no signal from the second sensor 53 because the work is stagnant on the way and the first sensor
An abnormal stop signal is issued by the signal 37, and the sequencers b and a are simultaneously stopped via the control line 33 as well as the sequencer c. Inspect and repair the faulty part of the fault generator C by illuminating the fault indicator LED, and when finished, press the reset switch 16 of the relevant sequencer and then the start switch 17 thereof. The sequencers of a, b, and c restart their operation all at once.

Here, the cycle time is determined based on the final sequencer. If the cycle time of sequencer c is 3.2 seconds, b is 2.8 seconds and a is 2.4 seconds. This is to prevent a malfunction by giving a wait time to the sequencer in the subsequent stage.

[Brief description of drawings]

1 is a plan view of a read-only sequence controller of the present invention, FIG. 2 is a side view, FIG. 3 is a circuit diagram, and FIG.
The figure shows an embodiment in which an automated system is constituted by three read-only sequence controllers. 1 …… Clock / Pulse controller 2 …… Output relay unit 3 …… Relay 6 …… EPROM 14 …… Preset code switch 15 …… Error indication LED 16 …… Reset switch 17 …… Start switch 22… 2nd FF 24 3rd FF 26 5th FF 28 4th FF 30 1st FF 31 ...... Transistor 32 ...... Input / output terminal 33 ...... External control line 35 ...... Presettable down counter 37 ...... … First sensor 38 …… First input terminal 42 …… Binary counter 46 …… Presettable down counter 53 …… Second sensor 54 …… Second input terminal 56 …… Parts feeder 56 …… Delay circuit

Claims (5)

[Claims] 1. A clock pulse generating circuit, a presettable counter for outputting a read clock pulse at a cycle corresponding to a preset value of a preset code switch, and a binary counter for counting the read clock pulse. In a read-only sequence controller consisting of an EPROM that outputs the data whose address is specified by the output of the binary counter, a relay unit that controls each actuator of the machine by the output of the EPROM, and an input / output terminal row , 1st FF is set by the signal of "passing" of the work of the 1st sensor installed on the machine inlet side, the start signal is output, and each actuator of the machine is driven.
The output of the presettable counter and the output of the EROM are stopped by the cycle end signal to stop the drive of each actuator, and the work passing signal of the second sensor provided on the exit side of the machine is a "pass" signal Close the opened error signal output gate, reset the 1st FF, wait for the signal of the 1st sensor, output the start signal from the 1st FF, and restart each actuator. If an error occurs during one cycle, For example, the second sensor does not output a signal, and the abnormal signal output gate becomes an open side at the end of one cycle signal. Waiting for the signal of the first sensor, the abnormal stop signal is output and the second FF is set to output the abnormal stop signal. A read-only sequence controller characterized by emitting and stopping each actuator. 2. Further, an abnormal stop signal is introduced to each read-only sequence controller via one abnormal control line to stop them all at once, and a plurality of read-only sequence controllers can be added in multiple stages. A read-only sequence controller according to claim 1. 3. The first cycle end signal resets the third FF and the fourth FF respectively to stop the EPROM output, and further sets the fifth FF to open the first input gate of the abnormal signal output 2-input NAND36. A read-only sequence controller according to claim 1. 4. An abnormal signal output 2 by resetting the 5th FF by a work passage signal of a second sensor provided on the exit side of the machine.
A patent characterized by closing the first input gate of the input NAND36, further resetting the first FF, setting the first FF after waiting for the signal of the work passage of the first sensor provided on the inlet side of the machine, and restarting A sequence controller for read connection according to claim 1. 5. After the completion of one cycle, if there is no signal of the work passage of the second sensor, the signal of the work passage of the first sensor becomes 2
Output an abnormal signal from the input NAND36 and set the 2nd FF,
The read-only sequence controller according to claim 1, wherein an abnormal signal is emitted and the read-only sequence controller is stopped.