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JPH0680974B2 - Series power supply circuit - Google Patents
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JPH0680974B2 - Series power supply circuit - Google Patents

Series power supply circuit

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Publication number
JPH0680974B2
JPH0680974B2 JP61238851A JP23885186A JPH0680974B2 JP H0680974 B2 JPH0680974 B2 JP H0680974B2 JP 61238851 A JP61238851 A JP 61238851A JP 23885186 A JP23885186 A JP 23885186A JP H0680974 B2 JPH0680974 B2 JP H0680974B2
Authority
JP
Japan
Prior art keywords
series
circuit
line
couplers
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61238851A
Other languages
Japanese (ja)
Other versions
JPS6393204A (en
Inventor
修己 石田
陽次 磯田
守▲やす▼ 宮▲崎▼
紀雄 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61238851A priority Critical patent/JPH0680974B2/en
Publication of JPS6393204A publication Critical patent/JPS6393204A/en
Publication of JPH0680974B2 publication Critical patent/JPH0680974B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、アレイアンテナ用給電回路の1つである直
列給電回路に関するものである。
TECHNICAL FIELD The present invention relates to a series feeding circuit which is one of feeding circuits for an array antenna.

〔従来の技術〕[Conventional technology]

第3図は例えば「アンテナ工学ハンドブック」(電子通
信学会編,オーム社発行)の第222頁〜第224頁に記載さ
れている従来の直列給電回路を示し、図において、11〜
19は結合器、31〜38は線路、50は整合終端器、Poは入出
力端子、P1〜P9は分配出力端子であり、結合器11〜19は
線路31〜38を介して縦続接続されている。
FIG. 3 shows a conventional series feeding circuit described on pages 222 to 224 of, for example, “Antenna Engineering Handbook” (published by The Institute of Electronics, Information and Communication Engineers, Ohmsha, Ltd.).
19 is a coupler, 31 to 38 are lines, 50 is a matching terminator, Po is an input / output terminal, P1 to P9 are distribution output terminals, and the couplers 11 to 19 are connected in series through the lines 31 to 38. There is.

このように構成された直列給電回路では、端子P0に入射
した電波は線路31〜38を伝播する途中で順次結合器11〜
19によって必要量の電力が端子P1〜P9に取り出され、残
った電力は整合終端器50に吸収される。このとき、端子
P1〜P9に取り出される波の位相分布は、線路31〜38の電
気長によって決定される。
In the series feeding circuit configured as described above, the electric waves incident on the terminal P0 are sequentially coupled to the couplers 11-
A necessary amount of electric power is taken out by the terminals 19 to the terminals P1 to P9, and the remaining electric power is absorbed by the matching terminator 50. At this time, the terminal
The phase distribution of the waves extracted to P1 to P9 is determined by the electrical length of the lines 31 to 38.

例えば、線路31〜38の電気長を等しく選ぶと、端子P1〜
P9の隣接端子間位相差は次式で表される。
For example, if the electric lengths of the lines 31 to 38 are selected to be equal, the terminals P1 to
The phase difference between adjacent terminals of P9 is expressed by the following equation.

但し、φ〜φ=端子P1〜P9に取り出される波の位相 λg=線路31〜38の波長 Lo=線路31〜38の線路長 この式からわかるように、端子P1〜P9に取り出される波
は等間隔で位相の異なる位相分布となる。
However, φ 1 to φ 9 = phase of the wave extracted to terminals P1 to P9 λg = wavelength of lines 31 to 38 Lo = line length of lines 31 to 38 As can be seen from this formula, the wave extracted to terminals P1 to P9 Has a phase distribution with equal intervals and different phases.

また周波数によって波長λgが変化し、隣接端子間位相
差が変化するので、周波数走査アンテナ等の給電回路と
して使用することができる。
Further, since the wavelength λg changes depending on the frequency and the phase difference between adjacent terminals also changes, it can be used as a power feeding circuit such as a frequency scanning antenna.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかし、従来の直列給電回路では、結合器11〜19が縦続
接続されているため結合器による反射波が重畳される。
However, in the conventional series power feeding circuit, the couplers 11 to 19 are connected in cascade, so that the reflected waves from the couplers are superimposed.

例えば第3図の直列給電回路の反射係数Γは、多重反射
を無視すると次式で表される。
For example, the reflection coefficient Γ of the series feeding circuit shown in FIG. 3 is expressed by the following equation when multiple reflection is ignored.

ここで、 Γ〜Γ9:結合器11〜19の反射係数 C1〜C9:結合器11〜19の結合度(dB) 簡単のため、 C1=C2=……=C8=C9=−9.5dB …(3) Γ=Γ=……=Γ=Γ=Γo …(4) とすると、 Γ=5.9Γo …(5) となる。この値は、分配出力端子数が多くなり、結合器
の数が増えるほど大きな値となる。
Here, Γ 1 to Γ 9 : Reflection coefficient of couplers 11 to 19 C 1 to C 9 : Coupling degree of couplers 11 to 19 (dB) For simplicity, C 1 = C 2 = ... = C 8 = When C 9 = -9.5dB ... (3) Γ 1 = Γ 2 = ...... = Γ 8 = Γ 9 = Γo ... (4) that becomes Γ = 5.9Γo ... (5). This value becomes larger as the number of distribution output terminals increases and the number of couplers increases.

従って、従来の直列給電回路では分配出力端子数の多い
場合に、VSWRが著しく劣化するという問題があった。
Therefore, the conventional series power supply circuit has a problem that VSWR is significantly deteriorated when the number of distribution output terminals is large.

この発明は、上記のような問題点を解決するためになさ
れたもので、比較的簡単な構成でVSWRの良好な直列給電
回路を得ることを目的とする。
The present invention has been made to solve the above problems, and an object thereof is to obtain a series power supply circuit having a good VSWR with a relatively simple configuration.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る直列給電回路は、結合器と,第1の線路
とを交互に縦続接続し、各々の結合器から、または、各
々の結合器及び最終端の線路から分配出力を得るよう構
成された複数の第1の直列給電回路と、結合器と,第2
の線路とを交互に縦続接続し、各々の結合器及び最終端
の線路から分配出力を得るよう構成された第2の直列給
電回路とを備え、上記第2の直列給電回路の複数の分配
出力端子の各々を、上記複数の第1の直列給電回路の各
々の入力端子に接続し、上記第2の直列給電回路の第2
の線路の線路長を、それに対応する上記第1の直列給電
回路内の上記第1線路の総線路長と等しいか,或いはそ
れよりも長いものとし、上記第2の直列給電回路の入力
端子を全体回路の入力端子とし、上記複数の第1の直列
給電回路の分配出力端子を全体回路の分配出力端子とし
たものである。
The series feeding circuit according to the present invention is configured to alternately connect the couplers and the first lines in cascade, and obtain a distributed output from each coupler, or from each coupler and the line at the final end. A plurality of first series feeding circuits, a coupler, and a second
And a second series feed circuit configured to obtain a distributed output from each coupler and the line at the final end, and a plurality of distributed outputs of the second series feed circuit. Each of the terminals is connected to an input terminal of each of the plurality of first series feeding circuits, and the second of the second series feeding circuits is connected.
The line length of the line is equal to or longer than the total line length of the first line in the corresponding first series feeding circuit, and the input terminal of the second series feeding circuit is The input terminals of the entire circuit are used, and the distribution output terminals of the plurality of first series feeding circuits are used as the distribution output terminals of the entire circuit.

〔作用〕[Action]

この発明においては、上記第2の直列給電回路で分配さ
れた複数の分配出力の各々が、上記複数の第1の直列給
電回路の各々で個別に複数に分配されて、外部に出力さ
れることとなる。従って、出力側の複数の第1の直列給
電回路における反射波は重畳されず、単に結合器と線路
とを交互に縦続接続して,4以上の複数の分配出力が得ら
れるよう構成した従来構成の回路に比して、全体回路内
における反射係数を減少させることができる。
In the present invention, each of the plurality of distribution outputs distributed by the second series power feeding circuit is individually distributed by each of the plurality of first series power feeding circuits and output to the outside. Becomes Therefore, the reflected waves in the plurality of first series feeding circuits on the output side are not superposed, and the couplers and the lines are simply cascaded alternately to obtain a plurality of distributed outputs of 4 or more. It is possible to reduce the reflection coefficient in the entire circuit as compared with the above circuit.

〔実施例〕〔Example〕

以下、本発明の実施例を図について説明する。第1図は
この発明の一実施例を示すブロック図であり、図におい
て、1〜3は第1の直列給電回路、4は第2の直列給電
回路、11〜21は結合器、31〜36は第1の線路、37,38は
第2の線路、51〜53は整合終端器、P0は入力端子、P1〜
P9は第1の直列給電回路1〜3の分配出力端子、P10〜P
12は第2の直列給電回路4の分配出力端子、P13は結合
器21の入力端子である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1 to 3 are first series feeding circuits, 4 is second series feeding circuits, 11 to 21 are couplers, and 31 to 36. Is the first line, 37 and 38 are the second lines, 51 to 53 are matching terminators, P0 is the input terminal, and P1 to
P9 is a distribution output terminal of the first series power feeding circuits 1 to 3, P10 to P
12 is a distribution output terminal of the second series power feeding circuit 4, and P 13 is an input terminal of the coupler 21.

このように本実施例の直列給電回路では、結合器11〜13
は第1の線路31,32、結合器14〜16は第1の線路33,34、
結合器17〜19は第1の線路35,36を介して縦続接続さ
れ、それぞれ分配出力端子数が3個の第1の直列給電回
路1〜3を構成している。
Thus, in the series power feeding circuit of this embodiment, the couplers 11 to 13 are
Is the first lines 31 and 32, the couplers 14 to 16 are the first lines 33 and 34,
The couplers 17 to 19 are connected in series via the first lines 35 and 36 to form first series feeding circuits 1 to 3 each having three distribution output terminals.

また結合器20,21は第1の線路に比べ線路長が3倍の第
2の線路37を介して縦続接続され、これに第2の線路38
を加えて第2の直列給電回路4を構成している。
The couplers 20 and 21 are connected in cascade via a second line 37 having a line length three times as long as that of the first line, and a second line 38 is connected to this.
To form the second series feeding circuit 4.

さらに上記第1の直列給電回路1〜3の入力端子がそれ
ぞれ第2の直列給電回路4の分配出力端子P10〜P12に接
続されている。そして、第2の直列給電回路4の入力端
子P0が全体回路の入力端子となり、上記第1の直列給電
回路1〜3の各々の分配出力端子P1〜P3,P4〜P6,P7〜P8
が、全体回路の分配出力端子となる。以上の構成によ
り、第3図に示す従来の直列給電回路と同様の分配出力
端子数が9の直列給電回路が構成されている。
Further, the input terminals of the first series power feeding circuits 1 to 3 are connected to the distribution output terminals P10 to P12 of the second series power feeding circuit 4, respectively. Then, the input terminal P0 of the second series power feeding circuit 4 becomes the input terminal of the entire circuit, and the distribution output terminals P1 to P3, P4 to P6, P7 to P8 of the first series power feeding circuits 1 to 3 respectively.
Serves as the distribution output terminal of the entire circuit. With the above configuration, a series power supply circuit having nine distributed output terminals, similar to the conventional series power supply circuit shown in FIG. 3, is configured.

次に本実施例の作用効果について説明する。Next, the function and effect of this embodiment will be described.

上記のように構成された直列給電回路では、端子P0に入
射した波は、まず第2の直列給電回路4の線路37,38を
伝播する途中で順次結合器20,21によって必要量の電力
が端子P10,P11に、残った電力が端子P12に取り出され
る。端子P10〜P12に取り出された波は同様に第1の直列
給電回路1〜3で電力分配され、最終的に端子P1〜P9に
電力分配される。このとき、端子P1〜P9に取り出される
波の位相分布は、線路31〜38の電気長によって決定され
る。
In the series feed circuit configured as described above, the wave incident on the terminal P0 is first provided with the required amount of power by the couplers 20 and 21 while being propagated through the lines 37 and 38 of the second series feed circuit 4. The electric power remaining at the terminals P10 and P11 is taken out at the terminal P12. The waves extracted to the terminals P10 to P12 are similarly power-distributed by the first series feeding circuits 1 to 3 and finally distributed to the terminals P1 to P9. At this time, the phase distribution of the waves extracted at the terminals P1 to P9 is determined by the electrical length of the lines 31 to 38.

例えば、線路31〜36の線路長をLo,線路37,38の線路長を
3Loとすると、端子P1〜P9の隣接端子間位相差は従来の
直列給電回路と同じであり、第1式で表される。従っ
て、この実施例による直列給電回路も従来の直列給電回
路と同様に周波数走査アンテナ等の給電回路として使用
することができる。
For example, the track length of tracks 31 to 36 is Lo, and the track length of tracks 37 and 38 is
If it is 3Lo, the phase difference between the adjacent terminals of the terminals P1 to P9 is the same as that of the conventional series feeding circuit, and is represented by the first equation. Therefore, the series feeding circuit according to this embodiment can also be used as a feeding circuit for a frequency scanning antenna or the like, like the conventional series feeding circuit.

次に本実施例の直列給電回路の反射係数であるが、説明
を簡単にするために、結合器11〜21の結合度C1〜C11
反射係数Γ〜Γ11は従来の直列給電回路の場合と同様
に次式の値とする。
Then a reflection coefficient of the series feed circuit of the present embodiment but, for simplicity of explanation, the degree of coupling C 1 -C 11 and the reflection coefficient gamma 1 to? 11 of the coupler 11 to 21 conventional series feed As in the case of the circuit, the value of the following equation is used.

C1=C2=……=C11=−9.5dB …(6) Γ=Γ=……=Γ11=Γo …(7) このとき、第1の直列給電回路1〜3の反射係数Γa1,
Γa2,Γa3は次式の値となる。
C 1 = C 2 = ...... = C 11 = -9.5dB ... (6) Γ 1 = Γ 2 = ...... = Γ 11 = Γo ... (7) At this time, the reflection of the first series feed circuit 1-3 Coefficient Γ a 1 ,
Γa 2 and Γa 3 have the following values.

Γa1=Γa2=Γa3=2.7Γo …(8) 結合器21において、直列給電回路2,3の反射波が同相で
端子P13に結合し、さらに結合器21による反射波も同相
で重畳されるとすると、端子P13での反射係数Γb1は次
式の値となる。
Γa 1 = Γa 2 = Γa 3 = 2.7Γo (8) In the coupler 21, the reflected waves of the series feed circuits 2 and 3 are coupled in phase with the terminal P13, and the reflected wave from the coupler 21 is also superimposed in phase. Then, the reflection coefficient Γb 1 at the terminal P13 becomes the value of the following equation.

同様に入力端P0での反射係数Γは次式の値となる。 Similarly, the reflection coefficient Γ at the input end P0 is the value of the following equation.

この値を第5式の値と比較すると明らかなように、本実
施例の直列給電回路では従来の直列給電回路に比べてVS
WRの劣化が少ない。
As is clear from comparison of this value with the value of the fifth formula, in the series feeding circuit of the present embodiment, VS is larger than that in the conventional series feeding circuit.
Little deterioration of WR.

第2図はこの発明の他の実施例を示すものであり、第1
図と同一符号は同一のものである。上記第1図の実施例
では、結合器11,12,14,15,17,18で結合されずに残った
電力は整合終端器51〜53に捨てていたが、この実施例で
はこの電力を端子P3,P6,P9に取り出して有効利用してい
る。
FIG. 2 shows another embodiment of the present invention.
The same reference numerals as those in the figure are the same. In the embodiment of FIG. 1 described above, the electric power remaining without being combined by the couplers 11, 12, 14, 15, 17, 18 was discarded to the matching terminators 51 to 53. It is taken out to terminals P3, P6, and P9 for effective use.

この場合の作用は上記第1図の直列給電回路と同様であ
り、端子P1〜P9に取り出される波の振幅は、結合器11,1
2,14,15,17,18,20,21の結合度の選び方によって必要な
振幅分布とすることができ、またVSWRについても第1図
の直列給電回路の場合と同様に劣化を抑制できる。
The operation in this case is similar to that of the series power feeding circuit shown in FIG.
The required amplitude distribution can be obtained by selecting the coupling degree of 2,14,15,17,18,20,21, and deterioration of VSWR can be suppressed as in the case of the series feed circuit of FIG.

なお、上記実施例では、第1の直列給電回路1〜3,及び
第2の直列給電回路4の各々を、2個または3個の結合
器と2個の線路を縦続接続し、得られる分配出力の数が
3となるよう構成したが、本発明はこれに限定されるも
のではなく、全体回路の出力側となる複数の第1の直列
給電回路の各々を、得られる分配出力の数が2以上とな
るよう構成し、全体回路の入力側となる第2の直列給電
回路を、得られる分配出力の数が第1の直列給電回路の
個数と同数となるよう構成すれば、従来構成の同数の分
配出力が得られる回路に比して、VSWRの劣化を少なくす
ることができる。
In the above embodiment, each of the first series feeding circuits 1 to 3 and the second series feeding circuit 4 is cascaded with two or three couplers and two lines to obtain a distribution. Although the number of outputs is three, the present invention is not limited to this, and each of the plurality of first series power supply circuits on the output side of the entire circuit has If the number of the second series feeding circuits on the input side of the whole circuit is configured to be equal to or more than the number of the first series feeding circuits, the number of distributed outputs is the same as that of the conventional configuration. VSWR degradation can be reduced compared to a circuit that can obtain the same number of distributed outputs.

また、上記実施例では第2の直列給電回路4の線路37,3
8の線路長をそれぞれ3L0として、それぞれが対応する第
1の直列給電回路1,2内の線路の総線路長(L0+L0=2L
0)よりも長くなるようにしたが、本発明においては、
これら線路37,38の線路長が、それぞれが対応する第1
の直列給電回路1,2内の線路の総線路長(L0+L0=2L0)
と同じ2L0であってもよく、この場合も同様の効果を得
ることができる。
Further, in the above embodiment, the lines 37, 3 of the second series feeding circuit 4 are
The line length of 8 is 3L0, and the total line length of the lines in the corresponding first series feeding circuits 1 and 2 (L0 + L0 = 2L
0), but in the present invention,
The line lengths of these lines 37 and 38 correspond to the first
Total line length of the lines in the series feed circuits 1 and 2 (L0 + L0 = 2L0)
The same 2L0 may be used, and the same effect can be obtained in this case as well.

また、上記実施例では第1の直列給電回路1〜3の線路
31〜36を互いに同じ線路長(L0)とし、第2の直列給電
回路4の線路37,38を互いに同じ線路長(3L0)とした場
合を説明したが、本発明においては、これらは互いに異
なる線路長であってもよく、この場合も同様の効果を得
ることができる。」 また、上記実施例では全ての結合器11〜21の結合量及び
反射係数が互い等しい場合を説明したが、本発明におい
ては、これらは互いに異なっていてもよく、この場合も
同様の効果を得ることができる。
Further, in the above embodiment, the lines of the first series feeding circuits 1 to 3 are used.
The case where 31 to 36 have the same line length (L0) and the lines 37 and 38 of the second series feeding circuit 4 have the same line length (3L0) has been described, but in the present invention, these are different from each other. The line length may be the same, and the same effect can be obtained in this case as well. Further, in the above embodiment, the case where the coupling amount and the reflection coefficient of all the couplers 11 to 21 are equal to each other has been described, but in the present invention, these may be different from each other, and in this case, the same effect is obtained. Obtainable.

〔発明の効果〕〔The invention's effect〕

以上のように、この発明によれば、結合器と,第1の線
路とを交互に縦続接続し、各々の結合器から、または、
各々の結合器及び最終端の線路から分配出力を得るよう
構成された複数の第1の直列給電回路と、結合器と,第
2の線路とを交互に縦続接続し、各々の結合器及び最終
端の線路から分配出力を得るよう構成された第2の直列
給電回路とを備え、上記第2の直列給電回路の複数の分
配出力端子の各々を、上記複数の第1の直列給電回路の
各々の入力端子に接続し、上記第2の直列給電回路の第
2の線路の線路長を、それに対応する上記第1の直列給
電回路内の上記第1線路の総線路長と等しいか,或いは
それよりも長いものとし、上記第2の直列給電回路の入
力端子を全体回路の入力端子とし、上記複数の第1の直
列給電回路の分配出力端子を全体回路の分配出力端子と
したので、従来に比して全体回路における反射係数を減
少させることができ、その結果、VSWRの劣化を抑制でき
る効果がある。
As described above, according to the present invention, the couplers and the first lines are alternately connected in cascade, and from each coupler, or
A plurality of first series feeding circuits configured to obtain a distributed output from each coupler and the line at the final end, a coupler, and a second line are alternately cascaded, and each coupler and the final line are connected. A second series power supply circuit configured to obtain a distributed output from the end line, each of the plurality of distribution output terminals of the second series power supply circuit being connected to each of the plurality of first series power supply circuits. Connected to the input terminal of the second series feed circuit, and the line length of the second line of the second series feed circuit is equal to or equal to the total line length of the corresponding first line in the first series feed circuit. Since the input terminal of the second series feeding circuit is the input terminal of the whole circuit and the distribution output terminals of the plurality of first series feeding circuits are the distribution output terminals of the whole circuit, In comparison, it is possible to reduce the reflection coefficient in the entire circuit. As a result, there is an effect capable of suppressing the deterioration of VSWR.

【図面の簡単な説明】[Brief description of drawings]

第1図はこの発明の一実施例による直列給電回路を示す
ブロック図、第2図はこの発明の他の実施例を示すブロ
ック図、第3図は従来の直列給電回路を示す図である。 1〜3……第1の直列給電回路、4……第2の直列給電
回路、11〜21……結合器、31〜36……第1の線路、37〜
38……第2の線路、50〜53……整合終端器、P1〜P13…
…端子。 なお図中同一符号は同一又は相当部分を示す。
FIG. 1 is a block diagram showing a series feeding circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a diagram showing a conventional series feeding circuit. 1-3 ... 1st series feeding circuit, 4 ... 2nd series feeding circuit, 11-21 ... Coupler, 31-36 ... 1st line, 37-
38 …… Second line, 50 ~ 53 …… Matching terminator, P1 ~ P13…
… Terminal. The same reference numerals in the drawings indicate the same or corresponding parts.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 竹内 紀雄 兵庫県尼崎市塚口本町8丁目1番1号 三 菱電機株式会社通信機製作所内 (56)参考文献 特開 昭57−127302(JP,A) 電子通信学会編「アンテナ工学ハンドブ ック」(昭55)オーム社P.222−224 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Norio Takeuchi 8-1-1 Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture, Sanritsu Electric Co., Ltd. (56) Reference JP-A-57-127302 (JP, A) ) "Antenna Engineering Handbook" edited by The Institute of Electronics and Communication Engineers (Sho 55) Ohmsha P. 222-224

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】結合器と,第1の線路とを交互に縦続接続
し、各々の結合器から、または、各々の結合器及び最終
端の線路から分配出力を得るよう構成された複数の第1
の直列給電回路と、 結合器と,第2の線路とを交互に縦続接続し、各々の結
合器及び最終端の線路から分配出力を得るよう構成され
た第2の直列給電回路とを備え、 上記第2の直列給電回路の複数の分配出力端子の各々
を、上記複数の第1の直列給電回路の各々の入力端子に
接続し、 上記第2の直列給電回路の第2の線路の線路長を、それ
に対応する上記第1の直列給電回路内の上記第1線路の
総線路長と等しいか,或いはそれよりも長いものとし、 上記第2の直列給電回路の入力端子を全体回路の入力端
子とし、上記複数の第1の直列給電回路の分配出力端子
を全体回路の分配出力端子としたことを特徴とする直列
給電回路。
1. A plurality of first and second lines configured to alternately connect the couplers and the first lines to obtain a distributed output from each of the couplers or from each of the couplers and the line at the final end. 1
A series feed circuit, a coupler, and a second line are alternately connected in cascade, and a second series feed circuit configured to obtain a distributed output from each coupler and the line at the final end is provided. Each of the plurality of distribution output terminals of the second series feeding circuit is connected to each input terminal of the plurality of first series feeding circuits, and the line length of the second line of the second series feeding circuit is Is equal to or longer than the total line length of the first line in the corresponding first series feeding circuit, and the input terminal of the second series feeding circuit is the input terminal of the whole circuit. And a distribution output terminal of the plurality of first series supply circuits as a distribution output terminal of the entire circuit.
JP61238851A 1986-10-07 1986-10-07 Series power supply circuit Expired - Lifetime JPH0680974B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61238851A JPH0680974B2 (en) 1986-10-07 1986-10-07 Series power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61238851A JPH0680974B2 (en) 1986-10-07 1986-10-07 Series power supply circuit

Publications (2)

Publication Number Publication Date
JPS6393204A JPS6393204A (en) 1988-04-23
JPH0680974B2 true JPH0680974B2 (en) 1994-10-12

Family

ID=17036204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61238851A Expired - Lifetime JPH0680974B2 (en) 1986-10-07 1986-10-07 Series power supply circuit

Country Status (1)

Country Link
JP (1) JPH0680974B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57127302A (en) * 1981-01-30 1982-08-07 Yagi Antenna Co Ltd Synthesizer of high frequency signal

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
電子通信学会編「アンテナ工学ハンドブック」(昭55)オーム社P.222−224

Also Published As

Publication number Publication date
JPS6393204A (en) 1988-04-23

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