JPH0682843B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device having a beam structure.

[Prior art]

As a conventional semiconductor device having a beam structure, a devised device such as Petersen is known (KEPete
rsen, IEEE Transaction on Electron Devices, Vol.ED−
25, No.10 Oct 1978).

FIG. 4 is a cross-sectional view of the above device.

In the device shown in FIG. 4, after the p ⁺ buried layer 6 is formed on the silicon substrate 7, the n-type epitaxial layer 5 is epitaxially grown, the etching resistant material 4 is provided thereon, and the window provided in the etching resistant material 4 is provided. The beam 1 is formed by removing the portion of the etch hole 2 by performing anisotropic etching from.

In this case, the p ⁺ buried layer 6 acts as an etching stopper in anisotropic etching, and forms a capacitor together with the metal electrode 3 after the completion of the device.

When pressure or acceleration is applied to the semiconductor device having the beam structure as described above, the beam 1 bends, whereby the metal electrode 3
Since the electrostatic capacitance of the capacitor formed by and the p ⁺ buried layer 6 changes, it is necessary to detect the applied pressure or acceleration by detecting the change in the voltage applied between both electrodes. Can be done.

[Problems to be solved by the invention]

However, in the conventional semiconductor device having the beam structure as described above, the amount of etching of the silicon substrate is controlled by the thickness of the p ⁺ buried layer and the n-type epitaxial layer which act as an etching stopper during the manufacturing thereof. Since the length of the beam depends on the etching conditions (etching liquid component, temperature, time, etc.), there is a problem that the dimensional accuracy is poor, and the cost increases because it is necessary to use an epitaxial substrate. There was a problem.

An object of the present invention is to solve the problems of the prior art as described above and to provide a method of manufacturing a semiconductor device having a beam structure which is inexpensive and has high dimensional accuracy.

[Means for solving problems]

To achieve the above object, in the present invention, a portion around the beam structure to be removed by etching is formed by a p-type diffusion layer, and only the p-type diffusion layer is removed by electrochemical etching. .

Example of Invention

FIG. 1 is a plan view of an embodiment of a semiconductor device manufactured by the manufacturing method of the present invention, FIG. 2 is a sectional view taken along the line AA ′ of FIG. 1, and FIG. It is a process drawing.

Hereinafter, the manufacturing method of the present invention will be described in order of steps based on FIG.

First, in (A), a p-type diffusion layer 107 is selectively formed on a predetermined portion of the n-type silicon substrate 100 by ion implantation of boron and thermal diffusion.

At this time, the oxide film 106 is also formed by thermal oxidation or the like.

Next, in (B), an n-type diffusion layer 102 to be a beam portion is formed by phosphorus ion implantation and thermal diffusion.

Next, in (C), an n ⁺ diffusion layer 105 for making contact with the n-type diffusion layer 102 is selectively formed by phosphorus ion implantation and thermal diffusion, and further, deflection of the beam portion is detected. The piezoresistor 112 is formed by boron ion implantation and thermal diffusion.

Next, in (D), P is formed on the back surface of the n-type silicon substrate 100.
After the back surface protective film 109 such as SG is formed by the CVD method or the like, the contact hole 104 and the etching window 111 are formed in the front surface oxide film 106.
Are opened by photoetching.

Next, in (E), a metal electrode 110 such as Al is formed by vapor deposition or photoetching.

The silicon substrate that has been subjected to the above treatment is immersed in an alkaline etching solution filled in an etching tank not shown, and between the metal electrode 110 and a counter electrode such as platinum provided in the etching tank not shown, Electrochemical etching is performed, for example, by applying a voltage of about 0.7V.

In this case, the metal electrode 110 side is connected to +, and the counter electrode side is connected to −.

In the above electrochemical etching, oxide film
Since the 106 and the back surface protective film 109 have etching resistance, only the exposed portion of silicon is etched, but a + voltage is applied to the n-type silicon substrate 100 and the n-type diffusion layer 102. Therefore, the etching is performed on the p-type diffusion layer 10
7 only, n-type silicon substrate 100 and n-type diffusion layer
102 is not etched.

Therefore, as shown in (F), only the portion of the p-type diffusion layer 107 is removed to form the beam structure 103 including the n-type diffusion layer 102.

After that, the back surface protective film 109 is removed by, for example, CH ₃ COOH + NH ₄ F + H ₂ O liquid, and the semiconductor device having the beam structure shown in FIGS. 1 and 2 is completed.

The semiconductor device shown in FIG. 1 and FIG. 2 has a cantilever structure, and this cantilever has an inherent resonance frequency determined by the length, length and material of the beam.

Therefore, when vibration having the same frequency as the resonance frequency is applied to this semiconductor device, the beam resonates and bends up and down. Therefore, the vibration of the beam is extracted as an electric signal by the piezoresistor 112 formed at the base of the beam. Therefore, it can be used as a vibration detection device.

According to the manufacturing method of the present invention as described above, since the portion of the p-type diffusion layer 107 is removed by the electrochemical etching, the dimensional accuracy of the beam is p-type diffusion layer.
It will be determined by the diffusion accuracy of 107.

This diffusion accuracy is much higher than the dimensional accuracy determined by the etching conditions by anisotropic etching as described above,
Since the precision can be increased, the dimensional precision of the beam can be significantly improved as compared with the conventional one.

〔The invention's effect〕

As described above, in the present invention, since the beam structure is formed by removing only the p-type diffusion layer portion by using electrochemical etching, it has been used in the conventional manufacturing method. Since it is not necessary to use the etching stop method using the p ⁺ buried layer, and therefore it is not necessary to use an expensive epitaxial substrate,
Manufacturing cost can be reduced.

Further, since the dimensional accuracy of the beam structure is determined by the diffusion accuracy of the p-type diffusion layer and the n-type diffusion layer, the dimensional accuracy of the beam structure can be significantly improved as compared with the conventional case.

[Brief description of drawings]

1 is a plan view of an embodiment of a semiconductor device manufactured by the manufacturing method of the present invention, FIG. 2 is a sectional view taken along the line AA ′ of FIG. 1, and FIG.
FIG. 4 is a manufacturing process diagram of the present invention, and FIG. 4 is a sectional view of an example of a conventional device. <Explanation of symbols> 100 ... n-type silicon substrate 101 ... etching hole, 102 ... n-type diffusion layer 103 ... beam, 104 ... contact hole 105 ... n ⁺ diffusion layer, 106 ... oxide film 107 ... … P-type diffusion layer, 109 …… Backside protective film 110 …… Metal electrode, 111 …… Etching window 112 …… Piezoresistance

Claims (1)

[Claims] 1. A p-type diffusion layer is formed on a predetermined portion of an n-type semiconductor substrate, a protective film is formed on the surfaces of the p-type diffusion layer and the n-type semiconductor substrate, and a predetermined portion of the p-type diffusion layer and An n-type diffusion layer is formed in a predetermined shape over a predetermined portion of the n-type semiconductor substrate in contact with the predetermined portion, and a contact hole and an etching window are opened in a predetermined portion of the protective film on the surface, and the contact hole is inserted through the contact hole. After connecting the electrode to the n-type diffusion layer, a DC voltage is applied between the electrode and a counter electrode provided separately by immersing in an etching solution to perform electrochemical etching from the etching window portion.
A method of manufacturing a semiconductor device, comprising forming a beam structure having the shape of an n-type diffusion layer formed in the p-type diffusion layer by removing a portion of the p-type diffusion layer by etching.