JPH0683013B2 - Integrator circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to an integrating circuit configured by using a capacitor inside an IC circuit.

[Outline of Invention]

According to the present invention, a capacitor is connected between two output terminals of a differential amplifier, and two output terminals of the differential amplifier are connected to an input terminal of an adder via a first buffer circuit and a second buffer circuit, respectively. The output terminal of the capacitor, connect a resistance adder circuit between the output terminals of the first buffer circuit and the second buffer circuit, and compare the output voltage of the resistance adder circuit and the reference voltage The integrator circuit is for controlling the point potential to be a predetermined voltage, has a wide dynamic range, and can effectively use the expanded dynamic range.

[Conventional technology]

In order to realize an integrating circuit having a long time constant, it is necessary to increase the capacity of the integrating capacitor or reduce the charging / discharging current. In a conventional IC integrated circuit, the time constant is lengthened by connecting a time constant circuit consisting of a resistor and a large-capacity capacitor to the outside of the IC. However, providing external terminals (pins) has a problem of increasing the manufacturing cost of the IC. As an example of an integrator circuit that can increase the time constant by using a capacitor made inside the IC, the one shown in FIG. 6 is used.

In FIG. 6, reference numeral 21 denotes a differential amplifier, and the differential amplifier 21
An input signal is supplied to the one input terminal from the input terminal 22, and the reference voltage source 23 is connected to the other input terminal. The constant current source 24 of the differential amplifier 21 is switched by the switching circuit 25. IC to the output terminal of the differential amplifier 21
The internal capacitor 26 is connected and the differential amplifier 21
Is output as an output terminal 28 via the buffer circuit 27.

A concrete connection of the above-mentioned integrating circuit is shown in FIG. The input terminal 22 is connected to the base of the transistor 32,
The reference voltage source 23 is connected to the base of 32. Transistor
Between the collectors of 31 and 32 and the power supply terminal 33, diode-connected transistors 34 and 35 for the current mirror circuit.
And the transistors 36 and 37 are connected. A constant current source composed of a constant current source 38, a diode-connected transistor 39 and a transistor 40 is connected to a common emitter connection point of the transistors 31 and 32. A switching transistor 41 is inserted between the base of the transistor 40 and the ground. A switching pulse is supplied from the terminal 42 to the base of the switching transistor 41. When the switching pulse is at a high level, the switching transistor 41 is turned on and the constant current supply to the differential amplifier is cut off. Furthermore, a capacitor is connected between the collector of the transistor 31 and ground.
26 is inserted, and the output terminal 28 is led out via the buffer circuit 27.

A charging / discharging current corresponding to the difference between the input voltage and the reference voltage is supplied to the capacitor 26. In order to increase the time constant of such an integrating circuit, it was necessary to increase the capacity of the capacitor 26 and reduce the charging / discharging current of the capacitor 26.

[Problems to be solved by the invention]

The capacity of the capacitor 26 formed inside the IC is limited to about 80 [pF] in terms of cost and process. In the configuration shown in FIG. 7, the constant current to be switched is the value of the constant current to be switched because the collector current of the transistor 40 to be switched is transmitted to the capacitor 26 via the collector and the emitter of the transistor 31. Could not be made small, and for example, about 80 [nA] was the limit that could be made minute. Therefore, the time constant was restricted by these values and could not be made sufficiently long. Furthermore, the output dynamic range was equal to the output dynamic range of the differential amplifier. Therefore, the VCO
When a (voltage-controlled oscillator) is connected, there is a drawback that it is not possible to sufficiently absorb the variation in the characteristics of the VCO (control voltage-oscillation frequency).

In order to solve such a problem, a balanced type integrating circuit has been proposed. According to this balanced type integration circuit, the dynamic range of the output is expanded, and it is possible to cope with the variation in the VCO characteristics. However,
The dynamic range cannot be effectively used unless the midpoint potential of the capacitor is equal to the central potential of the dynamic range.

Therefore, an object of the present invention is to control the midpoint potential of a capacitor so that it is always located at the center potential of the dynamic range in a balanced type integrating circuit, and to make effective use of the dynamic range. To provide an integrator circuit.

[Means for solving problems]

According to the present invention, a differential amplifier in which a capacitor is connected between one output terminal and the other output terminal, and one output terminal and one input terminal of the differential amplifier are connected via a first buffer circuit. While being connected, the other output terminal and the other input terminal of the differential amplifier are connected via the second buffer circuit, and an adder from which an output signal is taken out, the first buffer circuit and the second buffer Midpoint control that compares the output voltage of the resistance addition circuit connected between each output terminal of the circuit and the reference voltage, and controls the midpoint potential of the capacitor to be the center potential of the output dynamic range. And an integrating circuit including a circuit.

[Action]

Since the capacitor is connected between the opposite-phase output terminals of the differential amplifier, the dynamic range of the output is double that of the conventional integrating circuit. Also, by the midpoint control circuit,
Since the midpoint potential of the capacitor is made equal to the central potential of the dynamic range, the dynamic range is effectively used. Therefore, when the VCO is connected in the subsequent stage, it becomes possible to deal with variations in the characteristics of the VCO.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In this example, all elements including capacitors are
It is built into the IC. The description of this embodiment will be made in the following items in order.

Balanced integrator circuit b. Application example of AFC circuit to filter c. Connection of the embodiment a. Balanced integrator circuit FIG. 1 shows the configuration of the balanced integrator circuit, which is indicated by 1 in FIG. One input terminal of the differential amplifier is derived as the input terminal 2, and the reference voltage source 3 is connected to the other input terminal of the differential amplifier 1. The constant current supplied to the differential amplifier 1 is the constant current generated by the constant current source 4 switched by the switching circuit 5.

A capacitor 6 is inserted between one output terminal of the differential amplifier 1 and the other output terminal. One output terminal of the differential amplifier 1 is connected to one input terminal of the adder 9 via the buffer circuit 7, and the other output terminal of the differential amplifier 1 is connected to the other input terminal of the adder 9 via the buffer circuit 8. Connected to the input terminal. The output terminal of the adder 9 is derived as the output terminal 10. The adder 9 produces a current output.

In the above-mentioned integrating circuit, since the output signals of the opposite phase of the differential amplifier 1 are supplied to both ends of the capacitor 6, the middle point of the capacitor 6 becomes an AC ground point. Therefore, the first
The circuit connections shown in the figure can be represented by the equivalent circuit shown in FIG. When the value of the capacitor 6 is C, the divided values of the capacitors 6A and 6B in FIG. 2 are 2C.
When an output voltage of one output terminal + 1V of the differential amplifier 1 is generated, an output voltage of -1V is generated at the other output terminal. Conversely, when an output voltage of + 1V is generated at one output terminal, an output voltage of -1V is generated at the other output terminal. Therefore, the output dynamic range is ± 2V,
It can be expanded to twice the size of a conventional integrating circuit.

b. Example of application to filter of AFC circuit FIG. 3 shows an example of configuration in which the above-described integrating circuit is applied to a filter of AFC circuit. The AFC circuit is provided in the recording circuit of the rotary head type VTR and is used to generate a conversion carrier signal for converting a carrier color signal into a low frequency conversion color signal. AFC circuit has a center frequency of 378f
A VCO of _H (f _H : horizontal scanning frequency) is provided, and a conversion carrier signal of 743 [kHz] is formed by dividing the output signal of this VCO into (1/8). Further, the signal obtained by dividing the output signal of the VCO and the horizontal synchronizing signal are phase-compared by the AFC detection circuit, and the phase comparison output is supplied to the VCO as a control voltage via the low pass filter. In this case, when the phases of the output signal of the VCO and the horizontal synchronizing signal are largely deviated from each other, the control voltage of the VCO is forcibly increased or decreased by the AFCID circuit indicated by 20 in FIG.

In FIG. 3, an AFC error signal from the AFC detection circuit is supplied to the input terminal 18 and this AFC error signal is supplied to the addition circuit 9 via the low pass filter 19. The output signal of the low-pass filter 19 is supplied to the adding circuit 12.
The output signal of the adder circuit 12 is supplied to one input terminal of the differential amplifier 11. The differential amplifier 11, the constant current source 14, the switching circuit 15, the capacitor 16, and the buffer circuit 17 constitute an integrating circuit similar to the conventional one. A negative feedback path including an attenuator 13 is provided between the output terminal of the buffer circuit 17 and the adder circuit 12.

The output signal of the buffer circuit 17 is supplied to the adding circuit 9 and also to one input terminal of the differential amplifier 1. The differential amplifier 1 constitutes an integrating circuit similar to that shown in FIG. The output signal of this integrating circuit is supplied to the adding circuit 9. The ID error signal formed in the AFCID circuit 20 is added to the AFC error signal. This ID error signal is added to both ends of the capacitor 6 by current addition, and is also added to the other input terminal of the differential amplifier 11 of the preceding integrating circuit by voltage addition in order to accelerate the pull-in.

The above-mentioned filter shown in FIG. 3 is a low-pass characteristic of the first stage low-pass filter 19 shown in FIG. It has a frequency characteristic obtained by combining the low-pass characteristic indicated by c. The attenuation gradient of the low-pass characteristic b is -6 [dB / oct], and the attenuation gradient of the low-pass characteristic c is -12 [dB / oct]. Due to the low-pass characteristics a and b,
The characteristics similar to those of the lag lead filter are realized. Also,
The integrating circuit composed of the differential amplifier 1 has characteristics of long time constant and large attenuation gradient, and a DC feedback loop is formed by this integrating circuit. The APC circuit provided in the reproduction circuit of the VTR has the same configuration as the above AFC circuit.

c. Connection of Embodiment FIG. 5 shows the connection of an embodiment of the present invention using the integrating circuit shown in FIG. The input terminal 2 to which an input signal such as an AFC error signal is supplied is supplied to a differential amplifier 55 using a pair of Darlington connections and converted into a differential signal current.

A series connection of a constant current source 58 and diode-connected transistors 56 and 57 is inserted between the power supply line 51 and the ground line 53, and one of the differential signal currents is supplied to the connection point of the transistors 56 and 57. . The connection point of the constant current source 58 and the transistor 56 is connected to the base of the transistor 59. The collector of the transistor 59 is connected to the power supply line 51, the emitter of the transistor 59 is grounded via the constant current source 60, and is connected to the base of the transistor 64 via the resistor 61. The base of the transistor 64 is grounded via the collector and emitter of the transistor 62.
A switching pulse is supplied from the terminal 63 to the base of the transistor 62. When the switching pulse is at high level, the transistor 62 turns on and the transistor 64 turns off.

The other signal current taken out to the other output terminal of the differential amplifier 55 is supplied to the base of the transistor 74 through the circuit configuration similar to the above-mentioned one signal current configuration. That is, transistors 56, 57, 59, 62 and corresponding transistors 66, 67, 69, 72 are provided, constant current sources 58 and 60 and corresponding constant current sources 68 and 70 are provided, and a resistor 61 and a corresponding resistor are provided. 71 are provided.

The emitters of the transistors 64 and 74 are grounded, and the capacitor 6 is inserted between the collectors of the transistors. In addition, the collectors of the transistors 64 and 74 are connected to the transistor 75, respectively.
And 76 to the respective collectors. Transistor 75
A predetermined current-voltage source 77 is connected to the respective bases of and. The emitters of the transistors 75 and 76 are connected to the power supply line via the collector and emitter of the transistors 78 and 79.
Connected to 52.

One output voltage of the differential output voltage extracted across the capacitor 6 is supplied to the emitter follower connection composed of the Darlington connection 81 and the constant current source 82, and the output signal of this emitter follower connection serves as the transistor 83 and the level shift diode. It is supplied to the base of a transistor 86 via an emitter follower connection consisting of a transistor 84 and a constant current source 85. The emitter of the transistor 86 is grounded via the resistor 87, and its collector is connected to the power supply line 51.

Regarding the other output voltage of the differential output voltage taken across the capacitor 6, the same connection as the above-mentioned one output voltage is provided. That is, the Darlington connection 91 and the constant current source 92 configure an emitter follower connection, and the transistor 93, the diode-connected transistor 94 and the constant current source 95 configure another Emier-follower connection, and the output voltage via the other emitter follower connection is Connected to the base of transistor 96. The emitter of the transistor 96 is grounded via the resistor 97, and this collector is connected to the power supply line 51.

The transistors 86 and 96 are emitter follower transistors, and differential output voltages are taken out from the respective emitters of these transistors 86 and 96. Further, for the midpoint control, the emitters of the transistors 86 and 96 are connected to each other via resistors 88 and 98 having the same value,
The midpoint potential is taken out from the connection point of the resistors 88 and 98.
The resistors 88 and 98 form a resistance adding circuit.

This midpoint potential is one of the transistors 101 of the differential amplifier 100.
Supplied to the base of. To the base of the other transistor 102 of the differential amplifier 100, the reference voltage source 103 corresponding to the potential to be controlled of the midpoint potential is connected. 104 is
It is a constant current source of the differential amplifier 100. The collector of the transistor 101 is connected to the power supply line 52, and the collector of the transistor 102 is connected to the collector of the transistor 105.
The emitter of the transistor 105 is connected to the power supply line 52. The base of the transistor 105 is commonly connected to the bases of the transistors 78 and 79 described above to form a current mirror circuit. The transistor 106 is connected for hfe (grounded emitter current amplification factor) cancellation.

Further, the output voltages taken out from the respective emitters of the transistors 86 and 96 are supplied to the bases of the transistors 111 and 112 forming the Gilbert-type adder circuit. Transistors 111 and 112 form a differential amplifier, and their collectors are connected to the emitters of transistors 113 and 114, respectively.
A common DC voltage source 115 is connected to the bases of the transistors 113 and 114, and the collectors of the transistors 113 and 114 are connected to the power supply line 52.

The collectors of transistors 111 and 112 are transistor 116.
And 117, and a constant current source is connected to the common emitter connection point of the transistors 116 and 117. The collector of the transistor 116 is connected to the power supply line 52, and the collector of the transistor 117 is connected to the power supply line 52 via the diode-connected transistor 118. The added output current taken out to the collector of the transistor 117 is taken out to the output terminal 10 via the transistor 118 and the transistor 119.

In the above-described embodiment of the present invention, the differential signal current extracted by the differential amplifier 55 corresponds to the difference between the input voltage applied to the input terminal 2 and the reference voltage. This differential signal current is converted into a minute current of (1 / x) times and becomes a collector current of the transistors 64 and 74.

The base-emitter voltage of the transistor 56 is V _BE1 ,
The base-emitter voltage of the transistor 57 is V _BE2 ,
The constant current of the constant current source 58 is I ₁ , and the constant current of the constant current source 60 is xI
_1, and the base-emitter voltage of transistor 59 is V
_BE3 , the base-emitter voltage of the transistor 64 is V
_BE4 and the constant current flowing when the transistor 64 is turned on is I ₀
Then, the base potential Va of the transistor 59 and the emitter potential Vb of the transistor 59 have the following relationship.

(K: Boltzmann's constant, T: absolute temperature, q: electron charge, I _S : saturation current) From the above equation, (I ₀ = I ₁ / x). Therefore, by setting (x> 1), the current I ₀ reduced to (1 / x) of I ₁ can be passed through the transistor 64. When turning off the current I ₀ , the transistor 62 is turned on.

The other signal currents of the differential signal currents are similarly reduced to (1 / x) and flow through the transistor 74. In addition, since the capacitor 6 is directly connected to the collectors of the transistors 64 and 74, the switching speed is increased, and the collector currents of the transistors 64 and 74 can be made minute currents, for example, 40 [nA]. . Therefore, the time constant can be made longer than in the conventional case.

Further, control is performed so that the midpoint potential of the capacitor 6 is always located at the central potential of the dynamic range, and the dynamic range of the output can be effectively used. As shown in FIG. 5, the current potentials at both ends of the capacitor 6 are V _A and V _B , the emitter potentials (DC potentials) of the transistors 86 and 96 are V _C and V _D , and the reference voltage source 103 The midpoint control will be described below with the reference voltage by Vr as Vr.

The potentials V _A and V _B are DC-equal, and the potentials V _A and V _B
Is transmitted to the emitters of the transistors 86 and 96 through the base-emitters of the emitter-follower-connected transistors, but the cancellation of the base-emitter voltage results in (V _A = V _B = V _C = V _D ). Resistance 88
And the value of the resistor 98 are made equal, and the potential of the connection point of both is set to V _E
And Let Vt be the potential to be controlled of the midpoint potential of the capacitor 6, and (Vt = Vr).

In normal operation, the signal current, the voltage change V.alpha occurs, the _{(V A = Vt + Vα,} V B = Vt-Vα). Therefore, since V _E = 1/2 (V _A + V _B ) = 1/2 (V _C + V _D ) = Vt (Vt = Vr), the differential amplifier 100 transistor 1
01 and 102 are in balance. Set the constant current of the constant current source 104 to 2I ₂
Then, by the transistors 105, 78, 79, a constant current I ₀ flows through the transistors 75 and 76, respectively, and is controlled so as to be balanced with the currents of the transistors 64 and 74, respectively.

When both V _A and V _B increase in potential by V β, that is, when V _A = Vt + Vα + Vβ V _B = Vt−Vα + Vβ, V _E = Vt + Vβ. Since the base potential of the transistor 101 increases by Vβ, the currents flowing through the transistors 75 and 76 are both I ₂
It decreases more. Therefore, the potentials V _A and V _B are lowered, and negative feedback is applied to suppress the potential rise Vβ.

Further, even when the potentials of both V _A and V _B are reduced by Vβ, the negative feedback in which the reduction in potential Vβ is suppressed by the fact that the currents flowing through the transistors 75 and 76 both increase above I ₂ contrary to the above. Takes.

As described above, the midpoint potential Vt of the capacitor 6 is always controlled to (Vt = Vr) and is maintained at the center of the dynamic range.

Although not shown in FIG. 5, the ID error signal from the AFCID circuit 20 (see FIG. 3) is added to both ends of the capacitor 6 by current addition.

〔The invention's effect〕

According to the present invention, by adopting the balanced structure, the dynamic range of the output can be doubled as compared with the unbalanced structure. However, the dynamic range can be effectively expanded by always controlling the midpoint potential of the capacitor to the central potential of the dynamic range. Therefore, like AFC circuit or APC circuit, VCO
When the control signal is generated, the variation width of the VCO oscillation frequency doubles, and it is possible to cope with the variation in the VCO characteristics.

[Brief description of drawings]

FIG. 1 is a connection diagram of a balanced type integrating circuit used in an embodiment of the present invention, FIG. 2 is a connection diagram showing an equivalent circuit of this integrating circuit, and FIGS. 3 and 4 show the present invention as an AFC circuit. FIG. 5 is a connection diagram showing a configuration when applied to the filter of FIG. 5 and a schematic diagram of frequency characteristics, FIG. 5 is a connection diagram of an embodiment of the present invention, FIG. 6 is a connection diagram of a conventional integrating circuit, and FIG. It is a connection diagram which shows the concrete connection of the conventional integrating circuit. Description of main symbols in the drawing 1: Differential amplifier, 2: Input terminal, 4: Constant current source, 6: Capacitor, 7,8: Buffer circuit, 9: Adder circuit, 10: Output terminal, 88,
98: resistor for addition, 100: differential amplifier for midpoint control, 103:
Reference voltage source for midpoint control.

Claims (1)

[Claims] 1. A differential amplifier in which a capacitor is connected between one output terminal and the other output terminal, and one output terminal and one input terminal of the differential amplifier form a first buffer circuit. And the other output terminal and the other input terminal of the differential amplifier are connected via a second buffer circuit, and an adder for outputting an output signal, the first buffer circuit, and The output voltage of the resistance addition circuit connected between the respective output terminals of the second buffer circuit and the output voltage of the resistance addition circuit are compared with a reference voltage, and the midpoint potential of the capacitor becomes the central potential of the output dynamic range. Circuit that includes a midpoint control circuit that controls as described above.