JPH069210B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device used for a bipolar device.

[Conventional technology]

The reduction of parasitic capacitance is effective for speeding up bipolar devices. A new self-aligned structure has been proposed in order to reduce the parasitic capacitance, and a typical example thereof is shown in FIG. That is, the silicon dioxide film 18, the P ⁺ polycrystalline silicon film 1
The single crystal silicon is present in the groove surrounded by the side wall of the laminated structure of the silicon dioxide film 20 and the bottom surface of the n ⁺ region 21 of the single crystal silicon. An npn junction including the region 22, the P region 23, and the n region 24 is formed. In FIG. 3, P ⁺
The polycrystalline silicon film 19 corresponds to the base electrode.
As for the n region 22, by extending the n ⁺ region 21 on the P-type silicon substrate 17, another groove is provided on the extending n ⁺ region, and the other groove is filled with a conductive material.
The connection can be made from the surface.

As a method of forming such a structure, for example, a third method
In the figure, silicon dioxide film 18 and P ⁺ polycrystalline silicon film 1
9. A method is conceivable in which the trench surrounded by the side wall of the laminated structure of the silicon dioxide film 20 and the bottom surface of the n ⁺ region 21 is filled with single crystal silicon by selective epitaxial growth.

FIGS. 4 (a) to 4 (c) are substrate cross-sectional views showing steps of such a method. That is, after the single crystal silicon n ⁺ region 29 is formed on the P-type silicon substrate 25, the silicon dioxide film 2 is formed.
6, P ⁺ polycrystalline silicon film 27, silicon dioxide film 28
Is sequentially laminated (FIG. 4 (a)), and then the groove 30 is formed (FIG. 4 (b)). Then, selective epitaxial growth is performed to form a selective epitaxial growth region 31 and a polycrystalline silicon region 32 by growth of crystal grains from the P ⁺ polycrystalline silicon film 27 (FIG. 4 (c)).

[Problems to be solved by the invention]

In the above-mentioned technique, silicon is selectively epitaxially grown from the single crystal silicon substrate surface on the bottom surface of the groove 30.
At this time, crystal grains grow from the low resistance polycrystalline silicon 27 portion on the side wall to form the polycrystalline silicon region 32, and only the central portion of the groove 30 becomes the single crystal selective epitaxial growth region 31. In order to grow high-quality single crystal silicon even near the sidewall of the groove 30, a manufacturing method that can avoid the formation of the polycrystalline silicon region 32 in the groove 30 is required.

[Means for solving problems]

A method of manufacturing a semiconductor device according to the present invention has a structure in which a first insulating film, a polycrystalline silicon film, and a second insulating film are sequentially laminated on one main surface of a semiconductor single crystal substrate, and the bottom surface thereof. A step of forming a groove which is a semiconductor single crystal, and a step of selectively removing the polycrystalline silicon film in the groove so that the polycrystalline silicon film in the groove has a shape receding from the side surface of the groove. , Seeding the semiconductor crystal on the bottom of the groove,
And a step of selectively forming a semiconductor single crystal layer.

[Action]

As described above, in the present invention, etching is performed by a method capable of selectively removing only polycrystalline silicon so that the polycrystalline silicon portion has a recessed structure rather than the side wall surface, and then selective epitaxial growth is performed. By forming a structure in which the polycrystalline silicon film is dented from the side wall surface in this way, grain growth from the polycrystalline silicon is prevented from protruding from the side wall surface, and good-quality single crystal silicon is grown near the side wall. You can

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a vertical sectional view of a substrate showing a first embodiment of the present invention.

After forming the n ⁺ region 5 on a part of the surface of the P-type silicon (100) substrate 1 having a specific resistance of 10 Ω · cm, it is thermally oxidized to about 4000.
A silicon dioxide film 2 having a thickness of Å was formed. Next, P +
The polycrystalline silicon film 3 is formed with a thickness of about 3500Å, and the silicon dioxide film 4 is formed with a thickness of about 3000Å.
A structure as shown in (a) was formed.

Next, the groove 6 was formed as shown in FIG. 1 (b). A rectangular groove having a width of 1.5 μm and a length of 10 μm in which the sidewall surface of the groove is parallel to the {100} plane was used.

Next, the polycrystalline silicon film 3 was dented from the side wall surface by a selective etching method to form a stack as shown in FIG. 1 (c). As the etching liquid, a mixture of hydrofluoric acid, nitric acid and peracetic acid (containing iodine) in a ratio of 1: 7: 72 was used. If such an etching solution is used, the etching rate ratio of polycrystalline silicon to single crystal silicon or silicon dioxide can be made very large,
Selective etching of polycrystalline silicon becomes possible. The etching rate of the polycrystalline silicon 3 by such an etching solution is about 1200Å / min, and by controlling the time, a structure dented from about 2000Å side wall surface was obtained.

The substrate having the structure as shown in FIG. 1 (c) thus obtained was subjected to selective epitaxial growth to fill the trench 6 with an n-type epitaxial silicon film 7.
In the selective epitaxial growth, a growth temperature was 950 ° C., a pressure was 50 Torr, and a supply gas was a mixed gas of dichlorosilane, hydrogen chloride, hydrogen, and arsine. Thus the first
As shown in FIG. 3D, the entire groove has a structure made of single crystal silicon.

The crystallinity of the epitaxial silicon film thus manufactured was evaluated by using an electron microscope.
No defects are found in the vicinity of the sidewalls of the silicon dioxide films 2 and 4 in (d), and the polycrystalline silicon region 8 formed by grain growth from the polycrystalline silicon film 9 is larger in the epitaxial silicon region 7 than in the sidewall surface. It does not stick out. As described above, it was confirmed that the selective epitaxial growth region 7 is an extremely high quality epitaxial silicon film.

The P-type impurity and the n-type impurity are sequentially introduced into the thus-formed selective epitaxial growth region by a normal impurity introduction method such as thermal diffusion or ion implantation.
The nPn transistor shown in the figure can be formed.

In the first embodiment, in order to realize the npn junction, the silicon substrate is P type, the polycrystalline silicon film is P ⁺ type, and the epitaxial silicon film is n type. In the second embodiment, pnp
The steps for realizing the structure for die bonding will be described.

FIG. 2 is a vertical sectional view showing a process of the second embodiment of the present invention. Except for the difference between the P type and the n type, the process is basically the same as that of the first embodiment shown in FIG.

Using an n-type silicon substrate 9 as shown in FIG. 2 (a),
The P ⁺ region 13 is formed, and the silicon dioxide film 10 is applied to about 4000
After the formation, the polycrystalline silicon film 11 was formed and turned into n ⁺ . Further, a silicon dioxide film 12 was formed thereon, and then a groove 14 was processed as shown in FIG. 2 (b).

Then, by etching as in the first embodiment,
The polycrystalline silicon part is dented from the side wall surface, as shown in FIG. 2 (c).
Selective epitaxial growth is performed, and as shown in Fig. 2 (d), P
A structure was obtained in which the type-selective epitaxial growth region 15 occupies almost the entire groove, and the polycrystalline silicon region 16 due to grain growth does not largely project to the sidewall surface of the groove.

The epitaxial silicon film produced by this method was confirmed by an electric microscope to have no defects, and it was confirmed that the epitaxial silicon film had an extremely high quality as in the first embodiment.

〔The invention's effect〕

As described above, according to the present invention, the single crystal is formed in the groove surrounded by the side wall having the structure in which the silicon dioxide film, the low resistance polycrystalline silicon film, and the silicon dioxide film are sequentially stacked and the bottom surface made of the single crystal silicon. When manufacturing a structure in which silicon is embedded, the single crystal silicon portion of the side wall is set back from the side wall surface. By doing so, even if the selective epitaxial growth is performed, the grain growth from the polycrystalline silicon film does not protrude more than the side wall surface, and therefore the single crystal silicon region in the groove can be made high quality. , LS
It is very effective in achieving high speed and high density of I.

[Brief description of drawings]

FIGS. 1 (a) to (d) are longitudinal sectional views of a substrate showing a manufacturing process in a first embodiment of the present invention, and FIGS. 2 (a) to (d) are a second embodiment of the present invention. 3 is a vertical cross-sectional view of the substrate showing the manufacturing process in FIG. 3, FIG. 3 is a vertical cross-sectional view of the substrate showing an example of the element structure aimed at by the present invention, and FIGS. 3 is a vertical cross-sectional view of a substrate showing an example of the manufacturing process of FIG. 1, 17, 25 ... P-type silicon substrate, 9 ... N-type silicon substrate, 2, 4, 10, 12, 18, 20, 26, 2
8 ... Silicon dioxide film, 3, 19, 27 ... P ⁺ polycrystalline silicon film, 11 ... n ⁺ polycrystalline silicon film, 5, 2
1, 29 ...... n ⁺ area, 13 ...... P ⁺ area, 23 ...... P
Region, 6, 14, 30 ... Groove, 7, 15, 31 ... Selective epitaxial growth region, 8, 16, 32 ... Polycrystalline silicon region, 22, 24 ... N region.

Claims (1)

[Claims] 1. A semiconductor single crystal substrate has a structure in which a first insulating film, a polycrystalline silicon film, and a second insulating film are sequentially laminated on one main surface of a main surface of the semiconductor single crystal substrate. A step of forming a groove which is a crystal, and a direct etching of the polycrystalline silicon film in the groove to make the polycrystalline silicon film in the groove recede from the side surface of the groove. A method of manufacturing a semiconductor device, comprising: a step of selectively forming a semiconductor single crystal layer in the groove using the semiconductor single crystal of the bottom surface as a seed.