JPH0693584B2 - Bias circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bias circuit for supplying a constant voltage externally controllable to the input / output terminals of a high frequency amplifier or oscillator using a semiconductor element, In particular, the present invention relates to a bias circuit including a lumped constant element and a distributed constant element, which is suitable as a negative voltage circuit of a high-efficiency power amplifier.

[Background of the Invention]

Conventionally, there are two ways of handling a bias circuit composed of a distributed constant circuit. One is the idea of incorporating the bias circuit itself into a part of the matching circuit, and the other is the idea of considering the bias circuit separately from the matching circuit.

A typical example based on the latter idea is shown in FIG. 1 is an active element such as a transistor, 2 and 3 are DC blocking capacitors, and 4 and 5 are distributed constant lines having a length of 1/4 of the fundamental wavelength λ ₁ (hereinafter, I call it. ). 6 and 7 are Capacitors 4 and 5 are short-circuited at high frequencies to block direct current, 8 is an input matching circuit, and 9 is an output matching circuit. Bias circuits 10 and 11 have terminals
DC bias is applied from 12 and 13. The bias circuit can perform its function for a conventional amplifier or the like that matches an input / output matching circuit such as an active element only with respect to the fundamental impedance. However, unlike the above-mentioned amplifier, the so-called “high-efficiency amplifier” that attempts to achieve high-efficiency operation by imposing a specific load condition on the harmonic impedance has the following problems.

The problem will be described below with reference to a known example of the "high efficiency amplifier" shown in FIG. 21 is an active element such as FET, 22 and 23 are respectively distributed _third- harmonic wavelength λ ₃ and 1 / 4-length distributed constant line for the _second harmonic wavelength λ ₂ (hereinafter, respectively) I call it. ), The third-order harmonic impedance and the second-order harmonic impedance of the respective lines viewed from the points A and B are zero. 24 and 25 are distributed constant lines that determine the optimum phase for the third harmonic and the second harmonic. Reference numeral 26 is a fundamental wave matching circuit. 27 is each line 22,23,24,2
The whole including 5 is shown and is called a harmonic control circuit.

This prior art does not mention a bias circuit, but in this example, based on the latter idea, the conventional one-end short circuit is performed. Consider adding a buyout circuit.

Conventional short circuit More comprising bias circuit impedance viewed line direction (see FIG. 1 bias circuit 11, the impedance viewed in an arrow direction from FIG attachment point 14) Z is, for the fundamental wave lambda _1, (Z ₀ is the characteristic impedance of the line) (incidentally, it is infinite even for odd harmonics), but for even harmonics, Becomes That is, the impedance of the fundamental wave and the third harmonic are infinite, but the impedance of the second harmonic is zero.

Therefore, this is contrary to the latter idea for the design of the bias circuit, that is, the idea of separating the bias circuit from the matching circuit (making the impedance infinite).

Therefore, when the fundamental wave control circuit 26 and the harmonic wave control circuit 27 are housed within a predetermined area and the power amplifier is modularized and miniaturized, the mounting position of the bias circuit is limited, so the circuit pattern Is poor in design.

In addition, when increasing the power of the “high-efficiency power amplifier”, the harmonic control circuit 27 also needs to have a withstand voltage of only a tatami mat in which the harmonic power is superimposed on the DC bias voltage.

[Object of the Invention]

It is an object of the present invention that not only the fundamental wave but also the second harmonic and the third harmonic impedance, which are indispensable when constructing a load circuit required for high-efficiency operation of an amplifier, become infinite at high frequencies. It is to provide a bias circuit, thus allowing the bias circuit to be added to any desired "high efficiency amplifier" load circuit location.

[Outline of Invention]

In order to achieve the above object, the bias circuit of the present invention supplies a predetermined voltage to an output line of a semiconductor element such as a transistor, so that one end thereof is a part (Q) of the output line of the semiconductor element.
The other end of the first DC blocking capacitor (31-
4) connected to the first distributed constant line (31-3) having a length of 1/4 wavelength of the fundamental wavelength λ and one end connected to the central part (P) of the first distributed constant line, A second distributed constant line (31-1) having a length of 1/4 wavelength of the fundamental wavelength λ, the other end of which is connected to the second DC blocking capacitor (31-2), and the first and second
Of the distributed constant line and the first and second DC blocking capacitors, and first and second power feed lines (31) for feeding the predetermined voltage from an external power source.
-5, 31-6) and the predetermined voltage is supplied from either the first or second power supply line.

By configuring the bias circuit in this way, as will be described later with reference to FIG. 3, the impedance seen from the feeding point (Q) is the fundamental wave of the output of the semiconductor element, the second harmonic wave, and the third harmonic wave.
It becomes infinite for each of the second harmonics, and the bias circuit as a whole short-circuits the output of the semiconductor element at high frequencies.

Example of Invention

An example in which the present invention is applied to the output side bias circuit of the "high efficiency power amplifier" will be described below with reference to FIG.

First, the overall configuration will be described. 31 is a bias circuit according to the present invention, 32 is an active element such as FET, 33 is an input side matching circuit, 3
4, and 35 are DC blocking capacitors, 36 is a harmonic control circuit, 37 is an output side fundamental wave matching circuit, and 38 is a conventional one-sided short circuit It is an input side bias circuit using.

Next, the detailed configuration of the present invention will be described. In the bias circuit 31
31-1 is And It is connected to the center of 31-3. 31-2 and 31-4
Is Capacitors 31-5 and 31-6 for short-circuiting 31-1 and 31-3 at high frequency and blocking direct current are bias terminals.

Next, the operation principle of the bias circuit 31 of the present invention will be described. First consider the fundamental impedance.

31-1 has one end short-circuited at high frequency by the capacitor 31-2, Impedance Z _{1, AP} as viewed in the direction of arrow A from the intersection P with 31-1 and 31-3 is (Where Z ₀₁ is the characteristic impedance of the distributed constant line 31-1). Therefore, the impedances Z _{1 and BQ} seen from the connection point Q between the bias circuit and the active element 2 in the arrow B direction are (Where Z ₀₂ is the characteristic impedance of the distributed constant line 31-3).

Next, consider the second harmonic impedance. Impedance Z ₂ as seen the direction of arrow A from the point _{P, AP} is, λ _{1 =} 2
・ Because it is λ ₂ , Becomes Therefore, the impedance _{Z2, BQ} seen from the Q point in the direction of the arrow B is Becomes

Next, the third harmonic impedance will be described. λ
_{Since 1} = 3 · λ ₃ , the impedance Z _{3, AP} seen from the point P in the direction of arrow A is Therefore, impedance Z _{3, QB} seen from the point Q in the direction of arrow B
Is Becomes

From the above, it can be seen that the impedance seen from the point Q in the direction of the arrow B is infinite with respect to the impedance of each of the fundamental wave, the second harmonic, and the third harmonic, and the DC bias terminal 31-5, Alternatively, power can be supplied from any of 31-6.

Therefore, when configuring the load circuit of the "high efficiency power amplifier", the fundamental wave, the second harmonic, and the third harmonic impedance of the load circuit, which bring the most effect on the "efficiency" of the amplifier, The bias circuit can be considered separately in terms of high frequency, and therefore, the bias circuit can be added to a desired position of the load circuit, and the load circuit for the highly efficient operation of the amplifier can be easily configured. can do. Further, as for the withstand voltage of the harmonic control circuit, which is a problem when increasing the power of the “high-efficiency power amplifier”, direct current can be blocked immediately before the harmonic control circuit 36.
It is only necessary to consider the withstand voltage of the high frequency power, and the withstand voltage of the harmonic control circuit can be small.

The present invention can also be implemented in the input side bias circuit.
In FIG. 3, when the input waveform includes a harmonic component, the present invention is applied instead of the conventional bias circuit 8 (FIG. 1), and the fundamental wave, the second harmonic, and the third harmonic are applied. Considering the bias circuit separately without affecting the
A matching circuit can be configured.

〔The invention's effect〕

According to the present invention, when a load circuit for high-efficiency operation is configured by combining two short-circuited distributed constant lines of 1/4 wavelength of the fundamental wave wavelength λ ₁ , the fundamental wave, the second harmonic wave, and the For the second harmonic, the bias circuit can be simultaneously separated in high frequency, so that the bias circuit can be added at a desired position of the load circuit of the high efficiency power amplifier.
The load circuit configuration for high efficiency operation of the amplifier can be facilitated. Further, with respect to the breakdown voltage of the harmonic control circuit, which becomes a problem when the power of the high-efficiency power amplifier is increased, the breakdown voltage can be lowered as much as the direct current can be blocked immediately before the harmonic control circuit.

[Brief description of drawings]

Fig. 1 shows a conventional short-circuit at one end FIG. 2 is a circuit diagram showing an example of a matching circuit using the above, FIG. 2 is a circuit diagram of a conventional high efficiency power amplifier, and FIG. 3 is a circuit diagram of a high efficiency amplifier using a bias circuit according to an embodiment of the present invention. It is a circuit diagram. 31-1, 31-3 ... 31-2, 31-4 ... One short-circuited capacitor, 31-5, 31-6 ... Bias terminal.

Claims (1)

[Claims] 1. A bias circuit for supplying a predetermined voltage to an output line of a semiconductor element for operating a semiconductor element for amplifying or oscillating a high frequency signal, comprising:
One end for supplying the predetermined voltage is connected to the output line of the semiconductor element, and the other end is connected to the first DC blocking capacitor. The distributed constant line and one end of which is connected to the central portion of the first distributed constant line and the other end of which is connected to the second DC blocking capacitor, has a second wavelength of 1/4 wavelength of the fundamental wavelength λ. Distributed constant line, the first and second distributed constant lines, and the first and second
Of the DC blocking capacitor, and first and second power supply lines for supplying the predetermined voltage from an external power source, and the predetermined voltage is the first or second power supply line. A bias circuit characterized in that power is supplied from one of the two power supply lines.