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JPH0135533B2 - - Google Patents
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JPH0135533B2 - - Google Patents

Info

Publication number
JPH0135533B2
JPH0135533B2 JP54085380A JP8538079A JPH0135533B2 JP H0135533 B2 JPH0135533 B2 JP H0135533B2 JP 54085380 A JP54085380 A JP 54085380A JP 8538079 A JP8538079 A JP 8538079A JP H0135533 B2 JPH0135533 B2 JP H0135533B2
Authority
JP
Japan
Prior art keywords
operational amplifier
power supply
amplifier
voltage follower
auxiliary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54085380A
Other languages
Japanese (ja)
Other versions
JPS568910A (en
Inventor
Akira Igarashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Electric Meters Inspection Corp JEMIC
Original Assignee
Japan Electric Meters Inspection Corp JEMIC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Electric Meters Inspection Corp JEMIC filed Critical Japan Electric Meters Inspection Corp JEMIC
Priority to JP8538079A priority Critical patent/JPS568910A/en
Publication of JPS568910A publication Critical patent/JPS568910A/en
Publication of JPH0135533B2 publication Critical patent/JPH0135533B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42Modifications of amplifiers to extend the bandwidth
    • H03F1/48Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
    • H03F1/486Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with IC amplifier blocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Description

【発明の詳細な説明】 本発明は、高入力及び低出力インピーダンスの
インピーダンス変換器で、入力と出力を高精度で
一致させることを目的とした演算増幅器に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an operational amplifier that is an impedance converter with high input and low output impedance and whose purpose is to match input and output with high precision.

第1図は、従来の一段の電圧フオロアー形演算
増幅器の略線図である。
FIG. 1 is a schematic diagram of a conventional single-stage voltage follower type operational amplifier.

P1は入力端、A0は増幅器、P3は出力端、+E0
−E0は直流電源、G0は接地電位、Zlは負荷であ
る。
P 1 is the input terminal, A 0 is the amplifier, P 3 is the output terminal, +E 0 ,
−E 0 is the DC power supply, G 0 is the ground potential, and Zl is the load.

これは、高入力インピーダンス・低出力インピ
ーダンスのインピーダンス変換器としてよく知ら
れている。
This is well known as an impedance converter with high input impedance and low output impedance.

しかしながら、第1図の回路方式では増幅器の
性能上の制約から、商用周波数帯程度の低い周波
数領域で良好な特性を呈するのみで、周波数領域
が高くなると、ことさらに入・出力間の位相差が
大きくなり、回路の利得も低下することから、特
に負荷Zlが低インピーダンスになると、ますます
インピーダンス変換器としての良好な機能を失つ
てしまうものである。
However, due to the performance constraints of the amplifier, the circuit system shown in Figure 1 only exhibits good characteristics in the low frequency range of the commercial frequency band, and as the frequency range increases, the phase difference between input and output becomes even worse. As the impedance becomes larger and the gain of the circuit decreases, especially when the impedance of the load Zl becomes low, the good function as an impedance converter is increasingly lost.

本発明は、これらの欠点に鑑みてなされたもの
であつて、周波数特性及び負荷特性の優れた電圧
フオロアー形演算増幅器を提供することを、その
目的とする。
The present invention has been made in view of these drawbacks, and an object of the present invention is to provide a voltage follower type operational amplifier with excellent frequency characteristics and load characteristics.

第2図は、本発明の一実施例のブロツクダイア
グラムである。
FIG. 2 is a block diagram of one embodiment of the present invention.

それぞれ別個の電源をもつ二個の演算増幅器で
構成されている。
It consists of two operational amplifiers, each with a separate power supply.

A1が主増幅器で、その主増幅器A1の電源の接
地電位はG1である。
A1 is the main amplifier, and the ground potential of the power supply of the main amplifier A1 is G1 .

A2は補助用に用いた増幅器で、G2が補助増幅
器A2の接地電位である。
A2 is an amplifier used for auxiliary purposes, and G2 is the ground potential of the auxiliary amplifier A2 .

e1は入力電圧、e3は出力電圧、Δeは端子P2
端子P3の間の電位差で主増幅器A1の残留偏差電
圧である。
e 1 is the input voltage, e 3 is the output voltage, and Δe is the potential difference between terminal P 2 and terminal P 3 , which is the residual deviation voltage of the main amplifier A 1 .

+E1,−E1および+E2,−E2は主増幅器A1およ
び補助増幅器A2の直流電源である。
+E 1 , -E 1 and +E 2 , -E 2 are DC power supplies for the main amplifier A 1 and the auxiliary amplifier A 2 .

ここで主増幅器A1が充分な性能を有していな
いため、補助増幅器A2の接地電位G2であり、か
つ主増幅器A1の入力端子P2と出力端子P3との間
にΔeなる電位差が生じたとすると、この差電圧
Δeは主増幅器A1の入力端子P2を接地電位G2
し、直流電源を主増幅器A1と別個に用いること
により、回路動作も主増幅器A1と独立して用い
る補助増幅器A2を介して、P1〜P2端子(P1〜G2
端子)間に閉ループで帰還してやる。もつとも、
実際に装置を組立て構成するときは、等価的に
P1〜G2端子間にある程度のインピーダンスで接
続されることになるから、積極的にP1〜G2端子
間にある程度の抵抗を接続することは、本発明を
理解するに便利である。
Here, since the main amplifier A 1 does not have sufficient performance, the ground potential G 2 of the auxiliary amplifier A 2 is the same, and there is a Δe between the input terminal P 2 and the output terminal P 3 of the main amplifier A 1 . If a potential difference occurs, this difference voltage Δe can be calculated by setting the input terminal P 2 of the main amplifier A 1 to the ground potential G 2 and using a DC power supply separately from the main amplifier A 1 , so that the circuit operation is independent of the main amplifier A 1 . The P 1 to P 2 terminals (P 1 to G 2
(terminals) in a closed loop. However,
When actually assembling and configuring the device, equivalently
Since the P 1 to G 2 terminals are connected with a certain level of impedance, it is convenient for understanding the present invention to actively connect a certain amount of resistance between the P 1 to G 2 terminals.

この結果、P2端子の電位はP1端子の電位より
電位差Δeだけ低電位となるため、結局出力端子
P3には入力端子P1と大きさ及び位相差が共に非
常に高精度で一致した電圧が現われることにな
る。
As a result, the potential of the P2 terminal becomes lower than the potential of the P1 terminal by the potential difference Δe, so the output terminal
A voltage appears at P 3 that matches the input terminal P 1 in magnitude and phase difference with very high precision.

本発明は、それぞれ独立した直流電源をもち回
路上全く独立した二個の演算増幅器を用い、二段
の電圧フオロアーを構成するところが特徴であ
る。
The present invention is characterized in that a two-stage voltage follower is constructed by using two operational amplifiers each having an independent DC power supply and having completely independent circuits.

すなわち、本発明の要旨は次のとおりである。 That is, the gist of the present invention is as follows.

補助増幅器A2の出力端子はこの二電源二段電
圧フオロアー形演算増幅器の第1の入力端子P1
と補助増幅器A2の負の入力端子に接続し、補助
増幅器A2の正の入力端子はこの二電源二段電圧
フオロアー形演算増幅器の第1の出力端子P3
接続し、その接地点G2との間に第2の直流電源
+E2,−E2を設けた補助増幅器A2と、 主増幅器A1の正の入力端子は接地点G2に接続
し、主増幅器A1の負の入力端子はこの二電源二
段電圧フオロアー形演算増幅器の第1の出力端子
P3に接続し、その接地点G1との間に第1の直流
電源+E1,−E1を設けた主増幅器A1と、 この二電源二段電圧フオロアー形演算増幅器の
第1の出力端子P3と第2の出力端子に接続され
た負荷Zlとを具備している。
The output terminal of the auxiliary amplifier A 2 is the first input terminal P 1 of this two-power supply two-stage voltage follower type operational amplifier.
and the negative input terminal of auxiliary amplifier A 2 , and the positive input terminal of auxiliary amplifier A 2 is connected to the first output terminal P 3 of this dual-supply two-stage voltage follower operational amplifier, and its ground point G The positive input terminal of the main amplifier A 1 is connected to the ground point G 2 , and the positive input terminal of the main amplifier A 1 is connected to the ground point G 2 . The input terminal is the first output terminal of this two-power supply two-stage voltage follower type operational amplifier.
A main amplifier A 1 connected to P 3 and provided with a first DC power supply +E 1 , -E 1 between it and the ground point G 1 , and a first output of this two-power supply two-stage voltage follower operational amplifier. It has a terminal P3 and a load Zl connected to the second output terminal.

そして、これらの主増幅器A1と補助増幅器A2
が作動状態において、この二電源二段電圧フオロ
アー形演算増幅器の第1の入力端子P1と補助増
幅器A2の接地点G2とから補助増幅器A2方向側を
みたインピーダンスは零であり、それの逆方向側
をみたインピーダンスは無限大となるようにし、 主増幅器A1にて補償不充分な交流残留偏差電
圧を補助増幅器A2の入力とし、これを主増幅器
A1の入力に帰還して、主増幅器A1の交流残留偏
差電圧を補償する。
And these main amplifier A 1 and auxiliary amplifier A 2
In the operating state, the impedance seen from the first input terminal P 1 of this two-power supply two-stage voltage follower operational amplifier and the ground point G 2 of auxiliary amplifier A 2 in the direction of auxiliary amplifier A 2 is zero; The impedance seen in the opposite direction is infinite, and the AC residual deviation voltage that is insufficiently compensated in the main amplifier A1 is input to the auxiliary amplifier A2 , and this is input to the main amplifier A2.
It is fed back to the input of A1 to compensate for the AC residual deviation voltage of the main amplifier A1 .

すなわち、一方の主増幅器A1にて補償不充分
な交流残留偏差電圧Δeを他方の補助増幅器A2
入力とし、これを主増幅器A1の入力e1に帰還し
て主増幅器A1の残留偏差電圧Δeを補償した交流
電圧増幅用の二電源+E1,−E1,+E2,−E2二段電
圧フオロアー形A1,A2演算増幅器である。その
結果、第3図に例示するよう、入力e1(電圧1、
位相角0と仮定している)と出力e3の大きさ及び
位相差、負荷特性が従来の一段形の電圧フオロア
ー増幅器に比べて、はるかに低インピーダンス負
荷の領域にまで改善される。
That is, the AC residual deviation voltage Δe that is insufficiently compensated in one main amplifier A 1 is input to the other auxiliary amplifier A 2 , and is fed back to the input e 1 of the main amplifier A 1 to eliminate the residual AC voltage Δe of the main amplifier A 1 . This is a dual power source +E 1 , -E 1 , +E 2 , -E 2 two-stage voltage follower type A 1 , A 2 operational amplifier for AC voltage amplification that compensates for deviation voltage Δe. As a result, the input e 1 (voltage 1,
(assuming a phase angle of 0), the magnitude of the output e 3 , the phase difference, and the load characteristics are improved to a much lower impedance load region than in a conventional single-stage voltage follower amplifier.

第4図は、本願発明の一実施例における諸元を
記入した計測値を示す。
FIG. 4 shows measured values with specifications in one embodiment of the present invention.

第1の入力端子P1と第2の入力端子間にe1
1V(ボルト)が与えられ主増幅器A1と補助増幅
器A2の閉ループ利得がほぼ1000であるとき、 Δe1=0.001V Δe2=0.000001V≒0 Δe3=0.001000V e2=e1+Δe3 =1.001000V e3=e1+Δe2 =1.000000+0.000001 =1.000000V ならびに e3=e1+Δe3−Δe1 ≒1.000000+0.001 −0.001 ≒1.000000V となり、インピーダンス変換がなされている。
e 1 = between the first input terminal P 1 and the second input terminal
When 1V (volt) is applied and the closed loop gain of main amplifier A 1 and auxiliary amplifier A 2 is approximately 1000, Δe 1 = 0.001V Δe 2 = 0.000001V ≒ 0 Δe 3 = 0.001000V e 2 = e 1 + Δe 3 = 1.001000V e 3 = e 1 + Δe 2 = 1.000000 + 0.000001 = 1.000000V and e 3 = e 1 + Δe 3 −Δe 1 ≒1.000000+0.001 −0.001 ≒1.000000V, and impedance conversion has been performed. .

特に、位相特性に顕著な改善がみられる。 In particular, a remarkable improvement is seen in the phase characteristics.

さらに、使用周波数範囲も従来のものよりさら
に高い領域まで良好な性能を帯有できるものであ
る。
Furthermore, the frequency range used can also be improved to a higher range than the conventional one.

また、ここに用いた二個の増幅器は、個々にお
いては左程利得及び位相特性等の優れたものを用
いる必要がなく、特に補助用増幅器A2は主増幅
器A1の残留偏差電圧を補償するだけの性能を備
えておればよいため、補助用増幅器A2は負荷Zl
の大小にかかわらず電力の供給能力は殆んど必要
としない利点がある。
In addition, the two amplifiers used here do not need to have individually excellent gain and phase characteristics, and in particular, the auxiliary amplifier A 2 compensates for the residual deviation voltage of the main amplifier A 1 . The auxiliary amplifier A 2 only needs to have the performance of the load Zl
It has the advantage that almost no power supply capacity is required, regardless of the size of the power supply.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の一段電圧フオロアー形演算増幅
器の略線図、第2図は本発明の一実施例のブロツ
クダイアグラム、第3図は従来の一段電圧フオロ
アー形演算増幅器と本発明による二電源二段電圧
フオロアー形演算増幅器の特性比較説明図、第4
図は本発明の一実施例における計測値を示す図で
ある。 A0……増幅器、A1……主増幅器、A2……補助
増幅器、+E0,−E0……増幅器A0の直流電源、+
E2,−E2……補助増幅器A2の直流電源、e1……入
力電圧、Δe……主増幅器A1の残留偏差電圧(P1
〜P2間電位差)、e2……e1−Δe、e3……出力電圧、
G1……主増幅器A1の電源の接地電位、G2……補
助増幅器A2の電源の接地電位、P1……入力端子、
P2……主増幅器A1の入力端子、P3……出力端子、
Zl……負荷。
FIG. 1 is a schematic diagram of a conventional single-stage voltage follower type operational amplifier, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. Characteristic comparison explanatory diagram of staged voltage follower type operational amplifier, No. 4
The figure is a diagram showing measured values in one embodiment of the present invention. A 0 ... Amplifier, A 1 ... Main amplifier, A 2 ... Auxiliary amplifier, +E 0 , -E 0 ... DC power supply of amplifier A 0 , +
E 2 , −E 2 ... DC power supply of auxiliary amplifier A 2 , e 1 ... Input voltage, Δe ... Residual deviation voltage of main amplifier A 1 (P 1
~ P2 potential difference), e 2 ...e 1 −Δe, e 3 ...output voltage,
G 1 ... Ground potential of the power supply of main amplifier A 1 , G 2 ... Ground potential of power supply of auxiliary amplifier A 2 , P 1 ... Input terminal,
P 2 ... Input terminal of main amplifier A 1 , P 3 ... Output terminal,
Zl...Load.

Claims (1)

【特許請求の範囲】 1 その出力端子はこの二電源二段電圧フオロア
ー形演算増幅器の第1の入力端子とその負の入力
端子に接続し、その正の入力端子はこの二電源二
段電圧フオロアー形演算増幅器の第1の出力端子
に接続し、その接地点との間に第2の直流電源を
設けた補助演算増幅器と、 その正の入力端子は補助演算増幅器の接地点に
接続し、その負の入力端子はこの二電源二段電圧
フオロアー形演算増幅器の第1の出力端子に接続
し、その出力端子はこの二電源二段電圧フオロア
ー形演算増幅器の第1の出力端子とし、その接地
点との間に第1の直流電源を設けた主演算増幅器
と、 主演算増幅器の接地点にそれぞれ共通に接続し
たこの二電源二段電圧フオロアー形演算増幅器の
第2の入力端子と第2の出力端子と、 この二電源二段電圧フオロアー形演算増幅器の
第1および第2の出力端子間に接続した負荷を具
備し、 これらの主演算増幅器と補助演算増幅器が作動
状態において、この二電源二段電圧フオロアー形
演算増幅器の第1の入力端子と補助演算増幅器の
接地点とから補助演算増幅器方向側をみたインピ
ーダンスは零であり、それの逆方向側をみたイン
ピーダンスは無限大となるようにし、 主演算増幅器にて補償不充分な交流残留偏差電
圧を補助演算増幅器の入力とし、これを主演算増
幅器の入力に帰還して、主演算増幅器の交流残留
偏差電圧を補償したことを特徴とする交流電圧増
幅用の二電源二段電圧フオロアー形演算増幅器。
[Claims] 1. Its output terminal is connected to the first input terminal and its negative input terminal of this two-power supply two-stage voltage follower type operational amplifier, and its positive input terminal is connected to this two-power supply two-stage voltage follower type operational amplifier. an auxiliary operational amplifier connected to the first output terminal of the auxiliary operational amplifier and having a second DC power supply between it and the ground point; The negative input terminal is connected to the first output terminal of this two-power supply two-stage voltage follower type operational amplifier, and its output terminal is the first output terminal of this two-power supply two-stage voltage follower type operational amplifier. a main operational amplifier with a first DC power supply provided between the main operational amplifier, and a second input terminal and a second output of the two-power supply two-stage voltage follower operational amplifier, each commonly connected to the ground point of the main operational amplifier. terminal, and a load connected between the first and second output terminals of the two-power supply two-stage voltage follower operational amplifier, and when the main operational amplifier and the auxiliary operational amplifier are in operation, the two-power supply two-stage voltage follower operational amplifier The impedance viewed from the first input terminal of the voltage follower type operational amplifier and the ground point of the auxiliary operational amplifier toward the auxiliary operational amplifier is zero, and the impedance viewed from the opposite direction is infinite. An AC voltage characterized in that an AC residual deviation voltage that is insufficiently compensated by the operational amplifier is input to an auxiliary operational amplifier, and this is fed back to the input of the main operational amplifier to compensate for the AC residual deviation voltage of the main operational amplifier. A two-power, two-stage voltage follower type operational amplifier for amplification.
JP8538079A 1979-07-05 1979-07-05 Two-electric-source two-stage voltage follower type operational amplifier Granted JPS568910A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8538079A JPS568910A (en) 1979-07-05 1979-07-05 Two-electric-source two-stage voltage follower type operational amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8538079A JPS568910A (en) 1979-07-05 1979-07-05 Two-electric-source two-stage voltage follower type operational amplifier

Publications (2)

Publication Number Publication Date
JPS568910A JPS568910A (en) 1981-01-29
JPH0135533B2 true JPH0135533B2 (en) 1989-07-26

Family

ID=13857118

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8538079A Granted JPS568910A (en) 1979-07-05 1979-07-05 Two-electric-source two-stage voltage follower type operational amplifier

Country Status (1)

Country Link
JP (1) JPS568910A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60108023U (en) * 1983-12-24 1985-07-23 株式会社アドバンテスト High precision voltage generator

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384264U (en) * 1976-12-15 1978-07-12

Also Published As

Publication number Publication date
JPS568910A (en) 1981-01-29

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