JPH069430B2 - Digital bus protection relay - Google Patents
Digital bus protection relayInfo
- Publication number
- JPH069430B2 JPH069430B2 JP61128605A JP12860586A JPH069430B2 JP H069430 B2 JPH069430 B2 JP H069430B2 JP 61128605 A JP61128605 A JP 61128605A JP 12860586 A JP12860586 A JP 12860586A JP H069430 B2 JPH069430 B2 JP H069430B2
- Authority
- JP
- Japan
- Prior art keywords
- busbar
- relay
- amount
- bus
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Emergency Protection Circuit Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は電力系統の二重母線を保護するデジタル形地
絡母線保護継電装置に関するものである。Description: TECHNICAL FIELD The present invention relates to a digital ground fault bus protection relay device for protecting a double bus of a power system.
第3図は例えば特公昭42-2986号公報に示された従来の
分割保護方式と称される二重母線保護装置の原理構成図
であり、図において(1-1)(1-2)は母線、(1-3)は母線連
絡線((1)下母連と称す)(101),(201)…(1n)(2n)は断路
器、(3-1)…(3-n)(3-A)(3-B)はCT、(4)はギャップ付
入力トランス,(101X)(201X),(1nX)(2nX)は各々断路器
(101)(201),(1n)(2n)が閉成時に接点ONする補助リレ
ー接点、(26)は入力装置、(27)は整流回路、(28-1)(28-
2)は母線保護リレーである。FIG. 3 is a principle block diagram of a double busbar protection device called a conventional split protection system disclosed in, for example, Japanese Patent Publication No. 42-2986, in which (1-1) (1-2) are Busbars, (1-3) are busbar communication lines (referred to as (1) Shimomamaren) (101), (201)… (1n) (2n) are disconnectors, (3-1)… (3-n) (3-A) (3-B) is CT, (4) is input transformer with gap, (101X) (201X), (1nX) (2nX) are disconnectors respectively.
(101) (201), (1n) (2n) is an auxiliary relay contact that turns on when closed, (26) is an input device, (27) is a rectifier circuit, (28-1) (28-
2) is a busbar protection relay.
次に動作について説明する。母線1(1-1)又は母線2(1-
2)に接続される各回線に設置されたCT(3-1)〜(3-n)及
び母連(1-3)に設置されたCT(3-A),(3-B)の二次電流は
各々入力装置(26)に内蔵されたギャップ付入力トランス
(4)で電圧変換される。ギャップ付入力トランス(4)には
2次コイルと3次コイルを有し、2次コイル出力電圧は
動作量、3次コイル出力電圧は整流回路(27)を介して抑
制量であり、これら出力は、断路器(101),(201)…(1n),
(2n)の動作状態に応じて開閉する接点(101X),(201X)…
(1nX),(2nX)により、母線1(1-1)を保護する母線保護リ
レー(以下分割リレーAと称す)(28-1)又は母線2(1-2)
を保護する母線保護リレー(以下分割リレーBと称す)
に選択される。すなわち、分割リレーA(28-1)の動作量
VDAは母線1(1-1)に接続される全回線のCT2次電流の
ベクトル和に比例し、抑制量|VRA|は母線1(1-1)に接
続される全回線のCT2次電流中最大の電流に比例した
ものとなる。同様に分割リレーB(28-2)の動作量VDBは
母線2(1-2)に接続される全回線のCT2次電流のベクト
ル和に比例し、抑制量|VRB|は母線2(1-2)に接続され
た全回線のCT2次電流中最大の電流に比例したものと
なる。分割リレーA(28-1)及び分割リレーB(28-2)は比
率差動原理であり、|VDA|−η|VRA|K又は|V
DB|−η|VRB|K(但しη,Kは定数)の条件で動
作するものである。Next, the operation will be described. Bus 1 (1-1) or Bus 2 (1-
Two of CT (3-1) to (3-n) installed in each line connected to 2) and CT (3-A) and (3-B) installed in mother station (1-3). The secondary current is the input transformer with a gap built in each input device (26).
The voltage is converted in (4). The input transformer with a gap (4) has a secondary coil and a tertiary coil, the secondary coil output voltage is the operation amount, and the tertiary coil output voltage is the suppression amount via the rectifier circuit (27). Is a disconnector (101), (201)… (1n),
Contacts (101X), (201X) that open and close according to the operating state of (2n) ...
Busbar protection relay (hereinafter referred to as split relay A) (28-1) or busbar 2 (1-2) that protects busbar 1 (1-1) by (1nX) and (2nX)
Bus protection relay (hereinafter referred to as split relay B)
To be selected. That is, the operation amount V DA of the split relay A (28-1) is proportional to the vector sum of the CT secondary currents of all lines connected to the bus 1 (1-1), and the suppression amount | V RA | It is proportional to the maximum current of the CT secondary currents of all lines connected to 1-1). Similarly, the operation amount V DB of the split relay B (28-2) is proportional to the vector sum of the CT secondary currents of all lines connected to the bus 2 (1-2), and the suppression amount | V RB | is the bus 2 ( It is proportional to the maximum current of the CT secondary currents of all lines connected to 1-2). The split relay A (28-1) and the split relay B (28-2) are based on the ratio differential principle, and | V DA | -η | V RA | K or | V
It operates under the condition of DB | −η | V RB | K (where η and K are constants).
従来の母線保護継電装置は以上のように構成されている
ので、第4図に示すような母線運用時に送電線の零相循
環電流Iothが母線連絡に集中する為内部一線地絡事故
が発生しても母線連絡を通過する各回線の零相循環電流
和ΣIontが不要抑制として効果し分割リレーが不動作
又は検出感度低下となるなどの問題点があった。Since the conventional busbar protective relay device is configured as described above, an internal one-line ground fault occurs because the zero-phase circulating current Ioth of the transmission line concentrates on the busbar connection during busbar operation as shown in FIG. However, there is a problem that the zero-phase circulating current sum ΣIont of each line passing through the bus connection is effective as unnecessary suppression and the split relay does not operate or the detection sensitivity decreases.
この発明は上記のような問題点を解消するためになされ
たもので、零相循環電流の影響をまったく受けない選択
リレー方式を取ることを目的とする。The present invention has been made to solve the above problems, and an object thereof is to adopt a selective relay system that is not affected by the zero-phase circulating current at all.
この発明によれば、母線の内外部事故を判別する一括リ
レーと各母線単位の差動量の比を検出する差動量比率検
出リレーを選択リレーとして備え、一括リレー出力と選
択リレー出力の論理積を最終出力とするようにしたもの
である。According to the present invention, a collective relay for discriminating internal / external accidents on the bus bar and a differential amount ratio detection relay for detecting a ratio of differential amounts of each bus bar are provided as selection relays, and the logic of the collective relay output and the selection relay output is provided. The product is used as the final output.
この発明における選択リレーは各母線単位の差動比を検
出する差動量比率検出リレーとした為、母線内部1線地
絡事故時に母連を通過する零相循環電流は差動量に含ま
れることなく、確実に事故母線を選択することができ
る。又外部事故に対しては母連電流を使用しない一括リ
レーで誤動作を防止することができる。Since the selection relay according to the present invention is a differential amount ratio detection relay that detects the differential ratio of each busbar unit, the zero-phase circulating current passing through the busbar in the case of a one-line ground fault in the busbar is included in the differential amount. It is possible to select the accident busbar without fail. In addition, in case of an external accident, a malfunction can be prevented with a collective relay that does not use the mother continuous current.
以下、この発明の一実施例を図について説明する。第1
図において(4-1)〜(4-n)(4-A)(4-B)はギャップ付入力ト
ランス、(5)はデジタルリレー、(6)はフィルター、(7)
はサンプルホールド器(以下S/Hと称す)、(8)はマ
ルチプレクサー(以下PXと称す)、(9)はアナログ/
デジタル変換器(以下A/Dと称す)、(10)はデジタル
入力回路(以下DIと称す)、(11)はデジタル出力回路
(以下DOと称す)、(12)はメモリー、(13)はマイクロ
プロセッサ(以下CPUと称す)である。An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, (4-1) to (4-n) (4-A) (4-B) are input transformers with a gap, (5) is a digital relay, (6) is a filter, (7)
Is a sample and hold device (hereinafter referred to as S / H), (8) is a multiplexer (hereinafter referred to as PX), and (9) is analog /
Digital converter (hereinafter referred to as A / D), (10) is a digital input circuit (hereinafter referred to as DI), (11) is a digital output circuit (hereinafter referred to as DO), (12) is a memory, (13) is It is a microprocessor (hereinafter referred to as CPU).
CT(3-1)〜(3-n),(3-A)(3-B)の2次電流はギャップ付
入力トランス(4-1)〜(4-n)(4-A)(4-B)で電圧変換し、デ
ジタルリレー(5)に導入する。The secondary current of CT (3-1) to (3-n), (3-A) (3-B) is the input transformer with gap (4-1) to (4-n) (4-A) (4 -B) convert voltage and introduce to digital relay (5).
一方断路器(101)(201)…(1n)(2n)の開閉状態はそれの補
助リレー接点(101X)(201X)…(1nX)(2nX)を介してデジタ
ルリレー(5)に導入されている。尚ギャップ付入力トラ
ンス(4-1)〜(4-n)には各々2次コイルと3次コイルを有
し、2次コイルは出力は、そのままデジタルリレー(5)
に導入し、3次コイル出力は、全回線分をベクトル合成
した一括用出力としてデジタルリレー(5)に導入するも
ので、第3図に示す従来例では一括用出力を有していな
い。On the other hand, the open / closed state of the disconnector (101) (201)… (1n) (2n) is introduced to the digital relay (5) via its auxiliary relay contact (101X) (201X)… (1nX) (2nX). There is. Each of the input transformers with gaps (4-1) to (4-n) has a secondary coil and a tertiary coil, and the output of the secondary coil is the digital relay (5) as it is.
The third coil output is introduced into the digital relay (5) as a batch output in which all lines are vector-synthesized. The conventional example shown in FIG. 3 does not have the batch output.
ギャップ付入力トランス(4-1)〜(4-n)(4-A)(4-B)の各2
次出力及び一括用出力は各々フィルター(6)を介し、S
/H(7)で同一時刻、一定間隔のアナログ量瞬時値をサ
ンプリングする。MPX(8)は各S/H(7)の出力を順次
切替え、A/D(9)にてアナログ量をデジタル量に変換
の上メモリー(12)に記憶させる。一方断路器の開閉状態
はDI(10)より取り込みメモリー(12)に状態を記憶さ
せ、CPU(13)で電流デジタル量の選択演算、リレー演
算等を行ないDO(11)で動作出力を外部に出すものであ
る。Input transformer with gap (4-1) to (4-n) (4-A) (4-B) 2 each
The next output and the batch output are respectively S through the filter (6).
/ H (7) samples the analog value instantaneous value at the same time and at constant intervals. The MPX (8) sequentially switches the output of each S / H (7), converts the analog amount into a digital amount by the A / D (9), and stores it in the memory (12). On the other hand, the open / closed state of the disconnector is taken in from DI (10) and stored in the memory (12), and the CPU (13) performs the selection calculation of the digital current amount, the relay calculation, etc., and DO (11) outputs the operation output to the outside. It is something to put out.
以上の構成から成るデジタル形地絡母線保護継電装置に
おいて演算原理を第2図に示す。FIG. 2 shows the operation principle of the digital ground fault bus protection relay device having the above-mentioned configuration.
第2図において入力I1〜Inは各々第1図のCT(3-
1)〜(3n)の2次電流瞬時値に比例したデジタル量、入力
IA,IBは第1図のCT(3-A),(3-B)の2次電流瞬時
値に比例したデジタル量、入力IDは第1図の入力トラ
ンス(4-1)〜(4-n)の3次コイルベクトル合成値、すなわ
ち母線1(1-1)及び母線2(1-2)に接続された全回線のCT
2次電流を一括した差動電流(以下一括差動電流と称
す)の瞬時値に比例したデジタル量、入力(101X),(201
X)〜(1nX)(2nX)は第1図の断路器(101)(201)〜(1n)(2n)
の開閉状態を表わすデジタル量であり、電流入力はA/
D(9)、断路器開閉状態信号はDI(10)より各々メモリ
ー(12)に一時記憶されている。以上の入力データを使用
して、メモリー(12)に永久保持されたプログラムに従っ
てCPU(13)で演算処理するものである。選択ブロツク
(14)は断路器開閉状態に応じて電流入力データを選択す
るものであり、例えば第1図のCT(3-1)の回線が断路
器(101)閉,(201)開の状態であれば電流データI1は母
線1(1-1)側に選択し、断路器(101)開(201)閉の状態であ
れば電流データI1は母線2(1-2)側に選択する。同様に
電流データI2〜Inの選択した結果の母線1(1-1)側電
流データ群InAをブロック(15-1)に示し母線2(1-2)側電
流データ群InBをブロック(15-2)に示す。Input I 1 ~I n each of the first view CT in FIG. 2 (3-
Digital quantities proportional to the secondary current instantaneous values of 1) to (3n), inputs I A and I B are proportional to the secondary current instantaneous values of CT (3-A) and (3-B) in FIG. The digital value and input ID are connected to the combined value of the tertiary coil vectors of the input transformers (4-1) to (4-n) in FIG. 1, that is, the busbar 1 (1-1) and the busbar 2 (1-2). CT of all lines
A digital value proportional to the instantaneous value of the differential current that collectively includes the secondary current (hereinafter referred to as the collective differential current), input (101X), (201
X) to (1nX) (2nX) are the disconnectors (101) (201) to (1n) (2n) of Fig. 1.
Is a digital value that indicates the open / closed state of the
The signal D (9) and the disconnecting switch open / close state signal are temporarily stored in the memory (12) from DI (10). Using the above input data, the CPU (13) performs arithmetic processing according to a program permanently retained in the memory (12). Selection block
(14) is for selecting the current input data according to the open / close state of the disconnector. For example, if the line of CT (3-1) in Fig. 1 is in the disconnector (101) closed and (201) open state. For example, the current data I 1 is selected on the bus 1 (1-1) side, and if the disconnector (101) is open (201) closed, the current data I 1 is selected on the bus 2 (1-2) side. Similarly current data I 2 ~I n of selected result of the bus 1 (1-1) side current data group InA are shown in block (15-1) bus 2 (1-2) side current data group InB blocks ( It is shown in 15-2).
尚母連(1-3)は母線選択をする必要がないため電流デー
タIAはブロック(15-1),IBはブロック(15-2)にその
まま導入している。演算ブロック(16-1),(16-2)は選択
リレー用差動量IDA,IDBを得る為のもので母線1(1-1)
に接続された全回線CT2次電流のベクトル和に比例し
た選択リレー87A用差動量 はブロツク(15-1)の電流データ群InAをすべて加算演算
して得られ、同様に選択リレー87B用差動量 はブロツク(15-2)の電流データ群InBをすべて加算して
得られる。Naohaharen (1-3) Current data I A block do not have to take the bus selection (15-1), I B is introduced directly into the block (15-2). The operation blocks (16-1) and (16-2) are for obtaining the differential amounts I DA and I DB for the selection relay, and are bus 1 (1-1)
Differential amount for selection relay 87A proportional to the vector sum of the CT secondary currents of all circuits connected to Is obtained by adding all the current data group I nA of the block (15-1), and similarly the differential amount for the selection relay 87B. Is obtained by adding all the current data groups I nB of the block (15-2).
演算ブロック(17-1)は母線1(1-1)の事故を検出する分割
リレー87-Aの動作判別演算ブロックであり演算ブロック
(17-2)は母線2(1-2)の事故を検出する分割リレー87Bの
動作判別演算ブロックである。演算ブロック(17-1),(17
-2)に示す原理式は、本発明の目的である零相循環電流
の影響を受けない選択リレーを得る手段を示しており、
通常の比率差動リレーと相違する点は、抑制量のとり方
にある。すなわち、通常の比率差動リレーでは前記従来
の実施例に示すように、各回線電流絶対値の内最大値又
はスカラー和に比例した量を抑制量としているが、本発
明では他母線側差動量に比例した量を抑制量としてい
る。このように他母線側差動量に比例した量を抑制量と
すれば、多回線並架送電線に発生する零相循環電流の影
響がまったくないことは明らかであり、前記第4図で説
明したような問題点は解消される。尚、各母線の差動量
は母線外部事故時には零となり、抑制効果がなくなる
が、この対策として後述の一括リレーを設けるようにす
る。本発明の選択リレーは複母線構成における母線内部
事故時に、どの母線事故かを確実に選択することを目的
としており、例えば第1図の母線(1-1)の事故であれば
選択リレー87A(17-1)の動作量(母線1(1-1)側差動値)
IDAは事故電流に比例した量となり抑制量(母線2(1-2)
側差動量)IDBは零又はCT誤差分となる為、定数
η1,Kを適当に設定しておけば|IDA|−η1|IDB
|>Kが成立し、選択リレー87A(17-1)は動作する。一
方選択リレー87B(17-2)の動作量(差動量IDB)は零又
はCT誤差分であるのに対し、抑制量は事故電流(差動
量IDA)に比例したものとなり、充分な抑制効果を生じ
選択リレー87B(17-2)は動作しない。The operation block (17-1) is an operation determination operation block for the split relay 87-A that detects an accident on bus 1 (1-1).
(17-2) is an operation determination calculation block of the split relay 87B that detects an accident on the bus 2 (1-2). Computation block (17-1), (17
-2) shows the means for obtaining a selective relay that is not affected by the zero-phase circulating current, which is the object of the present invention.
The difference from the normal ratio differential relay is in the amount of suppression. That is, in the normal ratio differential relay, the amount proportional to the maximum value or the scalar sum of the absolute values of the respective line currents is used as the suppression amount as shown in the above-mentioned conventional embodiment. The amount proportional to the amount is defined as the suppression amount. If the amount proportional to the differential amount on the other bus side is used as the suppression amount as described above, it is clear that there is no influence of the zero-phase circulating current generated in the multi-circuit parallel transmission line, which will be described with reference to FIG. The problems that were done are solved. It should be noted that the differential amount of each busbar becomes zero in the event of an external busbar accident, and the suppression effect disappears. However, as a countermeasure against this, a collective relay described below is provided. The purpose of the selection relay of the present invention is to reliably select which busbar accident occurs in a busbar internal accident in a double busbar configuration. For example, in the case of a busbar (1-1) accident in FIG. 1, the selection relay 87A ( 17-1) operation amount (bus 1 (1-1) side differential value)
I DA is an amount proportional to the fault current and is a suppression amount (bus 2 (1-2)
Since the side differential amount) I DB becomes zero or the CT error component, if the constants η 1 and K are set appropriately, | I DA | −η 1 | I DB
|> K is established, and the selection relay 87A (17-1) operates. On the other hand, the operation amount (differential amount I DB ) of the selection relay 87B (17-2) is zero or the CT error amount, while the suppression amount is proportional to the fault current (differential amount I DA ), which is sufficient. And the selection relay 87B (17-2) does not operate.
以上説明の通り本発明の選択リレーは差動量IDAとIDB
の比が所定値以上を検出するものであり、その特性例を
第5図に示す。As described above, the selective relay of the present invention has the differential amounts I DA and I DB.
Is detected when the ratio is greater than or equal to a predetermined value. An example of the characteristic is shown in FIG.
次に演算ブロック(18)は母連(1-3)を通過する電流
IA,IBを除く各回線の電流絶対値を導出する演算ブ
ロック、演算ブロック(19)は抑制量を得る演算であり、
第2図の例では最大値抑制方式と称されるもので各回線
電流中最大値に比例した量IRを抑制として導出するも
のである。演算ブロック(20)は一括リレーの判別原理式
であり、一括差動量|ID|と前記抑制量IRとで比率
差動リレー演算を行なう。Next, the operation block (18) is an operation block for deriving the absolute current value of each line except the currents I A and I B passing through the mother station (1-3), and the operation block (19) is an operation for obtaining the suppression amount. Yes,
In the example of FIG. 2, the maximum value suppression method is called, and the amount I R proportional to the maximum value in each line current is derived as suppression. The calculation block (20) is a determination principle formula for the collective relay, and performs a ratio differential relay calculation with the collective differential amount | I D | and the suppression amount I R.
尚、演算ブロック(17-1),(17-2),(20)において使用する
データ|IDA|,|IDB|,|ID|,IRは図示を省
略した周知の振幅値導出演算の結果である。The calculation block (17-1), (17-2), the data used in (20) | I DA |, | I DB |, | I D |, I R is known amplitude value which is not shown derived It is the result of the operation.
(21-1),(21-2)は論理積演算ブロックであり、一括リレ
ー(20)と選択リレー(17-1)又は(17-2)とのAND条件を
作り最終の動作判定とするものである。尚一括リレー用
抑制量には母連(1-3)の電流IA,IBを導入しなくて
も良い為、第4図に示すような母連を通過する零相循環
電流和ΣIothの影響を受けることはない。(21-1) and (21-2) are AND operation blocks, and make an AND condition between the collective relay (20) and the selection relay (17-1) or (17-2) to make the final operation judgment. It is a thing. Since it is not necessary to introduce the currents I A and I B of the mother station (1-3) to the suppression amount for collective relay, the sum of the zero-phase circulating currents ΣIoth passing through the mother station as shown in FIG. It will not be affected.
なお、上記実施例では一括リレーと選択リレー用のCT
2次電流及び構成ハードウェアーを共用しているが、こ
れを完全分離した一括+選択リレー保護方式にしてもよ
く一括リレー用差動量を第2図の演算(16-1)(16-2)結果
を加算しID=IDA+IDBとしてもよい。又第2図の抑
制演算(19)を加算演算としてスカラー和抑制方式として
も良い。In the above embodiment, the CT for the collective relay and the selective relay is used.
The secondary current and the constituent hardware are shared, but it is also possible to use a collective + selective relay protection method in which this is completely separated, and the differential amount for collective relay can be calculated by the calculation (16-1) (16-2) in Figure 2 ) The results may be added to give I D = I DA + I DB . Further, the suppression calculation (19) in FIG. 2 may be used as an addition calculation in a scalar sum suppression system.
以上のように、この発明によれば、複母線全体を保護す
る一括リレーで母線内外部事故を判別し、各母線単位の
差動量に比例した量の比率を検出する各母線単位に設け
た選択リレーのAND条件とするよう構成したので、母
連を通過する零相循環電流和による選択リレーの不動作
又は感度低下等の問題が解消され又デジタルリレー構成
とすればすべてソフトウェアーで処理できる為、コスト
アップとなることなく高信頼度な装置が得られる。As described above, according to the present invention, a collective relay that protects the entire compound bus bar is provided for each bus bar unit that determines an internal / external bus fault and detects the ratio of the amount proportional to the differential amount of each bus line unit. Since the AND condition of the selection relay is used, the problems such as the inoperability of the selection relay due to the sum of zero-phase circulating currents passing through the mother station or the decrease in sensitivity are solved, and if the digital relay structure is used, all can be processed by software. Therefore, a highly reliable device can be obtained without increasing the cost.
第1図は本発明の一実施例によるデジタル形地絡母線保
護継電装置の構成図、第2図は同じく演算ブロック図、
第3図は従来の分割保護方式を示す構成図、第4図は従
来方式の問題点を説明するための系統図、第5図は本発
明による選択リレーの特性図である。 図において、(5)はデジタルリレー、(6)フィルター、
(7)はサンプルホールド、(8)はマルチプレクサー、(9)
はA/D変換器、(10)はデジタル入力、(11)はデジタル
出力、(12)メモリー、(13)はマイクロプロセッサであ
る。 なお図中同一符号は同一又は相当部分を示す。FIG. 1 is a block diagram of a digital ground fault bus protection relay device according to an embodiment of the present invention, and FIG.
FIG. 3 is a block diagram showing a conventional split protection system, FIG. 4 is a system diagram for explaining the problems of the conventional system, and FIG. 5 is a characteristic diagram of a selective relay according to the present invention. In the figure, (5) is a digital relay, (6) filter,
(7) is sample and hold, (8) is multiplexer, (9)
Is an A / D converter, (10) is a digital input, (11) is a digital output, (12) is a memory, and (13) is a microprocessor. The same reference numerals in the drawings indicate the same or corresponding parts.
Claims (1)
線に接続された複数の回線及び前記第1と第2母線間を
接続する母線連絡線に各々設置された変流器の2次電流
に比例した電気量を各々同一時刻、同一間隔でサンプリ
ングし、デジタル量に変換して得る第1の電流データ
と、前記複数の回線の変流器の2次電流に比例したアナ
ログ電気量をベクトル合成した後、前記サンプリングと
同一時刻、同一間隔でサンプリングしデジタル量に変換
して得る第2の電流データと、前記各回線を母線選択す
る断路器開閉状態を各々デジタル量に変換して得る開閉
状態データとを入力するデジタル形母線保護継電装置に
おいて、前記第1の電流データを前記開閉状態データの
ON状態に応じて、前記第1母線又は第2母線の各母線
単位に選択した結果を加算演算して得る第1母線の差動
量IDAと第2母線の差動量IDBの夫々の振幅値に比例し
た量|IDA|,|IDB|から|IDA|−η1|IDB|−
K>0(但し、η1,Kは定数)を判別する第1母線用
選択リレー及び|IDB|−η1|IDA|−K>0を判別
する第2母線用選択リレーと、前記第2電流データより
振幅値導出した量を動作量とし、前記第1の電流データ
群の内母線連絡線の電流データを除く全回線電流の各々
を絶対値演算し、その絶対値電流中最大値又は各絶対値
電流の加算値より振幅値導出した量に所定の定数を乗算
して得る量を抑制量とした比率差動リレーを備え、前記
各選択リレー出力と比率差動リレー出力とを各母線単位
に論理積して最終出力とすることを特徴とするデジタル
形母線保護継電装置。1. A current transformer installed on each of a plurality of lines connected to a double bus composed of a first bus and a second bus and a bus connecting line connecting the first and second buses. First electric current data obtained by sampling the electric quantities proportional to the secondary currents at the same time and at the same intervals and converting them into digital quantities, and an analog proportional to the secondary currents of the current transformers of the plurality of lines. Second electric current data obtained by vector-synthesizing the electric quantities, sampling at the same time and at the same intervals as the sampling, and converting into digital quantities, and the disconnecting switch opening / closing state for selecting each of the lines to a digital quantity. In the digital type busbar protection relay device for inputting the switching status data obtained by the above, the first current data is transferred to each busbar unit of the first busbar or the second busbar according to the ON state of the switching status data. Selected result The first busbar differential amount I DA and quantity proportional to the amplitude value of each of the differential amount I DB of the second busbar obtained by adding operation | I DA |, | I DB | from | I DA | eta 1 | I DB |-
A first busbar selection relay for discriminating K> 0 (where η 1 and K are constants) and a second busbar selection relay for discriminating | I DB | −η 1 | I DA | −K>0; The amount derived from the second current data is used as the operation amount, and all the line currents except the current data of the inner bus connecting lines of the first current data group are calculated as absolute values. Alternatively, a ratio differential relay in which an amount obtained by multiplying an amount derived from an added value of each absolute value current by a predetermined constant is used as a suppression amount is provided, and each of the selection relay output and the ratio differential relay output is provided. A digital bus protection relay device characterized by performing a logical product for each bus to obtain the final output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61128605A JPH069430B2 (en) | 1986-06-03 | 1986-06-03 | Digital bus protection relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61128605A JPH069430B2 (en) | 1986-06-03 | 1986-06-03 | Digital bus protection relay |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62285628A JPS62285628A (en) | 1987-12-11 |
| JPH069430B2 true JPH069430B2 (en) | 1994-02-02 |
Family
ID=14988909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61128605A Expired - Lifetime JPH069430B2 (en) | 1986-06-03 | 1986-06-03 | Digital bus protection relay |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069430B2 (en) |
-
1986
- 1986-06-03 JP JP61128605A patent/JPH069430B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62285628A (en) | 1987-12-11 |
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