JPH069429B2 - Digital ground fault bus protection relay - Google Patents
Digital ground fault bus protection relayInfo
- Publication number
- JPH069429B2 JPH069429B2 JP61128601A JP12860186A JPH069429B2 JP H069429 B2 JPH069429 B2 JP H069429B2 JP 61128601 A JP61128601 A JP 61128601A JP 12860186 A JP12860186 A JP 12860186A JP H069429 B2 JPH069429 B2 JP H069429B2
- Authority
- JP
- Japan
- Prior art keywords
- time
- current
- data
- bus
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は高抵抗接地系電力系統の母線を保護するデジ
タル形地絡母線保護継電装置に関するもので特にケーブ
ル系統に適用するものである。Description: TECHNICAL FIELD The present invention relates to a digital ground fault busbar protective relay device for protecting a busbar of a high resistance grounding power system, and is particularly applied to a cable system.
〔従来の技術〕 第4図は例えば特公昭50−27574号公報に示され
た従来の母線保護装置を示す回路図であり、図において
(1)は母線、(3-1)〜(3-n)はCT、(14)はPT、(15-1)
〜(15-n)は入力装置、(16)(17)はトランス、(18)は
抵抗、(19)は整流回路、(20)は母線保護リレー、(21)は
零相電流(以下、Io又はIo電流と称す。)有効分差
動量導出回路、(22)はIo有効分抑制量導出回路、(23)
はレベル検出回路である。[Prior Art] FIG. 4 is a circuit diagram showing a conventional busbar protection device disclosed in, for example, Japanese Patent Publication No. 50-27574.
(1) is a bus, (3-1) to (3-n) is CT, (14) is PT, (15-1)
~ (15-n) is an input device, (16) (17) is a transformer, (18) is a resistor, (19) is a rectifier circuit, (20) is a busbar protection relay, (21) is a zero-phase current (hereinafter, Io or Io current) Effective component differential amount derivation circuit, (22) is Io effective component suppression amount derivation circuit, (23)
Is a level detection circuit.
次に動作について説明する。母線(1)に接続された全回
線に設置されたCT(3-1)〜(3-n)残留回路よりIo電流
を導出し、これを入力装置(15-1)〜(15-n)に導入して、
トランス(16)で動作量、トランス(17),抵抗(18),整流
回路(19)で抑制量を作る。全回線の入力装置(15-1)〜(1
5-n)のトランス(16)出力はベクトル合成して差動量を
得、整流回路(19)の出力は並列接続して、各回線のIo
電流に比例した抑制量の内最大値を得るようにしてい
る。以上の構成により、母線(1)の外部事故時は差動量
が零又はCT誤差に比例した微小量となり、抑制量は事
故電流に比例した量となる。一方母線内部事故時は、差
動量が事故電流に比例した量、抑制量は母線に流入する
各回線事故電流の内最大値に比例した量となる。母線保
護リレー(20)は比率差動原理のリレーであり、前記差動
量と抑制量を導入し、母線事故を検出するものである
が、母線(1)に接続された送電線にケーブル系がある場
合、通常の比率差動リレーでは内部事故時に確実な動作
が期待できない欠点がある。これを第5図で説明する。
母線(1)にケーブル送電線が接続され充電容量(24)が大
きい場合通常これを補償する中性点、リアクトル(以
下、NGLと称す。)(26)が設けられる。この系統で母
線(1)に一線地絡事故が発生した場合、CT(3-1),(3-
2)には充電々流jICが流れ、CT(3-3)には中性点抵
抗(以下、NGRと称す。)(25)の電流INとNGL(2
6)の電流−jILの合成値IN−jILが流れることに
なり、第4図の整流回路(19)の出力回路に相当する第5
図の最大値抑制導出回路(27)の抑制出力IRはIN−j
ILに比例した量となり、第4図のトランス(6)出力回
路に相当する第5図の差動量導出回路(28)の差動出力I
DはIN−jIL+2jICとなりIL=2ICの場合
ID=INとなる。以上の説明でも明らかなように無効
分電流IC,ILによる抑制量が大きくなれば比率差動
リレー(29)は母線内部事故で不動作となってしまう。以
上の無効分電流対策とし、第4図に示す従来装置では、
母線保護リレー(20)をIO有効分比率差動原理としてい
る。すなわち、第4図において、入力装置(15-1)〜(15-
n)の抑制出力ERと母線(1)に接続されたPTの3次よ
り得た零相電圧(以下、VO又はVO電圧と称す。)を
IO有効分抑制量導回路(22)に導入し、又差動出力ID
とVO電圧をIO有効分差動量導出回路(21)に導入し、
VO電圧と同相の抑制量ERN及び差動量EDNを導出し、
レベル検出回路(23)でEDN−ηRERNKO(但し
ηR,KOは定数)を判別するようにしている。Next, the operation will be described. Io current is derived from the residual circuits of CT (3-1) to (3-n) installed on all lines connected to the busbar (1), and this is input to input devices (15-1) to (15-n). ),
The transformer (16) creates the amount of operation, and the transformer (17), the resistor (18), and the rectifier circuit (19) create the amount of suppression. All line input devices (15-1) to (1
The output of the transformer (16) of (5-n) is vector-combined to obtain a differential amount, and the outputs of the rectifier circuits (19) are connected in parallel to each other to obtain I o of each line.
The maximum value of the suppression amount proportional to the current is obtained. With the above configuration, when the bus (1) has an external accident, the differential amount is zero or a minute amount proportional to the CT error, and the suppression amount is an amount proportional to the fault current. On the other hand, in the case of an internal bus fault, the differential amount is proportional to the fault current, and the suppression amount is proportional to the maximum value of the line fault currents flowing into the bus. The busbar protection relay (20) is a relay based on the ratio differential principle, which introduces the differential amount and the suppression amount to detect a busbar accident, but the cable system is connected to the transmission line connected to the busbar (1). If so, the normal ratio differential relay has a drawback that reliable operation cannot be expected in the event of an internal accident. This will be described with reference to FIG.
When the cable transmission line is connected to the busbar (1) and the charging capacity (24) is large, a neutral point, a reactor (hereinafter referred to as NGL) (26), is usually provided to compensate for this. If a one-line ground fault occurs on the bus (1) in this system, CT (3-1), (3-
The 2) flow charging people flow jI C, CT (3-3) in the neutral point resistor (hereinafter, referred to as NGR.) (25) of the current I N and NGL (2
Will be the combined value I N -jI L current -JI L 6) flows, a fifth corresponding to the output circuit of the rectifier circuit of FIG. 4 (19)
Suppressing the output I R of the maximum value suppression derivation circuit of Fig. (27) I N -j
The amount is proportional to I L , and the differential output I of the differential amount deriving circuit (28) of FIG. 5 corresponding to the transformer (6) output circuit of FIG.
D is the case of I N -jI L + 2jI C next to I L = 2I C I D = I N. As is clear from the above description, if the amount of suppression by the reactive currents I C and I L becomes large, the ratio differential relay (29) becomes inoperable due to an internal bus accident. As a countermeasure against the above reactive current, the conventional device shown in FIG.
The busbar protection relay (20) is based on the I O effective ratio differential principle. That is, in FIG. 4, the input devices (15-1) to (15-
suppressing the output E R and bus (1) connected to the third order from the obtained zero-phase voltage of the PT of n) (hereinafter, referred to as V O or V O voltage.) The I O active component suppression Ryoshirube circuit (22 ), And the differential output I D
And V O voltage are introduced into the I O effective component differential amount deriving circuit (21),
To derive the V O voltage and phase inhibiting amount E RN and the differential amount E DN of,
E DN -η R E RN K O ( where η R, K O is constant) at the level detection circuit (23) is adapted to determine.
第6図に従来の他の実施例を示す。(1-1)(1-2)は母線、
(101)〜(1n),(201)〜(2n)は断路器、(14-1)(14-2)はP
T(101x)〜(1nx),(201x)〜(2nx)は各々断路器(101)〜(1
n),(201)〜(2n)の補助リレー接点で動作時接点閉成す
る。(20-1)は母線1(1-1)を保護する母線保護リレー
(以下87Aと称す)、(20-2)は母線2(1-2)を保護する
母線保護リレー(以下87Bと称す)であり、入力装置(1
5-1)〜(15-n)及び87A(20-1),87B(20−2)は前記第
4図と同一構成、原理である。第6図の例は二重母線を
保護する分割方式と称する周知の保護方式を示すもの
で、母線に接続される各回線が断路器(101),(201)〜(1
n)(2n)で母線1(1-1)又は母線2(1-2)に選択された状態
に合せ、入力装置(15-1)〜(15-n)の出力を接点(101x)(2
01x)〜(1nx)(2nx)で切替え87A(20-1)には母線1(1-1)
に接続された全回線の入力装置出力を導入し、87B(20-
2)には母線2(1-2)に接続された全回線の入力装置出力
を導入するようにしたものである。FIG. 6 shows another conventional embodiment. (1-1) (1-2) are busbars
(101) ~ (1n), (201) ~ (2n) is a disconnecting switch, (14-1) (14-2) is P
T (101x) ~ (1nx), (201x) ~ (2nx) are disconnectors (101) ~ (1
n), (201) ~ (2n) auxiliary relay contact closes when operating. (20-1) is a busbar protection relay that protects busbar 1 (1-1) (hereinafter referred to as 87A), (20-2) is a busbar protection relay that protects busbar 2 (1-2) (hereinafter referred to as 87B) ) And the input device (1
5-1) to (15-n) and 87A (20-1), 87B (20-2) have the same structure and principle as those in FIG. The example of FIG. 6 shows a well-known protection system called a split system for protecting a double bus, in which each line connected to the bus is connected to a disconnecting switch (101), (201)-(1).
n) (2n) according to the selected state of bus 1 (1-1) or bus 2 (1-2), the output of the input device (15-1) ~ (15-n) contacts (101x) ( 2
Switch from 01x) to (1nx) (2nx) 87A (20-1) Bus 1 (1-1)
Introduced the output of the input device of all lines connected to, 87B (20-
In 2), the input device outputs of all the lines connected to the bus 2 (1-2) are introduced.
従来の母線保護装置は以上のように構成されているので
各回線毎の入力装置、各母線毎の母線保護リレーが必要
であり、ハードウェアー量が多く、又第6図に示す二重
母線保護では断路器補助リレー接点を多数使用する為、
接点の接触不良を生じやすく、装置内配線数も多い等の
問題点があった。Since the conventional busbar protection device is configured as described above, an input device for each line and a busbar protection relay for each busbar are required, the amount of hardware is large, and the double busbar protection shown in FIG. 6 is required. Since many disconnector auxiliary relay contacts are used,
There are problems that contact failure is likely to occur and the number of wires in the device is large.
この発明は上記のような問題点を解消するためになされ
たもので、今后ますます発展すると思われるマイクロプ
ロセッサーを利用したデジタルリレーで従来のIO有効
分電流比率差動原理をソフトウェアー処理し、特性劣化
のない高性能なリレーを得ると共に断路器切替え条件も
簡単にソフトウェアー処理できるデジタル形地絡母線保
護継電装置を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and a digital relay using a microprocessor, which is expected to develop more and more in the future, is used to process the conventional IO effective current ratio differential principle by software. The purpose of the present invention is to obtain a digital type ground fault bus protection relay device that can obtain a high-performance relay with no characteristic deterioration and can easily perform software processing on the disconnector switching conditions.
この発明に係るデジタル形地絡母線保護継電装置はデジ
タルリレーにて各回線のIO電流から有効分電流を導出
し、それの最大値又はスカラー和を抑制量|IR|と
し、各回線のIO電流ベクトル和の有効分を差動量|I
D|として|ID|−ηR|IR|>0(ηRは定数)
とする第1の要素と各回線のIO電流ベクトル和レベル
を判別する第2の要素とを備え第1の要素と第2の要素
のAND条件で動作したものである。又二重母線保護に
おいては母線選択用断路器条件を前記デジタルリレーに
導入し、各回線のIO電流データを断路器のON-OFF条件
で選択の上各母線単位で前記第1の要素と第2の要素演
算を実施するようにしている。The digital ground fault bus protection relay device according to the present invention derives an effective component current from the I O current of each line by a digital relay, and sets the maximum value or scalar sum thereof as the suppression amount | I R | Difference of the effective component of the sum of I O current vector of
As D | | I D | -η R | I R |> 0 (η R is a constant)
And a second element for discriminating the I O current vector sum level of each line, and operated under the AND condition of the first element and the second element. In addition, in double bus protection, a disconnecting switch condition for selecting a bus is introduced into the digital relay, and IO current data of each line is selected according to the ON-OFF condition of the disconnecting switch, and the above first element and Two element operations are performed.
この発明におけるデジタル形母線保護継電装置は各回線
のIO有効分電流で比率差動演算するようにしているた
め、ケーブル系の無効分電流による不要抑制量が発生せ
ず又、二重母線保護において各回線のCT2次IO電流
を断路器補助リレー接点で直接切替える事がない為、接
点数が減少し、接点接触不良が少なくなる。Since the digital busbar protection relay device according to the present invention performs the ratio differential operation with the IO active current of each line, an unnecessary suppression amount is not generated by the reactive current of the cable system, and the double busbar protection is performed. Since the CT secondary IO current of each line is not directly switched by the disconnect switch auxiliary relay contact, the number of contacts is reduced and contact failure is reduced.
この発明の一実施例を示す第1図において、CT(3-1)
〜(3-n)の2次電流はキャップ付入力トランス(4-1)〜(4
-n)で電圧変換し、又PT(14)の3次電圧は入力トラン
ス(4-a)を介しデジタルリレー(5)に導入する。二重母線
の場合断路器(101)(201)…(1n)(2n)の開閉状態は、それ
の補助リレー接点(101x)(201x)…(1nx)(2nx)を介してデ
ジタルリレー(5)に導入されている。入力トランス(4-1)
〜(4-n)及び(4-a)の各2次出力は各々フィルター(6)を
介し、サンプルホールド器(以下、S/Hと称す。)(7)
で同一時刻、一定間隔のアナログ量瞬時値をサンプリン
グする。マルチプレクサー(8)は各S/H(7)の出力を順次
切替え、アナログデジタル変換器(9)にてアナログ量を
デジタル量に変換の上メモリー(12)に記憶させる。尚二
重母線用の断路器開閉状態はデジタル入力回路(10)より
取り込みメモリー(12)に状態を記憶させ、CPU(13)で
電流デジタル量の選択演算を行ない、リレー演算結果の
出力はデジタル出力回路(11)で外部に出すものである。In FIG. 1 showing an embodiment of the present invention, CT (3-1)
~ (3-n) secondary current is input transformer with cap (4-1) ~ (4
-n) converts the voltage, and the tertiary voltage of PT (14) is introduced into the digital relay (5) via the input transformer (4-a). In the case of a double busbar The disconnecting switch (101) (201)… (1n) (2n) is opened / closed by a digital relay (5) via its auxiliary relay contact (101x) (201x)… (1nx) (2nx). ) Has been introduced. Input transformer (4-1)
Each of the secondary outputs of (4-n) and (4-a) passes through a filter (6) and a sample-hold device (hereinafter referred to as S / H) (7).
At the same time, sample the instantaneous value of analog quantity at a constant interval. The multiplexer (8) sequentially switches the output of each S / H (7), converts the analog quantity into a digital quantity by the analog-digital converter (9), and stores it in the memory (12). The open / closed state of the disconnecting switch for the double bus is taken in from the digital input circuit (10), stored in the memory (12), and the CPU (13) performs the selection calculation of the digital current amount, and the output of the relay calculation result is digital. The output circuit (11) outputs it to the outside.
以上の構成から成るデジタル形地絡母線保護継電装置に
おいて、演算原理を第2図に示す。第2図において、入
力I1〜Inは各々第1図のCT(3-1)〜(3-n)の2次電
流瞬時値に比例したデジタル量、入力VOはPT(14)の
3次VO電圧瞬時値に比例したデジタル量であり、第1
図のメモリー(12)一時記憶されている。演算処理ブロッ
ク(101)〜(108)はメモリー(12)に書き込まれているプロ
グラムに従がいCPU(13)で演算する内容を示してお
り、ブロック(101)は各回線CT2次電流のIO有効分
を導出する演算ブロック、ブロック(102)は差動量ID
を導出する演算ブロック、ブロック(103)は抑制量を導
出する演算ブロック、(104)は差動量IDのIO有効分
を導出する演算ブロック、ブロック(105)は比率差動判
定の演算ブロック、ブロック(106)は振幅値を計算する
ブロック、ブロック(107)は差動レベルを判定するブロ
ック、(108)は論理積演算回路である。以下演算内容の
詳細説明をする。ブロック(101)は電流データI1〜I
nまで各電流データ毎のIO有効分導出演算するもので
あり、今電流データInのIO有効分を導出する演算と
すれば、次のようになる。FIG. 2 shows the operation principle of the digital ground fault bus protection relay device having the above-mentioned configuration. In FIG. 2, inputs I 1 to In are digital quantities proportional to the secondary current instantaneous values of CT (3-1) to (3-n) in FIG. 1, respectively, and input VO is the tertiary of PT (14). It is a digital value proportional to the instantaneous value of VO voltage.
Figure memory (12) Temporarily stored. The arithmetic processing blocks (101) to (108) show the contents to be calculated by the CPU (13) according to the program written in the memory (12), and the block (101) shows the IO effective of each line CT secondary current. The calculation block for deriving the minute, the block (102) is a differential amount I D
, A block (103) is a calculation block for deriving the suppression amount, (104) is a calculation block for deriving the IO effective component of the differential amount I D , and a block (105) is a calculation block for ratio differential determination. A block (106) is a block for calculating an amplitude value, a block (107) is a block for determining a differential level, and (108) is a logical product operation circuit. The details of the calculation will be described below. The block (101) is current data I 1 to I
Up to n, the IO effective component derivation calculation is performed for each current data, and the calculation will be as follows if the IO effective component of the current data In is calculated.
時間tにおける電流データIn,VoデータVoを各々
Int,Votとすれば Vot=VOsinωt ……(1)式 Int=Insin(ωt+θn) ……(2)式 但し、θnはVoとInの位相角 又時間tより90゜前の電流データIn,VoデータをI
nt−90゜,Vot−90゜とすれば Vot−90゜=Vosin(ωt−90゜) =Vocosωt ……(3)式 Int−90゜=Insin(ωt+θn−90゜) =Incos(ωt+θn)……(4)式 (1)〜(4)式より Vot・Int+Vot−90゜・Int−90゜ =Vo・Incosθn ……(5)式 となり時間tに無関係な、Vo電圧振幅値VoとIo電
流の有効分振幅値Incosθn(但しθnはVo電流と
In電流の位相角)の積値を得る事ができる。Current data In at time t, respectively Vo data Vo I nt, if V ot V ot = V O sinωt ...... (1) Formula I nt = I n sin (ωt + θn) ...... (2) equation However, .theta.n Is the phase angle between Vo and I n , and current data I n and Vo data 90 ° before time t is I
nt -90 °, if V ot -90 ° V ot -90 ° = Vosin (ωt-90 °) = Vocosωt ...... (3) formula I nt -90 ° = I n sin (ωt + θn -90 °) = I n cos (ωt + θn) ...... (4) equation (1) to (4) and V ot · I nt + V ot -90 ° · I nt -90 ° = Vo · I n cosθn ...... ( 5) from equation equation A product value of the Vo voltage amplitude value Vo and the effective component amplitude value I n cos θn of the Io current (where θn is the phase angle of the Vo current and the In current) irrespective of the time t can be obtained.
次にブロック(102)は差動量導出演算であり、時間tの
電流データIlt〜Intを全回線分加算演算する。今、加
算結果(差動量)をIDtとすれば ブロック(104)は差動量IDのIo有効分導出演算であ
り、Io有効分導出の方法は前記(1)〜(5)式と同様な演
算を実施すれば良い。Next, block (102) is a differential amount deriving operation to full line partial addition operation the current data I lt ~I nt of time t. Now, if the addition result (differential amount) is I Dt The block (104) is an Io effective component deriving operation of the differential amount I D , and the method of deriving the Io effective component may be the same operation as the equations (1) to (5).
A=Vot・IDt+Vot−90゜・IDt−90゜ =VoIDcosθ……(7)式 次にブロック(103)は抑制量導出演算で前記ブロック(10
1)で導出した各回線毎の電流データI1〜InのIo有
効分電流に比例したVoIncosθn(但しn=1〜
n)の絶対値の内最大値|B|を選択するもので、例え
ば二つのデータを大小比較する演算を逐次実行すれば良
い。A = V ot I Dt + V ot −90 ° I Dt −90 ° = V o I D cos θ (7) Equation (7) Next, the block (103) is the suppression amount derivation operation and the block (10) is used.
Current data I 1 for each line derived by 1) ~I n of I o active current in proportion to V o I n cosθn (where n =. 1 to
The maximum value | B | of the absolute values of n) is selected, and for example, an operation of comparing two data in magnitude may be sequentially executed.
ブロック(105)はリレーの比率差動原理を演算するもの
で前記(7)式に表す差動量の絶対値|A|と(8)式に表す
抑制量の絶対値|B|とで次の演算を実行する。 The block (105) calculates the ratio differential principle of the relay. The absolute value | A | of the differential amount expressed by the equation (7) and the absolute value | B | Perform the operation of.
となる為|A|−ηR|B|>0はVo(|IDN|−η
R|VRN|)>0となり、結局|IDN|−ηR|I
RN|)>0の判別を行なうことになり、Io有効分電流
による比率差動演算となる。 , And therefore | A | -η R | B | > 0 is V o (| I DN | -η
R | V RN |)> 0 and eventually | I DN | −η R | I
RN |)> 0 is discriminated, which is a ratio differential operation by the effective current of I o .
ブロック(106)は差動量IDの振幅値演算であり、ベク
トル演算法、面積法、等周知のものである為、ここでは
説明を省略する。ブロック(107)は差動量IDの振幅値
計算結果と動作値を決定する定数Koとの比較演算であ
り、前記ブロック(105)の比率差動演算結果と差動レベ
ル判定が共に動作した時論理積演算回路(108)によるリ
レー出力を出すようにするものである。The block (106) is the amplitude value calculation of the differential amount I D , and the vector calculation method, the area method, and the like are well known, and therefore the description thereof is omitted here. A block (107) is a comparison calculation of the calculation result of the amplitude value of the differential amount I D and a constant K o that determines the operation value, and the ratio differential calculation result and the differential level determination of the block (105) both operate. When this happens, the relay output by the AND operation circuit (108) is output.
なお、上記実施例では単母線保護用としているが、二重
母線保護用にも適用でき、この実施例を第3図に示す。
第3図は従来の例を示す第6図に相当する母線1(1-1)
及び母線2(1-2)を1台のデジタルリレーーで保護する
もので、電流I1〜Inは第6図のCT(3-1)〜(3-n)、
Vo電圧データVOA,VOBは第6図のPT(14-1),(14-
2)より導入し、LSON-OFFデータ(101x)〜(1nx),(201
x)〜(2nx)は第6図の断路器(101)〜(1n),(201)〜(2n)
のON-OFF状態を示しており、デジタルリレーへの入力は
前記第1図と同様に電流I1〜Inは第1図の入力トラ
ンス(4-1)〜(4-n)、Vo電圧VOA,VOBは第1図の入力
トランス(4-a)及び図示していない母線2用入力トラン
スより導入し、LSON-OFFデータ(101x)〜(1nx),(201
x)〜(2nx)はデジタルリレー(5)のDI(10)に導入する。
第3図においてブロック(109)はLS選択演算ブロック
で従来の第6図に示す入力装置(15-1)〜(15-n)の2次出
力切替え回路に相当し、例えば断路器(101)がON,断路
器(201)がOFFの場合LSON-OFFデータ(101x)は“1”(O
N)、(201x)は“0”(OFF)とし、電流データI1は母線
1(1-1)用として抽出するように演算する。ブロック(11
0),(111)は各々母線1(1-1)用母線2(1-2)用に選択さ
れた電流データ群を示している。ブロック(112),(113)
は各々母線1(1-1)保護用リレー,母線2(1-2)保護用リ
レーの演算を示し従来の第6図87A,87Bに相当するも
のでブロック(112),(113)の演算内容は第2図と同様で
ある。又、上記実施例では第2図のブロック(103)を最
大値導入としているが、ブロック(101)の各電流Io有
効分VoIncosθnの絶対値和(スカラー和抑制)と
しても同様の効果を得ることができる。さらに第2図の
ブロック(102)でデジタル演算による差動量導出として
いるが、単母線構成の場合は第1図の入力トランス(4-
1)〜(4-n)に3次コイルを設け、この出力をアナログ合
成差動としてからデジタルリレー(5)に導入してもよ
い。In addition, in the above embodiment, the single busbar protection is used, but it can be applied to the double busbar protection, and this embodiment is shown in FIG.
FIG. 3 is a bus bar 1 (1-1) corresponding to FIG. 6 showing a conventional example.
And the bus 2 (1-2) are protected by one digital relay, and the currents I 1 to In are CT (3-1) to (3-n) in FIG.
The V o voltage data V OA and V OB are PT (14-1) and (14-
2) introduced, LS ON-OFF data (101x) ~ (1nx), (201
x) to (2nx) are the disconnectors (101) to (1n) and (201) to (2n) of FIG.
In the ON-OFF state of FIG. 1, the inputs to the digital relay are the currents I 1 to In shown in FIG. 1, the input transformers (4-1) to (4-n), and the Vo voltage V. OA and V OB are introduced from the input transformer (4-a) in FIG. 1 and the input transformer for the bus 2 (not shown), and LS ON-OFF data (101x) to (1nx), (201
x) to (2nx) are introduced into DI (10) of digital relay (5).
In FIG. 3, a block (109) is an LS selection calculation block and corresponds to the secondary output switching circuit of the conventional input devices (15-1) to (15-n) shown in FIG. 6, for example, the disconnector (101). Is ON and the disconnector (201) is OFF, the LS ON-OFF data (101x) is “1” (O
N) and (201x) are set to “0” (OFF), and the current data I 1 is calculated so as to be extracted for the bus 1 (1-1). Block (11
Reference numerals 0) and (111) respectively represent current data groups selected for the bus 2 (1-2) for the bus 1 (1-1). Blocks (112), (113)
Shows the calculation of the busbar 1 (1-1) protection relay and the busbar 2 (1-2) protection relay, respectively, which is equivalent to the conventional Fig. 87A, 87B, and is the calculation of the blocks (112), (113). The contents are the same as in FIG. Further, in the above embodiment is of a maximum value introduced block (103) of FIG. 2, but the block (101) of each current Io active component V o I n cosθn similar as the absolute value sum (scalar sum inhibition) The effect can be obtained. Further, the block (102) in FIG. 2 derives the differential amount by digital calculation, but in the case of the single bus configuration, the input transformer (4-
A tertiary coil may be provided in 1) to (4-n), and the output may be introduced into the digital relay (5) as an analog composite differential.
以上のように、この発明によれば各回線のIo電流及び
母線のVo電圧をデジタルリレーに導入し、各回線毎の
Io有効分電流を演算し、これを抑制量に使用すること
により、無効分電流による不要抑制力がなくなり、又二
重母線保護時に必要な各回線のIo電流切替えも各回線
のLSON-OFF情報をデジタルリレーに導入し、デジタル
演算処理する事ができる為、装置内配線が簡素化でき、
接点の接触不良要因も軽減され高性能・高信頼度なもの
が得られる。As described above, according to the present invention, the I o current of each line and the V o voltage of the bus are introduced into the digital relay, the I o effective current for each line is calculated, and this is used as the suppression amount. As a result, unnecessary suppression power due to reactive current is eliminated, and Io current switching of each line necessary for double bus protection can be performed by introducing LS ON-OFF information of each line to a digital relay and performing digital arithmetic processing. , Wiring inside the device can be simplified,
Factors for contact failure can be reduced, and high performance and high reliability can be obtained.
第1図は本発明の一実施例による構成図、第2図は同じ
く演算原理図、第3図はこの発明の他の実施例を示す演
算原理図、第4図は従来の構成図、第5図は従来及び本
発明においてIo有効分電流比率差動原理が必要な理由
を説明する為の補足説明図、第6図は従来の他の構成図
である。 図において、(6)はフィルター、(7)はサンプルホールド
器、(8)はマルチプレッサー、(9)はA/D変換器、(10)
はデジタル入力、(12)はメモリ、(13)はマイクロプロセ
ッサ、(101)は各電流のIo有効分導出手段、(102)は差
動量導出手段、(103)は最大値導出手段、(104)はIDの
Io有効分導出手段、(105)は比率演算導出手段、(107)
は差動レベル判定手段、(108)はAND要素である。 なお、図中同一符号は同一又は相当部分を示す。FIG. 1 is a configuration diagram according to one embodiment of the present invention, FIG. 2 is the same operation principle diagram, FIG. 3 is an operation principle diagram showing another embodiment of the present invention, and FIG. 4 is a conventional configuration diagram, FIG. 5 is a supplementary explanatory view for explaining the reason why the principle of I o effective current ratio differential is required in the conventional and the present invention, and FIG. 6 is another configuration diagram of the conventional. In the figure, (6) is a filter, (7) is a sample and hold device, (8) is a multipressor, (9) is an A / D converter, and (10).
Is a digital input, (12) is a memory, (13) is a microprocessor, (101) is an Io effective component deriving means for each current, (102) is a differential amount deriving means, (103) is a maximum value deriving means, (104) is an I o effective component derivation means of I D , (105) is a ratio calculation derivation means, (107)
Is a differential level determination means, and (108) is an AND element. The same reference numerals in the drawings indicate the same or corresponding parts.
Claims (1)
器より導出した各回線の零相電流と前記母線に接続され
た計器用変圧器より導出した零相電圧とを同一時刻、同
一間隔でサンプリングし、デジタル量に変換する手段を
有するデジタル形地絡母線保護継電装置において、時刻
tにおける前記各回線の零相電流に比例した瞬時値デー
タInt、時刻tより電気角で90゜前の時刻における前記
各回線の零相電流に比例した瞬時値データInt−90゜、
時刻tにおける前記零相電圧に比例した瞬時値データV
ot、時刻tより電気角で90゜前の時刻における前記零相
電圧に比例した瞬時値データVot−90゜、を導入し、こ
れらデータに基づいて、時刻tにおける差動量IDt=Σ
Intと時刻t−90゜における差動量IDt−90゜=ΣInt
−90゜とから演算データA=Vot・IDt+Vot−90゜・
IDt−90゜を演算する第1の演算手段、|Vot・Int+
Vot−90゜・Int−90゜|の演算データ中最大値、又は
それぞれのスカラー和の演算データBを演算する第2の
演算手段、前記第1及び第2の演算手段の演算したデー
タから|A|−ηR|B|>0(但し、ηRは、定数)
を判別する第1の要素、IDt 2+(IDt−90゜)2−K
0>0を判別する第2の要素を備え、前記第1及び第2
の要素が共に動作判別したとき、動作出力を発生するこ
とを特徴とするデジタル形地絡母線保護継電装置。1. A zero-phase current of each line derived from a current transformer installed in each line connected to a bus and a zero-phase voltage derived from an instrument transformer connected to the bus at the same time, sampled at the same intervals, in the digital form locations絡母line protective relay device having means for converting digital quantity, instantaneous values I nt proportional to the zero-phase current of the respective line at time t, by an electrical angle of the time t Instantaneous value data Int- 90 ° proportional to the zero-phase current of each line at a time 90 ° earlier,
Instantaneous value data V proportional to the zero-phase voltage at time t
ot , instantaneous value data V ot −90 ° proportional to the zero-phase voltage at a time 90 ° before the time t in electrical angle is introduced, and based on these data, the differential amount I Dt = Σ at the time t
Int and the differential amount at time t-90 ° I Dt −90 ° = ΣI nt
-90 ° and calculated data A = V ot · I Dt + V ot −90 °
First computing means for computing I Dt -90 °, | V ot · I nt +
V ot −90 ° · Int −90 ° | maximum value in the calculated data, or second calculated means for calculating the calculated data B of the respective scalar sums, data calculated by the first and second calculating means To | A | −η R | B |> 0 (where η R is a constant)
The first element for determining the difference, I Dt 2 + (I Dt −90 °) 2 −K
A second element for determining 0 > 0, and the first and second elements
A digital ground fault bus protection relay device, which generates an operation output when both elements of the operation are determined to be operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61128601A JPH069429B2 (en) | 1986-06-03 | 1986-06-03 | Digital ground fault bus protection relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61128601A JPH069429B2 (en) | 1986-06-03 | 1986-06-03 | Digital ground fault bus protection relay |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62285627A JPS62285627A (en) | 1987-12-11 |
| JPH069429B2 true JPH069429B2 (en) | 1994-02-02 |
Family
ID=14988806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61128601A Expired - Lifetime JPH069429B2 (en) | 1986-06-03 | 1986-06-03 | Digital ground fault bus protection relay |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069429B2 (en) |
-
1986
- 1986-06-03 JP JP61128601A patent/JPH069429B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62285627A (en) | 1987-12-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Eissa et al. | A novel digital distance relaying technique for transmission line protection | |
| JP3808624B2 (en) | System protection relay device | |
| Sidhu et al. | A power transformer protection technique with stability during current transformer saturation and ratio-mismatch conditions | |
| JP2957187B2 (en) | Secondary circuit disconnection detector for instrument transformer | |
| JP3829614B2 (en) | Digital type protective relay device | |
| JPH069429B2 (en) | Digital ground fault bus protection relay | |
| JP2971329B2 (en) | Bus protection relay | |
| JP6362569B2 (en) | Distance relay device and power line protection method | |
| Sanderson et al. | Improved directional comparison based algorithm for protection of multi-terminal transmission lines | |
| JP2581061B2 (en) | Power system protection device | |
| Bejmert et al. | Distance protection of block transformer units | |
| JPS6111052B2 (en) | ||
| JPH0235539B2 (en) | ITSUSENCHIRAKUKENSHUTSUKEIDENKI | |
| JPH04190627A (en) | Digital bus protective relay | |
| JP2607483B2 (en) | Ground fault directional relay | |
| JPH0210654B2 (en) | ||
| JPH01114324A (en) | Selective ground fault relay device | |
| JPH069430B2 (en) | Digital bus protection relay | |
| JP2600682B2 (en) | Ground fault protection relay | |
| JPS6236453B2 (en) | ||
| JPH0767232B2 (en) | Digital protective relay | |
| JPH0113293B2 (en) | ||
| JPH069431B2 (en) | Digital bus protection relay | |
| JPH069427B2 (en) | Digital bus protection relay | |
| JPH082137B2 (en) | Transmission line current differential protection device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| EXPY | Cancellation because of completion of term |