JPH0697707B2 - Semiconductor light emitting device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] In a semiconductor light emitting device, the present invention provides a high resistance buried layer with a groove formed to reach a substrate from a surface to form a mesa including a striped light emitting region. A semiconductor layer having a width that does not exceed both outer ends of the high resistance buried layer and is formed in contact with the surface of the high resistance buried layer and the surface of the mesa and has a conductivity type opposite to that of the high resistance buried layer. By forming a contact electrode on the semiconductor layer, even if the electrode is widely formed,
As long as it exists on the semiconductor layer, it does not come into contact with the high-resistance buried layer, and as a result, a large leakage current does not occur, so that it is possible to reduce the threshold current and improve the cut-off frequency. The laser oscillation is performed safely.

[Industrial application field]

The present invention relates to an improvement in a buried semiconductor light emitting device having a so-called double channel (double groove) in which a stripe-shaped current limiting layer is formed on both sides of a light emitting region.

[Conventional technology]

FIG. 6 shows a cutaway front view of a main part of a conventional embedded semiconductor light emitting device.

In the figure, 1 is an n ⁺ type InP substrate, 2 is an n type InGaAsP active layer, 2A is a striped light emitting region which is a part of the n type InGaAsP active layer 2, 3 is a p type InP clad layer, and 4 is n. ^- -type InP high-resistance burying layer, 5 a p-side electrode made of Ti / Pt / Au, is 6 Au
-The n-side electrodes made of Ge are shown.

In order to perform the laser operation of this conventional example, a forward bias voltage is applied to the heterojunction diode formed by the stripe-shaped light emitting region 2A which is a part of the n-type InGaAsP active layer 2 and the p-type InP clad layer 3, In particular, stripe light emitting area
This is done by injecting current into 2A.

In the semiconductor light emitting device having such a structure, in order to improve the laser characteristics, it is necessary to suppress the current that does not pass through the stripe light emitting region 2A, that is, the leakage current as much as possible.

In this case, the leakage current is suppressed mainly by p-type In.
This is done by utilizing the fact that the forward rising voltage of the pn junction diode composed of the P clad layer 3 and the n ⁻ type InP high resistance buried layer 4 is higher than that of the hetero junction diode.

In this conventional example, when a non-defective product is obtained, light confinement and current confinement are excellently performed and excellent properties are exhibited, but it is very difficult to manufacture a non-defective product with good reproducibility.

FIG. 7 is a cutaway front view of a main part for explaining the drawbacks of the conventional example described with reference to FIG. 6, and the same symbols as those used in FIG. 6 represent the same parts or have the same meanings. I shall.

In this conventional example, the width of the p-side electrode 5 is wider than that shown in FIG. 6, so that the n ⁻ -type InP high resistance buried layer 4 is formed.
I am also in contact with.

With such a configuration, as indicated by the arrow,
A large amount of leakage current i _L that does not pass through the pn junction diode as well as the hetero junction diode flows, and laser oscillation becomes impossible.

Therefore, in the semiconductor light emitting device of the type as shown in FIG. 6, the p-type InP clad layer 3 in the portion forming the mesa by the groove filled with the n ⁻ -type InP high-resistance buried layer 4 is formed. It is necessary to form the p-side electrode 5 only immediately above.

[Problems to be solved by the invention]

Generally, in a semiconductor light emitting device, in order to safely oscillate the laser, the width of the stripe-shaped light emitting region 2A is 1.5
[Μm] or less is necessary, and applying the conventional technique as described with reference to FIG. 6 to the semiconductor light emitting device having such a narrow light emitting region 2A is not necessary in the research stage, but is in mass production. At the stage, it is difficult as it is almost impossible, and if the width of the electrode is narrow, good heat dissipation cannot be achieved even when the semiconductor light emitting device is mounted on the heat sink.

According to the present invention, since the semiconductor light emitting device can be easily manufactured and the heat dissipation can be improved, even if the width of the electrode is widened, the leakage current is not increased.

[Means for solving problems]

In the semiconductor light emitting device according to the present invention, the active layer (for example, n-type
In order to make the semiconductor layers laminated including the InGaAsP active layer 8) into stripe-shaped mesas, a substrate (for example, n ⁺ type) is formed from the surface.
Two grooves (eg, groove 10) formed until reaching the InP substrate 7) and a high-resistance buried layer (eg, n ⁻ -type InP high-resistance buried layer 10A) that fills the two grooves and has a flat surface.
And a width that does not exceed both outer ends of the two high resistance burying layers and that is formed in contact with the surface of the high resistance burying layer and the surface of the mesa and has a conductivity opposite to that of the high resistance burying layer. A semiconductor layer of a type (for example, p ⁺ type InP layer) and a stripe-shaped electrode (for example, p-side electrode 12) formed on and in contact with the semiconductor layer are adopted.

[Action]

By adopting the above means, even if the electrode is located on the high resistance buried layer in plan view, there is a semiconductor layer having a conductivity type opposite to that of the high resistance buried layer between the electrode and the high resistance layer. Therefore, it is much easier for the current to flow to the mesa portion than to flow into the substrate through the route of the semiconductor layer-high resistance buried layer, so that a large leakage current as in a conventional semiconductor light emitting device is generated. As a result, the threshold current can be reduced, the cut-off frequency can be improved, stable laser oscillation can be performed, and the electrode can be widely formed, which facilitates the manufacturing. And the heat dissipation is also good.

〔Example〕

1 to 5 are sectional front views of a main part of a semiconductor light emitting device in a process key point for explaining an embodiment of the present invention,
Hereinafter, description will be given with reference to these drawings.

See Fig. 1 (1) For example, liquid phase epitaxial growth (1iquid phase
epitaxy: LPE) method, and n-type InG on n ⁺ -type InP substrate 7
The aAsP active layer 8 and the p-type InP clad layer 9 are grown in this order.

Here, the main data of each part is exemplified as follows.

(A) About n ⁺ type InP substrate 7 Thickness: ~ 500 [μm] Size: 20 × 20 [mm ² ] Surface index: (100) Impurity: Sn Impurity concentration: 2 × 10 ¹⁸ [cm ^-3 ] ( b) About n-type InGaAsP active layer 8 Thickness: 0.5 [μm] (c) About p-type InP clad layer 9 Thickness: ~ 3 [μm] Impurity: Cd Impurity concentration: 5 × 10 ¹⁷ [cm ^-3 ] See FIG. 2 (2) For example, a sputtering method is applied to form an insulating film made of SiO _{2 in} a thickness of, for example, about 3000 [A].

(3) By applying a normal photolithography technique, the insulating film is etched to provide an opening necessary for forming a groove for burying a high resistance burying layer.

(4) By applying a normal photolithography technique, etching is performed to reach the n ⁺ -type InP substrate 7 from the p-type InP clad layer 9 on the surface using the insulating film having the opening as a mask to form the groove 10.

The following is an example of data used to form the groove 10.

Etching solution: Br ₂ : HBr: H ₂ O = 1: 17: 34 Width of central stripe part: 1.5 [μm] Width of groove 10: -9 [μm] Depth of groove 10: -5 [μm] ( 5) For example, the VPE method is applied to form the n ⁻ -type InP high resistance burying layer 10A filling the groove 10.

The resistivity of the n ⁻ type InP high resistance buried layer 10A is about 10 ⁴ (Ω · cm) as in the case of the conventional technique, and the growth is such that the groove 10 is completely filled and the surface is Stop when it becomes flat.

(6) The insulating film made of SiO ₂ used as the mask is removed.

See Fig. 3 (7) LPE method or VPE method is applied, and the thickness is about 1 [μm].
A p ⁺ -type InP layer 11 having a certain degree is formed.

See FIG. 4 (8) By applying the sputtering method again, an insulating film made of, for example, SiO _{2 is} formed to a thickness of about 3000 [A].

(9) The conventional photolithography technique is applied to pattern the insulating film, and the width of the n ^- type InP is two.
The mask film does not exceed both outer edges of the high resistance buried layer 10A.

(10) Mesa etching is performed to reach the p-type Inp cladding layer 9 from the surface of the p ⁺ -type InP layer 11.

Due to this mesa formation, the p ⁺ type InP layer 11 is insulated from the p type InP clad layer 9 outside the n ⁻ type InP high resistance buried layer 10A.

See FIG. 5 (11) The p-side electrode 12 and the n-side electrode 13 are formed by applying a usual technique such as a vapor deposition method, a photolithography technique, an alloying method, or the like.

In this case, the p-side electrode 12 is Ti / Pt / Au, and the n-side electrode 13 is Au.
It can be configured using each Ge.

In the semiconductor light emitting device thus completed, the resonator length: 300 [μm] average threshold current I _th : 16 [mA] cut-off frequency: 2.1 [GHz] I _d / I _th = 1.05 3 [dB] down The value was obtained.

The reason why such excellent characteristics were obtained is that the p ⁺ type InP layer 11
And the current blocking effect of the pn junction diode generated in the n ⁻ type InP high resistance buried layer 10A.

For comparison, a semiconductor light emitting device of the type shown in FIG. 6 was simultaneously made with the same dimensions, and the average threshold current I _th : 18 [mA] cut-off frequency: 1.3 [GHz] I _d / I _th = 1.05 Met.

In the above-described embodiment, the semiconductor light emitting device has a normal structure, but it is needless to say that the semiconductor light emitting device can be implemented as a distributed feedback type device having a diffraction grating.

〔The invention's effect〕

In the semiconductor light emitting device according to the present invention, a groove formed so as to reach the substrate from the surface is filled with a high resistance buried layer to form a mesa including a stripe-shaped light emitting region, and the high resistance buried layer is formed. A semiconductor layer having a width not exceeding both outer ends and being in contact with the surface of the high resistance buried layer and the surface of the mesa and having a conductivity type opposite to that of the high resistance buried layer is formed, and the semiconductor layer is formed on the semiconductor layer. At this point, a structure is used in which an electrode that contacts is formed.

By adopting such a configuration, even if the stripe-shaped electrode is widely formed, as long as it exists on the semiconductor layer of the conductivity type opposite to that of the high-resistance buried layer, it must be in contact with the high-resistance buried layer. As a result, a large leakage current is not generated, and therefore, it is possible to reduce the threshold current, improve the cutoff frequency, perform stable laser oscillation, and use a striped electrode. When forming, it is not necessary to miniaturize itself, and it is not necessary to perform fine alignment, which facilitates manufacturing. Furthermore, heat dissipation when mounted on a heat sink is good. .

[Brief description of drawings]

1 to 5 are front views of a semiconductor light emitting device in a principal part of a manufacturing process according to an embodiment of the present invention, and FIG. 6 is a front view of a main part in a conventional example. , 7th
The figures respectively show cut-away front views for explaining the drawbacks of the conventional example. In the figure, 7 is an n ⁺ type InP substrate, 8 is an n type InGaAsP active layer, 8A is a striped light emitting region which is a part of the n type InGaAsP active layer 8, 9 is a p type InP clad layer, and 10 is Trench, 10A is an n ⁻ type InP high resistance buried layer filling the trench 10, 11 is ap ⁺ type InP
A layer, 12 is a p-side electrode, and 13 is an n-side electrode.

Claims (1)

[Claims] 1. Two grooves formed to reach a substrate from a surface to form semiconductor layers laminated including an active layer into a stripe mesa, and the two grooves are filled with the surface. A flat high resistance burying layer, and a width which does not exceed both outer ends of the two high resistance burying layers and which is formed in contact with the surface of the high resistance burying layer and the surface of the mesa. A semiconductor light-emitting device comprising: a semiconductor layer having a conductivity type opposite to that of the resistance-embedded layer; and a stripe-shaped electrode formed on and in contact with the semiconductor layer.